From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andres Lagar-Cavilla Subject: [PATCH 0 of 3] Fixes for paging/sharing with AMD processors Date: Wed, 21 Mar 2012 15:22:57 -0400 Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: xen-devel@lists.xen.org Cc: olaf@aepfle.de, keir@xen.org, andres@gridcentric.ca, tim@xen.org, wei.wang2@amd.com, hongkaixing@huawei.com, adin@gridcentric.ca List-Id: xen-devel@lists.xenproject.org These are patches previously posted as RFC towards making paging and sharing work for AMD NPT. They are now ready for inclusion in the tree. They do not yet completely fix paging in AMD, but each fixes an existing bug: - Add "no-sharept" cli to allow disabling of sharing of iommu and p2m tables. - Mask high order bits when installing INVALID_MFN on a pte, so those bits don't trample over flags such as _PAGE_NX. I've used a suggestion from Tim Deegan in this patch, so I took the liberty of adding his SoB. - Teach paging to the page table-based p2m (p2m-pt). This involves fixing a few if's and ASSERT's. They've been tested to not break existing modes (shadow, AMD hap, dom0 as test for pv domains) Signed-off-by: Andres Lagar-Cavilla Signed-off-by: Tim Deegan xen/drivers/passthrough/iommu.c | 2 ++ xen/include/asm-x86/page.h | 12 ++++++++---- xen/arch/x86/mm/p2m-pt.c | 30 +++++++++++++++++++----------- 3 files changed, 29 insertions(+), 15 deletions(-)