[ath9k-devel] Magic numbers in pll-initialization in hw.c for AR9280 rev. 2.0

[ath9k-devel] Magic numbers in pll-initialization in hw.c for AR9280 rev. 2.0

[Robert Budde]

Hello everyone,

 

I am trying to set up different bandwidths (5, 10, 20 MHz) on the AR9280
rev. 2.0 chipset.

 

In hw.c, ath9k_hw_init_pll seems to do all necessary adjustments to the pll.
While for other chipsets the pll-variable is assembled bit by bit dependent
on certain values there are only two hardcoded magic numbers for the AR9280
rev. 2.0 in 5 GHz mode.

 

Can somebody give me a hint how to set up 5 and 10 MHz bandwidth for this
case?

 

There is also a lot of undocumented "magic" involved with other functions in
hw.c and phy.c (e.g. ath9k_hw_9280_spur_mitigate, ath9k_hw_set_channel). How
to decrypt these?

 

Thanks a lot!

 

Best regards,

Robert

 

 

 

 

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