RE: [PATCH v4 2/6] phy: samsung-ufs: move cdr offset to drvdata

["Chanho Park" <chanho61.park@samsung.com>]

> Subject: [PATCH v4 2/6] phy: samsung-ufs: move cdr offset to drvdata
> 
> Move CDR lock offset to drv data so that it can be extended for other SoCs
> which are having CDR lock at different register offset.
> 
> Signed-off-by: Bharat Uppal <bharat.uppal@samsung.com>
> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
> Reviewed-by: Chanho Park <chanho61.park@samsung.com>

- Reviewed-by: Chanho Park <chanho61.park@samsung.com>

> ---
>  drivers/phy/samsung/phy-exynos7-ufs.c      | 3 +++
>  drivers/phy/samsung/phy-exynosautov9-ufs.c | 2 ++
>  drivers/phy/samsung/phy-samsung-ufs.c      | 4 +++-
>  drivers/phy/samsung/phy-samsung-ufs.h      | 2 +-
>  4 files changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/phy/samsung/phy-exynos7-ufs.c
> b/drivers/phy/samsung/phy-exynos7-ufs.c
> index d1e9d0ae5c1d..72854336f59d 100644
> --- a/drivers/phy/samsung/phy-exynos7-ufs.c
> +++ b/drivers/phy/samsung/phy-exynos7-ufs.c
> @@ -11,6 +11,8 @@
>  #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL_MASK	0x1
>  #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL_EN	BIT(0)
> 
> +#define EXYNOS7_EMBEDDED_COMBO_PHY_CDR_LOCK_STATUS	0x5e
> +
>  /* Calibration for phy initialization */  static const struct
> samsung_ufs_phy_cfg exynos7_pre_init_cfg[] = {
>  	PHY_COMN_REG_CFG(0x00f, 0xfa, PWR_MODE_ANY), @@ -74,4 +76,5 @@
> const struct samsung_ufs_phy_drvdata exynos7_ufs_phy = {
>  		.en = EXYNOS7_EMBEDDED_COMBO_PHY_CTRL_EN,
>  	},
>  	.has_symbol_clk = 1,
> +	.cdr_lock_status_offset =
> EXYNOS7_EMBEDDED_COMBO_PHY_CDR_LOCK_STATUS,
>  };
> diff --git a/drivers/phy/samsung/phy-exynosautov9-ufs.c
> b/drivers/phy/samsung/phy-exynosautov9-ufs.c
> index fa4d2983eec6..2b256070d657 100644
> --- a/drivers/phy/samsung/phy-exynosautov9-ufs.c
> +++ b/drivers/phy/samsung/phy-exynosautov9-ufs.c
> @@ -10,6 +10,7 @@
>  #define EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CTRL		0x728
>  #define EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CTRL_MASK	0x1
>  #define EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CTRL_EN		BIT(0)
> +#define EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CDR_LOCK_STATUS	0x5e
> 
>  #define PHY_TRSV_REG_CFG_AUTOV9(o, v, d) \
>  	PHY_TRSV_REG_CFG_OFFSET(o, v, d, 0x50) @@ -64,4 +65,5 @@ const
> struct samsung_ufs_phy_drvdata exynosautov9_ufs_phy = {
>  		.en = EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CTRL_EN,
>  	},
>  	.has_symbol_clk = 0,
> +	.cdr_lock_status_offset =
> +EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CDR_LOCK_STATUS,
>  };
> diff --git a/drivers/phy/samsung/phy-samsung-ufs.c
> b/drivers/phy/samsung/phy-samsung-ufs.c
> index 206a79c69a6c..8cec7652b459 100644
> --- a/drivers/phy/samsung/phy-samsung-ufs.c
> +++ b/drivers/phy/samsung/phy-samsung-ufs.c
> @@ -63,7 +63,8 @@ static int samsung_ufs_phy_wait_for_lock_acq(struct phy
> *phy)
>  	}
> 
>  	err = readl_poll_timeout(
> -			ufs_phy->reg_pma + PHY_APB_ADDR(PHY_CDR_LOCK_STATUS),
> +			ufs_phy->reg_pma +
> +			PHY_APB_ADDR(ufs_phy->drvdata->cdr_lock_status_offset),
>  			val, (val & PHY_CDR_LOCK_BIT), sleep_us, timeout_us);
>  	if (err)
>  		dev_err(ufs_phy->dev,
> @@ -327,6 +328,7 @@ static int samsung_ufs_phy_probe(struct
> platform_device *pdev)
> 
>  	drvdata = match->data;
>  	phy->dev = dev;
> +	phy->drvdata = drvdata;

This can be reversing changes of below patch.
https://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git/commit/?h=next&id=f86c1d0a58b1f63a176f537e2f6851be49c20ad4

By suggestion of Krzysztof, I removed drvdata assignment to samsung_ufs_phy struct and moved has_symbol_clk from drvdata to samsung_ufs_phy struct.
However, I forgot to remove drvdata from samsung_ufs_phy struct...
Anyway, you want to get back the drvdata, you may need to add a preceding patch with reconsideration of has_symbol_clk to the drvdata again.
Otherwise, you can simply put cdr_lock_status_offset to the samsung_ufs_phy struct and assign the data from drvdata same as has_symbol_clk and isol.

Best Regards,
Chanho Park


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