diff for duplicates of <000501d2beb2$023b9100$06b2b300$@gmail.com> diff --git a/a/1.txt b/N1/1.txt index afa018e..9a1e838 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,29 +1,41 @@ -T24gV2VkbmVzZGF5LCBBcHJpbCAyNiwgMjAxNyA2OjU0IEFNLCBEb25nZG9uZyBMaXUgd3JvdGU7 -Cj4gCj4gVGVzdGVkLWJ5OiBEb25nZG9uZyBMaXUgPGxpdWRvbmdkb25nM0BodWF3ZWkuY29tPgo+ -IAo+IEkgdGVzdGVkIHRoZSBwYXRjaHNldCBvbiBIaVNpbGljb24gQVJNNjQgRDA1IGJvYXJkLkl0 -IHdvcmtzIG9rIHdpdGggODI1OTkKPiBuZXRjYXJkLgoKVGhhbmsgeW91IGZvciB0ZXN0aW5nIHRo -ZXNlIHBhdGNoZXMuIEhpU2lsaWNvbiBQQ0llIG1heSB1c2UgRGVzaWdud2FyZS1iYXNlZApQQ0ll -IGNvbnRyb2xsZXIuIEluIG15IG9waW5pb24sIG90aGVyIERlc2lnbndhcmUtYmFzZWQgUENJZSBj -b250cm9sbGVyIHdpbGwKd29yayBwcm9wZXJseS4KClRvIERvbmdkb25nIExpdSwgS2h1b25nIERp -bmgsIGFuZCBvdGhlciBwZW9wbGUsCklmIHBvc3NpYmxlLCBjYW4geW91IGNoZWNrIHRoZSBvdXRw -dXQgb2YgJ2xzcGNpIC12Jz8KSWYgeW91IGZpbmQgc29tZXRoaW5nIGRpZmZlcmVudCwgcGxlYXNl -IHNoYXJlIGl0IHdpdGggdXMuCkdvb2QgbHVjay4KCkJlc3QgcmVnYXJkcywKSmluZ29vIEhhbgoK -PiAKPiBUaGFua3MsCj4gRG9uZ2RvbmcKPiDlnKggMjAxNy80LzI1IDE0OjQwLCBKb24gTWFzdGVy -cyDlhpnpgZM6Cj4gPiBPbiAwNC8xOS8yMDE3IDEyOjQ4IFBNLCBMb3JlbnpvIFBpZXJhbGlzaSB3 -cm90ZToKPiA+Cj4gPj4gT24gc29tZSBwbGF0Zm9ybXMgKGllIEFSTS9BUk02NCkgaW9yZW1hcCBm -YWlscyB0byBjb21wbHkgd2l0aCB0aGUgUENJCj4gPj4gY29uZmlndXJhdGlvbiBub24tcG9zdGVk -IHdyaXRlIHRyYW5zYWN0aW9ucyByZXF1aXJlbWVudCwgYmVjYXVzZSBpdAo+ID4+IHByb3ZpZGVz -IGEgbWVtb3J5IG1hcHBpbmcgdGhhdCBpc3N1ZXMgImJ1ZmZlcmFibGUiIG9yLCBpbiBQQ0kgdGVy -bXMKPiA+PiAicG9zdGVkIiB3cml0ZSB0cmFuc2FjdGlvbnMuIExpa2V3aXNlLCB0aGUgY3VycmVu -dCBwY2lfcmVtYXBfaW9zcGFjZSgpCj4gPj4gaW1wbGVtZW50YXRpb24gbWFwcyB0aGUgcGh5c2lj -YWwgYWRkcmVzcyByYW5nZSB0aGF0IHRoZSBQQ0kgdHJhbnNsYXRlcwo+ID4+IHRvIEkvTyBzcGFj -ZSBjeWNsZXMgdG8gdmlydHVhbCBhZGRyZXNzIHNwYWNlIHRocm91Z2ggcGdwcm90X2RldmljZSgp -Cj4gPj4gYXR0cmlidXRlcyB0aGF0IG9uIGVnIEFSTTY0IHByb3ZpZGVzIGEgbWVtb3J5IG1hcHBp -bmcgaXNzdWluZwo+ID4+IHBvc3RlZCB3cml0ZXMgdHJhbnNhY3Rpb25zLCB3aGljaCBpcyBub3Qg -UENJIHNwZWNpZmljYXRpb25zIGNvbXBsaWFudC4KPiA+Cj4gPiBTaWRlIG5vdGUgdGhhdCBJJ3Zl -IHBpbmdlZCBhbGwgb2YgdGhlIEFSTSBzZXJ2ZXIgdmVuZG9ycyBhbmQgYXNrZWQgdGhlbQo+ID4g -dG8gdmVyaWZ5IHRoaXMgcGF0Y2ggc2VyaWVzIG9uIHRoZWlyIHBsYXRmb3Jtcy4KPiA+Cj4gPiBK -b24uCj4gPgo+ID4gLgo+ID4KCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f -X19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVs -QGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9s -aXN0aW5mby9saW51eC1hcm0ta2VybmVsCg== +On Wednesday, April 26, 2017 6:54 AM, Dongdong Liu wrote; +> +> Tested-by: Dongdong Liu <liudongdong3@huawei.com> +> +> I tested the patchset on HiSilicon ARM64 D05 board.It works ok with 82599 +> netcard. + +Thank you for testing these patches. HiSilicon PCIe may use Designware-based +PCIe controller. In my opinion, other Designware-based PCIe controller will +work properly. + +To Dongdong Liu, Khuong Dinh, and other people, +If possible, can you check the output of 'lspci -v'? +If you find something different, please share it with us. +Good luck. + +Best regards, +Jingoo Han + +> +> Thanks, +> Dongdong +> ? 2017/4/25 14:40, Jon Masters ??: +> > On 04/19/2017 12:48 PM, Lorenzo Pieralisi wrote: +> > +> >> On some platforms (ie ARM/ARM64) ioremap fails to comply with the PCI +> >> configuration non-posted write transactions requirement, because it +> >> provides a memory mapping that issues "bufferable" or, in PCI terms +> >> "posted" write transactions. Likewise, the current pci_remap_iospace() +> >> implementation maps the physical address range that the PCI translates +> >> to I/O space cycles to virtual address space through pgprot_device() +> >> attributes that on eg ARM64 provides a memory mapping issuing +> >> posted writes transactions, which is not PCI specifications compliant. +> > +> > Side note that I've pinged all of the ARM server vendors and asked them +> > to verify this patch series on their platforms. +> > +> > Jon. +> > +> > . +> > diff --git a/a/content_digest b/N1/content_digest index 20a9094..5d56980 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,74 +1,52 @@ "ref\020170419164913.19674-1-lorenzo.pieralisi@arm.com\0" "ref\02e24e205-d761-9172-9463-4a53e1a0de4d@jonmasters.org\0" "ref\0361fde15-5ba3-d33b-f946-003e89ba071f@huawei.com\0" - "From\0Jingoo Han <jingoohan1@gmail.com>\0" - "Subject\0Re: [PATCH v4 00/21] PCI: fix config space memory mappings\0" + "From\0jingoohan1@gmail.com (Jingoo Han)\0" + "Subject\0[PATCH v4 00/21] PCI: fix config space memory mappings\0" "Date\0Wed, 26 Apr 2017 13:24:48 -0400\0" - "To\0'Dongdong Liu' <liudongdong3@huawei.com>" - 'Khuong Dinh' <kdinh@apm.com> - 'Jon Masters' <jcm@jonmasters.org> - 'Lorenzo Pieralisi' <lorenzo.pieralisi@arm.com> - " <linux-pci@vger.kernel.org>\0" - "Cc\0'Pratyush Anand' <pratyush.anand@gmail.com>" - 'Gabriele Paoloni' <gabriele.paoloni@huawei.com> - 'Catalin Marinas' <catalin.marinas@arm.com> - 'Shawn Lin' <shawn.lin@rock-chips.com> - 'Will Deacon' <will.deacon@arm.com> - 'Linuxarm' <linuxarm@huawei.com> - 'Michal Simek' <michal.simek@xilinx.com> - 'Thierry Reding' <thierry.reding@gmail.com> - 'Tanmay Inamdar' <tinamdar@apm.com> - 'Zhou Wang' <wangzhou1@hisilicon.com> - 'Joao Pinto' <Joao.Pinto@synopsys.com> - 'Jonathan Corbet' <corbet@lwn.net> - 'Wenrui Li' <wenrui.li@rock-chips.com> - 'Russell King' <linux@armlinux.org.uk> - 'Bharat Kumar Gogada' <bharat.kumar.gogada@xilinx.com> - 'Murali Karicheri' <m-karicheri2@ti.com> - 'Benjamin Herrenschmidt' <benh@kernel.crashing.org> - 'Arnd Bergmann' <arnd@arndb.de> - 'Jon Mason' <jonmason@broadcom.com> - 'Ray Jui' <rjui@broadcom.com> - 'John Garry' <john.garry@huawei.com> - 'Bjorn Helgaas' <bhelgaas@google.com> - 'Mingkai Hu' <mingkai.hu@freescale.com> - linux-arm-kernel@lists.infradead.org - 'Thomas Petazzoni' <thomas.petazzoni@free-electrons.com> - linux-kernel@vger.kernel.org - 'Stanimir Varbanov' <svarbanov@mm-sol.com> - 'Minghuan Lian' <minghuan.Lian@freescale.com> - 'Luis R . Rodriguez' <mcgrof@kernel.org> - " 'Roy Zang' <tie-fei.zang@freescale.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" - "T24gV2VkbmVzZGF5LCBBcHJpbCAyNiwgMjAxNyA2OjU0IEFNLCBEb25nZG9uZyBMaXUgd3JvdGU7\n" - "Cj4gCj4gVGVzdGVkLWJ5OiBEb25nZG9uZyBMaXUgPGxpdWRvbmdkb25nM0BodWF3ZWkuY29tPgo+\n" - "IAo+IEkgdGVzdGVkIHRoZSBwYXRjaHNldCBvbiBIaVNpbGljb24gQVJNNjQgRDA1IGJvYXJkLkl0\n" - "IHdvcmtzIG9rIHdpdGggODI1OTkKPiBuZXRjYXJkLgoKVGhhbmsgeW91IGZvciB0ZXN0aW5nIHRo\n" - "ZXNlIHBhdGNoZXMuIEhpU2lsaWNvbiBQQ0llIG1heSB1c2UgRGVzaWdud2FyZS1iYXNlZApQQ0ll\n" - "IGNvbnRyb2xsZXIuIEluIG15IG9waW5pb24sIG90aGVyIERlc2lnbndhcmUtYmFzZWQgUENJZSBj\n" - "b250cm9sbGVyIHdpbGwKd29yayBwcm9wZXJseS4KClRvIERvbmdkb25nIExpdSwgS2h1b25nIERp\n" - "bmgsIGFuZCBvdGhlciBwZW9wbGUsCklmIHBvc3NpYmxlLCBjYW4geW91IGNoZWNrIHRoZSBvdXRw\n" - "dXQgb2YgJ2xzcGNpIC12Jz8KSWYgeW91IGZpbmQgc29tZXRoaW5nIGRpZmZlcmVudCwgcGxlYXNl\n" - "IHNoYXJlIGl0IHdpdGggdXMuCkdvb2QgbHVjay4KCkJlc3QgcmVnYXJkcywKSmluZ29vIEhhbgoK\n" - "PiAKPiBUaGFua3MsCj4gRG9uZ2RvbmcKPiDlnKggMjAxNy80LzI1IDE0OjQwLCBKb24gTWFzdGVy\n" - "cyDlhpnpgZM6Cj4gPiBPbiAwNC8xOS8yMDE3IDEyOjQ4IFBNLCBMb3JlbnpvIFBpZXJhbGlzaSB3\n" - "cm90ZToKPiA+Cj4gPj4gT24gc29tZSBwbGF0Zm9ybXMgKGllIEFSTS9BUk02NCkgaW9yZW1hcCBm\n" - "YWlscyB0byBjb21wbHkgd2l0aCB0aGUgUENJCj4gPj4gY29uZmlndXJhdGlvbiBub24tcG9zdGVk\n" - "IHdyaXRlIHRyYW5zYWN0aW9ucyByZXF1aXJlbWVudCwgYmVjYXVzZSBpdAo+ID4+IHByb3ZpZGVz\n" - "IGEgbWVtb3J5IG1hcHBpbmcgdGhhdCBpc3N1ZXMgImJ1ZmZlcmFibGUiIG9yLCBpbiBQQ0kgdGVy\n" - "bXMKPiA+PiAicG9zdGVkIiB3cml0ZSB0cmFuc2FjdGlvbnMuIExpa2V3aXNlLCB0aGUgY3VycmVu\n" - "dCBwY2lfcmVtYXBfaW9zcGFjZSgpCj4gPj4gaW1wbGVtZW50YXRpb24gbWFwcyB0aGUgcGh5c2lj\n" - "YWwgYWRkcmVzcyByYW5nZSB0aGF0IHRoZSBQQ0kgdHJhbnNsYXRlcwo+ID4+IHRvIEkvTyBzcGFj\n" - "ZSBjeWNsZXMgdG8gdmlydHVhbCBhZGRyZXNzIHNwYWNlIHRocm91Z2ggcGdwcm90X2RldmljZSgp\n" - "Cj4gPj4gYXR0cmlidXRlcyB0aGF0IG9uIGVnIEFSTTY0IHByb3ZpZGVzIGEgbWVtb3J5IG1hcHBp\n" - "bmcgaXNzdWluZwo+ID4+IHBvc3RlZCB3cml0ZXMgdHJhbnNhY3Rpb25zLCB3aGljaCBpcyBub3Qg\n" - "UENJIHNwZWNpZmljYXRpb25zIGNvbXBsaWFudC4KPiA+Cj4gPiBTaWRlIG5vdGUgdGhhdCBJJ3Zl\n" - "IHBpbmdlZCBhbGwgb2YgdGhlIEFSTSBzZXJ2ZXIgdmVuZG9ycyBhbmQgYXNrZWQgdGhlbQo+ID4g\n" - "dG8gdmVyaWZ5IHRoaXMgcGF0Y2ggc2VyaWVzIG9uIHRoZWlyIHBsYXRmb3Jtcy4KPiA+Cj4gPiBK\n" - "b24uCj4gPgo+ID4gLgo+ID4KCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f\n" - "X19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVs\n" - "QGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9s\n" - aXN0aW5mby9saW51eC1hcm0ta2VybmVsCg== + "On Wednesday, April 26, 2017 6:54 AM, Dongdong Liu wrote;\n" + "> \n" + "> Tested-by: Dongdong Liu <liudongdong3@huawei.com>\n" + "> \n" + "> I tested the patchset on HiSilicon ARM64 D05 board.It works ok with 82599\n" + "> netcard.\n" + "\n" + "Thank you for testing these patches. HiSilicon PCIe may use Designware-based\n" + "PCIe controller. In my opinion, other Designware-based PCIe controller will\n" + "work properly.\n" + "\n" + "To Dongdong Liu, Khuong Dinh, and other people,\n" + "If possible, can you check the output of 'lspci -v'?\n" + "If you find something different, please share it with us.\n" + "Good luck.\n" + "\n" + "Best regards,\n" + "Jingoo Han\n" + "\n" + "> \n" + "> Thanks,\n" + "> Dongdong\n" + "> ? 2017/4/25 14:40, Jon Masters ??:\n" + "> > On 04/19/2017 12:48 PM, Lorenzo Pieralisi wrote:\n" + "> >\n" + "> >> On some platforms (ie ARM/ARM64) ioremap fails to comply with the PCI\n" + "> >> configuration non-posted write transactions requirement, because it\n" + "> >> provides a memory mapping that issues \"bufferable\" or, in PCI terms\n" + "> >> \"posted\" write transactions. Likewise, the current pci_remap_iospace()\n" + "> >> implementation maps the physical address range that the PCI translates\n" + "> >> to I/O space cycles to virtual address space through pgprot_device()\n" + "> >> attributes that on eg ARM64 provides a memory mapping issuing\n" + "> >> posted writes transactions, which is not PCI specifications compliant.\n" + "> >\n" + "> > Side note that I've pinged all of the ARM server vendors and asked them\n" + "> > to verify this patch series on their platforms.\n" + "> >\n" + "> > Jon.\n" + "> >\n" + "> > .\n" + > > -be83721c4c24feb9b7f5abfa88504ae38bba2f1017bb4f126c1b014ae7214cef +5d27f7a92d76da2bd16007e82ab3935927daaafca7a979cd434b2308777970c3
diff --git a/a/1.txt b/N2/1.txt index afa018e..6543d2f 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,29 +1,41 @@ -T24gV2VkbmVzZGF5LCBBcHJpbCAyNiwgMjAxNyA2OjU0IEFNLCBEb25nZG9uZyBMaXUgd3JvdGU7 -Cj4gCj4gVGVzdGVkLWJ5OiBEb25nZG9uZyBMaXUgPGxpdWRvbmdkb25nM0BodWF3ZWkuY29tPgo+ -IAo+IEkgdGVzdGVkIHRoZSBwYXRjaHNldCBvbiBIaVNpbGljb24gQVJNNjQgRDA1IGJvYXJkLkl0 -IHdvcmtzIG9rIHdpdGggODI1OTkKPiBuZXRjYXJkLgoKVGhhbmsgeW91IGZvciB0ZXN0aW5nIHRo -ZXNlIHBhdGNoZXMuIEhpU2lsaWNvbiBQQ0llIG1heSB1c2UgRGVzaWdud2FyZS1iYXNlZApQQ0ll -IGNvbnRyb2xsZXIuIEluIG15IG9waW5pb24sIG90aGVyIERlc2lnbndhcmUtYmFzZWQgUENJZSBj -b250cm9sbGVyIHdpbGwKd29yayBwcm9wZXJseS4KClRvIERvbmdkb25nIExpdSwgS2h1b25nIERp -bmgsIGFuZCBvdGhlciBwZW9wbGUsCklmIHBvc3NpYmxlLCBjYW4geW91IGNoZWNrIHRoZSBvdXRw -dXQgb2YgJ2xzcGNpIC12Jz8KSWYgeW91IGZpbmQgc29tZXRoaW5nIGRpZmZlcmVudCwgcGxlYXNl -IHNoYXJlIGl0IHdpdGggdXMuCkdvb2QgbHVjay4KCkJlc3QgcmVnYXJkcywKSmluZ29vIEhhbgoK -PiAKPiBUaGFua3MsCj4gRG9uZ2RvbmcKPiDlnKggMjAxNy80LzI1IDE0OjQwLCBKb24gTWFzdGVy -cyDlhpnpgZM6Cj4gPiBPbiAwNC8xOS8yMDE3IDEyOjQ4IFBNLCBMb3JlbnpvIFBpZXJhbGlzaSB3 -cm90ZToKPiA+Cj4gPj4gT24gc29tZSBwbGF0Zm9ybXMgKGllIEFSTS9BUk02NCkgaW9yZW1hcCBm -YWlscyB0byBjb21wbHkgd2l0aCB0aGUgUENJCj4gPj4gY29uZmlndXJhdGlvbiBub24tcG9zdGVk -IHdyaXRlIHRyYW5zYWN0aW9ucyByZXF1aXJlbWVudCwgYmVjYXVzZSBpdAo+ID4+IHByb3ZpZGVz -IGEgbWVtb3J5IG1hcHBpbmcgdGhhdCBpc3N1ZXMgImJ1ZmZlcmFibGUiIG9yLCBpbiBQQ0kgdGVy -bXMKPiA+PiAicG9zdGVkIiB3cml0ZSB0cmFuc2FjdGlvbnMuIExpa2V3aXNlLCB0aGUgY3VycmVu -dCBwY2lfcmVtYXBfaW9zcGFjZSgpCj4gPj4gaW1wbGVtZW50YXRpb24gbWFwcyB0aGUgcGh5c2lj -YWwgYWRkcmVzcyByYW5nZSB0aGF0IHRoZSBQQ0kgdHJhbnNsYXRlcwo+ID4+IHRvIEkvTyBzcGFj -ZSBjeWNsZXMgdG8gdmlydHVhbCBhZGRyZXNzIHNwYWNlIHRocm91Z2ggcGdwcm90X2RldmljZSgp -Cj4gPj4gYXR0cmlidXRlcyB0aGF0IG9uIGVnIEFSTTY0IHByb3ZpZGVzIGEgbWVtb3J5IG1hcHBp -bmcgaXNzdWluZwo+ID4+IHBvc3RlZCB3cml0ZXMgdHJhbnNhY3Rpb25zLCB3aGljaCBpcyBub3Qg -UENJIHNwZWNpZmljYXRpb25zIGNvbXBsaWFudC4KPiA+Cj4gPiBTaWRlIG5vdGUgdGhhdCBJJ3Zl -IHBpbmdlZCBhbGwgb2YgdGhlIEFSTSBzZXJ2ZXIgdmVuZG9ycyBhbmQgYXNrZWQgdGhlbQo+ID4g -dG8gdmVyaWZ5IHRoaXMgcGF0Y2ggc2VyaWVzIG9uIHRoZWlyIHBsYXRmb3Jtcy4KPiA+Cj4gPiBK -b24uCj4gPgo+ID4gLgo+ID4KCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f -X19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVs -QGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9s -aXN0aW5mby9saW51eC1hcm0ta2VybmVsCg== +On Wednesday, April 26, 2017 6:54 AM, Dongdong Liu wrote; +> +> Tested-by: Dongdong Liu <liudongdong3@huawei.com> +> +> I tested the patchset on HiSilicon ARM64 D05 board.It works ok with 82599 +> netcard. + +Thank you for testing these patches. HiSilicon PCIe may use Designware-based +PCIe controller. In my opinion, other Designware-based PCIe controller will +work properly. + +To Dongdong Liu, Khuong Dinh, and other people, +If possible, can you check the output of 'lspci -v'? +If you find something different, please share it with us. +Good luck. + +Best regards, +Jingoo Han + +> +> Thanks, +> Dongdong +> 在 2017/4/25 14:40, Jon Masters 写道: +> > On 04/19/2017 12:48 PM, Lorenzo Pieralisi wrote: +> > +> >> On some platforms (ie ARM/ARM64) ioremap fails to comply with the PCI +> >> configuration non-posted write transactions requirement, because it +> >> provides a memory mapping that issues "bufferable" or, in PCI terms +> >> "posted" write transactions. Likewise, the current pci_remap_iospace() +> >> implementation maps the physical address range that the PCI translates +> >> to I/O space cycles to virtual address space through pgprot_device() +> >> attributes that on eg ARM64 provides a memory mapping issuing +> >> posted writes transactions, which is not PCI specifications compliant. +> > +> > Side note that I've pinged all of the ARM server vendors and asked them +> > to verify this patch series on their platforms. +> > +> > Jon. +> > +> > . +> > diff --git a/a/content_digest b/N2/content_digest index 20a9094..fffb968 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -9,66 +9,78 @@ 'Jon Masters' <jcm@jonmasters.org> 'Lorenzo Pieralisi' <lorenzo.pieralisi@arm.com> " <linux-pci@vger.kernel.org>\0" - "Cc\0'Pratyush Anand' <pratyush.anand@gmail.com>" - 'Gabriele Paoloni' <gabriele.paoloni@huawei.com> - 'Catalin Marinas' <catalin.marinas@arm.com> - 'Shawn Lin' <shawn.lin@rock-chips.com> + "Cc\0<linux-kernel@vger.kernel.org>" + <linux-arm-kernel@lists.infradead.org> + 'Pratyush Anand' <pratyush.anand@gmail.com> + 'Arnd Bergmann' <arnd@arndb.de> + 'Jonathan Corbet' <corbet@lwn.net> 'Will Deacon' <will.deacon@arm.com> - 'Linuxarm' <linuxarm@huawei.com> - 'Michal Simek' <michal.simek@xilinx.com> - 'Thierry Reding' <thierry.reding@gmail.com> + 'Bjorn Helgaas' <bhelgaas@google.com> + 'Mingkai Hu' <mingkai.hu@freescale.com> 'Tanmay Inamdar' <tinamdar@apm.com> - 'Zhou Wang' <wangzhou1@hisilicon.com> - 'Joao Pinto' <Joao.Pinto@synopsys.com> - 'Jonathan Corbet' <corbet@lwn.net> - 'Wenrui Li' <wenrui.li@rock-chips.com> + 'Murali Karicheri' <m-karicheri2@ti.com> 'Russell King' <linux@armlinux.org.uk> 'Bharat Kumar Gogada' <bharat.kumar.gogada@xilinx.com> - 'Murali Karicheri' <m-karicheri2@ti.com> - 'Benjamin Herrenschmidt' <benh@kernel.crashing.org> - 'Arnd Bergmann' <arnd@arndb.de> - 'Jon Mason' <jonmason@broadcom.com> 'Ray Jui' <rjui@broadcom.com> - 'John Garry' <john.garry@huawei.com> - 'Bjorn Helgaas' <bhelgaas@google.com> - 'Mingkai Hu' <mingkai.hu@freescale.com> - linux-arm-kernel@lists.infradead.org - 'Thomas Petazzoni' <thomas.petazzoni@free-electrons.com> - linux-kernel@vger.kernel.org - 'Stanimir Varbanov' <svarbanov@mm-sol.com> + 'Wenrui Li' <wenrui.li@rock-chips.com> + 'Shawn Lin' <shawn.lin@rock-chips.com> 'Minghuan Lian' <minghuan.Lian@freescale.com> + 'Catalin Marinas' <catalin.marinas@arm.com> + 'Jon Mason' <jonmason@broadcom.com> + 'Gabriele Paoloni' <gabriele.paoloni@huawei.com> + 'Thomas Petazzoni' <thomas.petazzoni@free-electrons.com> + 'Joao Pinto' <Joao.Pinto@synopsys.com> + 'Thierry Reding' <thierry.reding@gmail.com> 'Luis R . Rodriguez' <mcgrof@kernel.org> - " 'Roy Zang' <tie-fei.zang@freescale.com>\0" + 'Michal Simek' <michal.simek@xilinx.com> + 'Stanimir Varbanov' <svarbanov@mm-sol.com> + 'Zhou Wang' <wangzhou1@hisilicon.com> + 'Roy Zang' <tie-fei.zang@freescale.com> + 'Benjamin Herrenschmidt' <benh@kernel.crashing.org> + 'John Garry' <john.garry@huawei.com> + " 'Linuxarm' <linuxarm@huawei.com>\0" "\00:1\0" "b\0" - "T24gV2VkbmVzZGF5LCBBcHJpbCAyNiwgMjAxNyA2OjU0IEFNLCBEb25nZG9uZyBMaXUgd3JvdGU7\n" - "Cj4gCj4gVGVzdGVkLWJ5OiBEb25nZG9uZyBMaXUgPGxpdWRvbmdkb25nM0BodWF3ZWkuY29tPgo+\n" - "IAo+IEkgdGVzdGVkIHRoZSBwYXRjaHNldCBvbiBIaVNpbGljb24gQVJNNjQgRDA1IGJvYXJkLkl0\n" - "IHdvcmtzIG9rIHdpdGggODI1OTkKPiBuZXRjYXJkLgoKVGhhbmsgeW91IGZvciB0ZXN0aW5nIHRo\n" - "ZXNlIHBhdGNoZXMuIEhpU2lsaWNvbiBQQ0llIG1heSB1c2UgRGVzaWdud2FyZS1iYXNlZApQQ0ll\n" - "IGNvbnRyb2xsZXIuIEluIG15IG9waW5pb24sIG90aGVyIERlc2lnbndhcmUtYmFzZWQgUENJZSBj\n" - "b250cm9sbGVyIHdpbGwKd29yayBwcm9wZXJseS4KClRvIERvbmdkb25nIExpdSwgS2h1b25nIERp\n" - "bmgsIGFuZCBvdGhlciBwZW9wbGUsCklmIHBvc3NpYmxlLCBjYW4geW91IGNoZWNrIHRoZSBvdXRw\n" - "dXQgb2YgJ2xzcGNpIC12Jz8KSWYgeW91IGZpbmQgc29tZXRoaW5nIGRpZmZlcmVudCwgcGxlYXNl\n" - "IHNoYXJlIGl0IHdpdGggdXMuCkdvb2QgbHVjay4KCkJlc3QgcmVnYXJkcywKSmluZ29vIEhhbgoK\n" - "PiAKPiBUaGFua3MsCj4gRG9uZ2RvbmcKPiDlnKggMjAxNy80LzI1IDE0OjQwLCBKb24gTWFzdGVy\n" - "cyDlhpnpgZM6Cj4gPiBPbiAwNC8xOS8yMDE3IDEyOjQ4IFBNLCBMb3JlbnpvIFBpZXJhbGlzaSB3\n" - "cm90ZToKPiA+Cj4gPj4gT24gc29tZSBwbGF0Zm9ybXMgKGllIEFSTS9BUk02NCkgaW9yZW1hcCBm\n" - "YWlscyB0byBjb21wbHkgd2l0aCB0aGUgUENJCj4gPj4gY29uZmlndXJhdGlvbiBub24tcG9zdGVk\n" - "IHdyaXRlIHRyYW5zYWN0aW9ucyByZXF1aXJlbWVudCwgYmVjYXVzZSBpdAo+ID4+IHByb3ZpZGVz\n" - "IGEgbWVtb3J5IG1hcHBpbmcgdGhhdCBpc3N1ZXMgImJ1ZmZlcmFibGUiIG9yLCBpbiBQQ0kgdGVy\n" - "bXMKPiA+PiAicG9zdGVkIiB3cml0ZSB0cmFuc2FjdGlvbnMuIExpa2V3aXNlLCB0aGUgY3VycmVu\n" - "dCBwY2lfcmVtYXBfaW9zcGFjZSgpCj4gPj4gaW1wbGVtZW50YXRpb24gbWFwcyB0aGUgcGh5c2lj\n" - "YWwgYWRkcmVzcyByYW5nZSB0aGF0IHRoZSBQQ0kgdHJhbnNsYXRlcwo+ID4+IHRvIEkvTyBzcGFj\n" - "ZSBjeWNsZXMgdG8gdmlydHVhbCBhZGRyZXNzIHNwYWNlIHRocm91Z2ggcGdwcm90X2RldmljZSgp\n" - "Cj4gPj4gYXR0cmlidXRlcyB0aGF0IG9uIGVnIEFSTTY0IHByb3ZpZGVzIGEgbWVtb3J5IG1hcHBp\n" - "bmcgaXNzdWluZwo+ID4+IHBvc3RlZCB3cml0ZXMgdHJhbnNhY3Rpb25zLCB3aGljaCBpcyBub3Qg\n" - "UENJIHNwZWNpZmljYXRpb25zIGNvbXBsaWFudC4KPiA+Cj4gPiBTaWRlIG5vdGUgdGhhdCBJJ3Zl\n" - "IHBpbmdlZCBhbGwgb2YgdGhlIEFSTSBzZXJ2ZXIgdmVuZG9ycyBhbmQgYXNrZWQgdGhlbQo+ID4g\n" - "dG8gdmVyaWZ5IHRoaXMgcGF0Y2ggc2VyaWVzIG9uIHRoZWlyIHBsYXRmb3Jtcy4KPiA+Cj4gPiBK\n" - "b24uCj4gPgo+ID4gLgo+ID4KCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f\n" - "X19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVs\n" - "QGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9s\n" - aXN0aW5mby9saW51eC1hcm0ta2VybmVsCg== + "On Wednesday, April 26, 2017 6:54 AM, Dongdong Liu wrote;\n" + "> \n" + "> Tested-by: Dongdong Liu <liudongdong3@huawei.com>\n" + "> \n" + "> I tested the patchset on HiSilicon ARM64 D05 board.It works ok with 82599\n" + "> netcard.\n" + "\n" + "Thank you for testing these patches. HiSilicon PCIe may use Designware-based\n" + "PCIe controller. In my opinion, other Designware-based PCIe controller will\n" + "work properly.\n" + "\n" + "To Dongdong Liu, Khuong Dinh, and other people,\n" + "If possible, can you check the output of 'lspci -v'?\n" + "If you find something different, please share it with us.\n" + "Good luck.\n" + "\n" + "Best regards,\n" + "Jingoo Han\n" + "\n" + "> \n" + "> Thanks,\n" + "> Dongdong\n" + "> \345\234\250 2017/4/25 14:40, Jon Masters \345\206\231\351\201\223:\n" + "> > On 04/19/2017 12:48 PM, Lorenzo Pieralisi wrote:\n" + "> >\n" + "> >> On some platforms (ie ARM/ARM64) ioremap fails to comply with the PCI\n" + "> >> configuration non-posted write transactions requirement, because it\n" + "> >> provides a memory mapping that issues \"bufferable\" or, in PCI terms\n" + "> >> \"posted\" write transactions. Likewise, the current pci_remap_iospace()\n" + "> >> implementation maps the physical address range that the PCI translates\n" + "> >> to I/O space cycles to virtual address space through pgprot_device()\n" + "> >> attributes that on eg ARM64 provides a memory mapping issuing\n" + "> >> posted writes transactions, which is not PCI specifications compliant.\n" + "> >\n" + "> > Side note that I've pinged all of the ARM server vendors and asked them\n" + "> > to verify this patch series on their platforms.\n" + "> >\n" + "> > Jon.\n" + "> >\n" + "> > .\n" + > > -be83721c4c24feb9b7f5abfa88504ae38bba2f1017bb4f126c1b014ae7214cef +febd29756c1d209ad6bd3877ea5d816b40c142c31a86c81a454c6ddb4b91796f
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