[PATCH 0/5] ARMv6 and ARMv7 mm fixes

[will.deacon@arm.com (Will Deacon)]

Hi Russell,

> On Wed, May 25, 2011 at 11:11:27AM -0700, Stephen Boyd wrote:
> > On 05/25/2011 05:50 AM, Will Deacon wrote:
> > > I was planning to CC stable for patches 1 ("ARM: cache: ensure MVA is cacheline
> > > aligned in flush_kern_dcache_area") and 4 ("ARM: mm: fix racy ASID rollover
> > > broadcast on SMP platforms") as these affect existing v6 and v7 cores. The
> > > remainder of the patches, although nice to have, only kick in on A15 as far as
> > > I'm aware (due to aggressive caching of speculative level 1 entries).
> >
> > Would it be appropriate to reorder the series then so patches 1 and 4
> > come first?
> 
> I'm not entirely convinced (4) is the best solution yet, but that's
> mainly becaues I've not thought about it enough yet.  1-3 look fine
> though.

Ok, thanks for looking at those. I'll put 1-3 and 5 into the patch system
since these can be applied irrespective of the other guy. Once you've had
a think about 4, I'd be happy to discuss it on the list if you can think
of a better way to solve the problem.
 
> > > I was hoping for some acks/tested-bys before then since these changes affect a
> > > lot of platforms and the code is fairly scary.
> >
> > Yes the patches look scary. I could give it a test on MSM but I'm not
> > even sure that will help much. Why didn't you Cc Russell on these patches?
> 
> I do tend to read about 90% of linux-arm-kernel, whether its cc'd to
> me or not.  The cc doesn't really affect whether I read it or not.

I figured as much and it saves me having to remember to remove the CC
line when I send to the patch system.

Cheers,

Will