From: Maxime Chevallier <maxime.chevallier@bootlin.com>
To: lizhi2@eswincomputing.com, devicetree@vger.kernel.org,
andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com,
kuba@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, netdev@vger.kernel.org, pabeni@redhat.com,
mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com,
rmk+kernel@armlinux.org.uk, pjw@kernel.org, palmer@dabbelt.com,
aou@eecs.berkeley.edu, alex@ghiti.fr,
linux-riscv@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: ningyu@eswincomputing.com, linmin@eswincomputing.com,
pinkesh.vaghela@einfochips.com, pritesh.patel@einfochips.com,
weishangjuan@eswincomputing.com, horms@kernel.org,
lee@kernel.org, wens@kernel.org
Subject: Re: [PATCH net-next v9 2/6] dt-bindings: ethernet: eswin: add EIC7700 eth1 RX clock inversion variant
Date: Tue, 30 Jun 2026 09:10:34 +0200 [thread overview]
Message-ID: <0083a957-7afb-489b-b2db-de3acd71b445@bootlin.com> (raw)
In-Reply-To: <20260630063239.1158-1-lizhi2@eswincomputing.com>
Hi,
On 6/30/26 08:32, lizhi2@eswincomputing.com wrote:
> From: Zhi Li <lizhi2@eswincomputing.com>
>
> The EIC7700 SoC integrates two GMAC instances. The eth1 MAC exhibits
> different RX clock sampling characteristics due to silicon-inherent
> timing behavior.
>
> The eth1 MAC has a fixed, non-configurable RX clock-to-data skew at the
> MAC input in the order of 4-5 ns. This cannot be compensated solely by
> the standard MAC internal delay configuration and PHY delay, and RX clock
> inversion is required at 1000Mbps for correct sampling.
>
> The eth1 TX path also includes a fixed silicon-inherent delay of
> approximately 2 ns. This delay is always present and cannot be disabled.
> It is therefore part of the effective transmit timing observed on the
> wire.
>
> For the eth1 variant, the valid tx-internal-delay-ps values include
> this fixed delay component. Consequently, the effective range becomes
> 2000-4540 ps (approximately 2000 ps fixed delay plus 0-2540 ps
> programmable delay).
>
> Introduce a dedicated compatible string
> "eswin,eic7700-qos-eth-clk-inversion" to represent the eth1 variant,
> allowing the driver to apply RX clock inversion only when required by
> hardware variant selection.
>
> This keeps SoC-level differentiation without exposing silicon-fixed skew
> as configurable device tree parameters.
>
> To reflect this, model the TX internal delay as a base 0-4540 ps range,
> and constrain valid values per compatible using conditional schema rules.
>
> Update the binding schema as follows:
>
> - Define tx-internal-delay-ps as a base range: 0-4540 ps
> - Add compatible-specific constraints using if/then rules:
> * eswin,eic7700-qos-eth:
> max 2540 ps
> * eswin,eic7700-qos-eth-clk-inversion:
> minimum 2000 ps (effective range 2000-4540 ps)
>
Maybe Andrew can help answering that one, but does it ever make sense to insert
a delay beyond 2540 ps ?
Maxime
WARNING: multiple messages have this Message-ID (diff)
From: Maxime Chevallier <maxime.chevallier@bootlin.com>
To: lizhi2@eswincomputing.com, devicetree@vger.kernel.org,
andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com,
kuba@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, netdev@vger.kernel.org, pabeni@redhat.com,
mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com,
rmk+kernel@armlinux.org.uk, pjw@kernel.org, palmer@dabbelt.com,
aou@eecs.berkeley.edu, alex@ghiti.fr,
linux-riscv@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: ningyu@eswincomputing.com, linmin@eswincomputing.com,
pinkesh.vaghela@einfochips.com, pritesh.patel@einfochips.com,
weishangjuan@eswincomputing.com, horms@kernel.org,
lee@kernel.org, wens@kernel.org
Subject: Re: [PATCH net-next v9 2/6] dt-bindings: ethernet: eswin: add EIC7700 eth1 RX clock inversion variant
Date: Tue, 30 Jun 2026 09:10:34 +0200 [thread overview]
Message-ID: <0083a957-7afb-489b-b2db-de3acd71b445@bootlin.com> (raw)
In-Reply-To: <20260630063239.1158-1-lizhi2@eswincomputing.com>
Hi,
On 6/30/26 08:32, lizhi2@eswincomputing.com wrote:
> From: Zhi Li <lizhi2@eswincomputing.com>
>
> The EIC7700 SoC integrates two GMAC instances. The eth1 MAC exhibits
> different RX clock sampling characteristics due to silicon-inherent
> timing behavior.
>
> The eth1 MAC has a fixed, non-configurable RX clock-to-data skew at the
> MAC input in the order of 4-5 ns. This cannot be compensated solely by
> the standard MAC internal delay configuration and PHY delay, and RX clock
> inversion is required at 1000Mbps for correct sampling.
>
> The eth1 TX path also includes a fixed silicon-inherent delay of
> approximately 2 ns. This delay is always present and cannot be disabled.
> It is therefore part of the effective transmit timing observed on the
> wire.
>
> For the eth1 variant, the valid tx-internal-delay-ps values include
> this fixed delay component. Consequently, the effective range becomes
> 2000-4540 ps (approximately 2000 ps fixed delay plus 0-2540 ps
> programmable delay).
>
> Introduce a dedicated compatible string
> "eswin,eic7700-qos-eth-clk-inversion" to represent the eth1 variant,
> allowing the driver to apply RX clock inversion only when required by
> hardware variant selection.
>
> This keeps SoC-level differentiation without exposing silicon-fixed skew
> as configurable device tree parameters.
>
> To reflect this, model the TX internal delay as a base 0-4540 ps range,
> and constrain valid values per compatible using conditional schema rules.
>
> Update the binding schema as follows:
>
> - Define tx-internal-delay-ps as a base range: 0-4540 ps
> - Add compatible-specific constraints using if/then rules:
> * eswin,eic7700-qos-eth:
> max 2540 ps
> * eswin,eic7700-qos-eth-clk-inversion:
> minimum 2000 ps (effective range 2000-4540 ps)
>
Maybe Andrew can help answering that one, but does it ever make sense to insert
a delay beyond 2540 ps ?
Maxime
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2026-06-30 7:10 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-30 6:31 [PATCH net-next v9 0/6] net: stmmac: eic7700: add eth1 variant support and update delay bindings lizhi2
2026-06-30 6:31 ` lizhi2
2026-06-30 6:32 ` [PATCH net-next v9 1/6] dt-bindings: ethernet: eswin: relax internal delay model to range-based constraints lizhi2
2026-06-30 6:32 ` lizhi2
2026-06-30 6:32 ` [PATCH net-next v9 2/6] dt-bindings: ethernet: eswin: add EIC7700 eth1 RX clock inversion variant lizhi2
2026-06-30 6:32 ` lizhi2
2026-06-30 7:10 ` Maxime Chevallier [this message]
2026-06-30 7:10 ` Maxime Chevallier
2026-06-30 17:14 ` Conor Dooley
2026-06-30 17:14 ` Conor Dooley
2026-06-30 6:32 ` [PATCH net-next v9 3/6] net: stmmac: eic7700: make RGMII delay properties optional lizhi2
2026-06-30 6:32 ` lizhi2
2026-06-30 6:33 ` [PATCH net-next v9 4/6] net: stmmac: eic7700: add support for eth1 clock inversion variant lizhi2
2026-06-30 6:33 ` lizhi2
2026-06-30 6:34 ` [PATCH net-next v9 5/6] dt-bindings: mfd: syscon: add ESWIN EIC7700 compatible lizhi2
2026-06-30 6:34 ` lizhi2
2026-06-30 6:34 ` [PATCH net-next v9 6/6] riscv: dts: eswin: eic7700-hifive-premier-p550: enable Ethernet controller lizhi2
2026-06-30 6:34 ` lizhi2
2026-07-01 6:35 ` sashiko-bot
2026-07-02 8:52 ` 李志
2026-07-02 13:22 ` Andrew Lunn
2026-07-03 1:50 ` 李志
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=0083a957-7afb-489b-b2db-de3acd71b445@bootlin.com \
--to=maxime.chevallier@bootlin.com \
--cc=alex@ghiti.fr \
--cc=alexandre.torgue@foss.st.com \
--cc=andrew+netdev@lunn.ch \
--cc=aou@eecs.berkeley.edu \
--cc=conor+dt@kernel.org \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=edumazet@google.com \
--cc=horms@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=kuba@kernel.org \
--cc=lee@kernel.org \
--cc=linmin@eswincomputing.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux-stm32@st-md-mailman.stormreply.com \
--cc=lizhi2@eswincomputing.com \
--cc=mcoquelin.stm32@gmail.com \
--cc=netdev@vger.kernel.org \
--cc=ningyu@eswincomputing.com \
--cc=pabeni@redhat.com \
--cc=palmer@dabbelt.com \
--cc=pinkesh.vaghela@einfochips.com \
--cc=pjw@kernel.org \
--cc=pritesh.patel@einfochips.com \
--cc=rmk+kernel@armlinux.org.uk \
--cc=robh@kernel.org \
--cc=weishangjuan@eswincomputing.com \
--cc=wens@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.