From: Jungseok Lee <jays.lee@samsung.com>
To: 'Catalin Marinas' <catalin.marinas@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu,
'Marc Zyngier' <Marc.Zyngier@arm.com>,
'Christoffer Dall' <christoffer.dall@linaro.org>,
linux-kernel@vger.kernel.org,
'linux-samsung-soc' <linux-samsung-soc@vger.kernel.org>,
steve.capper@linaro.org, sungjinn.chung@samsung.com,
'Arnd Bergmann' <arnd@arndb.de>,
kgene.kim@samsung.com, ilho215.lee@samsung.com
Subject: Re: [PATCH v4 4/7] arm64: Add a description on 48-bit address space with 4KB pages
Date: Wed, 30 Apr 2014 15:41:40 +0900 [thread overview]
Message-ID: <008e01cf643f$3e67eff0$bb37cfd0$@samsung.com> (raw)
In-Reply-To: <20140429144759.GL17007@arm.com>
On Tuesday, April 29, 2014 11:48 PM, Catalin Marinas wrote:
> On Tue, Apr 29, 2014 at 05:59:27AM +0100, Jungseok Lee wrote:
> > --- a/Documentation/arm64/memory.txt
> > +++ b/Documentation/arm64/memory.txt
> > @@ -8,10 +8,11 @@ This document describes the virtual memory layout
> > used by the AArch64 Linux kernel. The architecture allows up to 4
> > levels of translation tables with a 4KB page size and up to 3 levels with a 64KB page size.
> >
> > -AArch64 Linux uses 3 levels of translation tables with the 4KB page
> > -configuration, allowing 39-bit (512GB) virtual addresses for both
> > user -and kernel. With 64KB pages, only 2 levels of translation tables
> > are -used but the memory layout is the same.
> > +AArch64 Linux uses 3 levels and 4 levels of translation tables with
> > +the 4KB page configuration, allowing 39-bit (512GB) and 48-bit
> > +(256TB) virtual addresses, respectively, for both user and kernel.
> > +With 64KB pages, only 2 levels of translation tables are used but the
> > +memory layout is the same.
>
> Any reason why we couldn't use 48-bit address space with 64K pages (implying 3 levels)?
No technical reason.
Since 64K+3levels is not implemented in this set, I didn't add it.
Should 64K+3levels be prepared in this patchset?
> > -AArch64 Linux memory layout with 64KB pages:
> > +AArch64 Linux memory layout with 4KB pages + 4 levels:
> > +
> > +Start End Size Use
> > +-----------------------------------------------------------------------
> > +0000000000000000 0000ffffffffffff 256TB user
> > +
> > +ffff000000000000 ffff7bfffffeffff ~124TB vmalloc
>
> BTW, maybe as a separate patch we should change the "end" to be exclusive. It becomes harder to modify
> (I've been through this a few times already ;)) and even follow the changes.
Does "exclusive" mean that 0000ffffffffffff is changed to 0001000000000000?
Or Does it mean that "End" column is dropped?
If you are okay, I will make it as a separate patch.
Best Regards
Jungseok Lee
WARNING: multiple messages have this Message-ID (diff)
From: jays.lee@samsung.com (Jungseok Lee)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 4/7] arm64: Add a description on 48-bit address space with 4KB pages
Date: Wed, 30 Apr 2014 15:41:40 +0900 [thread overview]
Message-ID: <008e01cf643f$3e67eff0$bb37cfd0$@samsung.com> (raw)
In-Reply-To: <20140429144759.GL17007@arm.com>
On Tuesday, April 29, 2014 11:48 PM, Catalin Marinas wrote:
> On Tue, Apr 29, 2014 at 05:59:27AM +0100, Jungseok Lee wrote:
> > --- a/Documentation/arm64/memory.txt
> > +++ b/Documentation/arm64/memory.txt
> > @@ -8,10 +8,11 @@ This document describes the virtual memory layout
> > used by the AArch64 Linux kernel. The architecture allows up to 4
> > levels of translation tables with a 4KB page size and up to 3 levels with a 64KB page size.
> >
> > -AArch64 Linux uses 3 levels of translation tables with the 4KB page
> > -configuration, allowing 39-bit (512GB) virtual addresses for both
> > user -and kernel. With 64KB pages, only 2 levels of translation tables
> > are -used but the memory layout is the same.
> > +AArch64 Linux uses 3 levels and 4 levels of translation tables with
> > +the 4KB page configuration, allowing 39-bit (512GB) and 48-bit
> > +(256TB) virtual addresses, respectively, for both user and kernel.
> > +With 64KB pages, only 2 levels of translation tables are used but the
> > +memory layout is the same.
>
> Any reason why we couldn't use 48-bit address space with 64K pages (implying 3 levels)?
No technical reason.
Since 64K+3levels is not implemented in this set, I didn't add it.
Should 64K+3levels be prepared in this patchset?
> > -AArch64 Linux memory layout with 64KB pages:
> > +AArch64 Linux memory layout with 4KB pages + 4 levels:
> > +
> > +Start End Size Use
> > +-----------------------------------------------------------------------
> > +0000000000000000 0000ffffffffffff 256TB user
> > +
> > +ffff000000000000 ffff7bfffffeffff ~124TB vmalloc
>
> BTW, maybe as a separate patch we should change the "end" to be exclusive. It becomes harder to modify
> (I've been through this a few times already ;)) and even follow the changes.
Does "exclusive" mean that 0000ffffffffffff is changed to 0001000000000000?
Or Does it mean that "End" column is dropped?
If you are okay, I will make it as a separate patch.
Best Regards
Jungseok Lee
next prev parent reply other threads:[~2014-04-30 6:41 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-29 4:59 [PATCH v4 4/7] arm64: Add a description on 48-bit address space with 4KB pages Jungseok Lee
2014-04-29 4:59 ` Jungseok Lee
2014-04-29 14:47 ` Catalin Marinas
2014-04-29 14:47 ` Catalin Marinas
2014-04-30 6:41 ` Jungseok Lee [this message]
2014-04-30 6:41 ` Jungseok Lee
2014-04-30 13:12 ` Catalin Marinas
2014-04-30 13:12 ` Catalin Marinas
2014-05-01 0:53 ` Jungseok Lee
2014-05-01 0:53 ` Jungseok Lee
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