From: Pavel Fedin <p.fedin@samsung.com>
To: 'Eric Auger' <eric.auger@linaro.org>,
eric.auger@st.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org,
peter.maydell@linaro.org, alex.williamson@redhat.com,
pranav.sawargaonkar@gmail.com, pbonzini@redhat.com,
agraf@suse.de
Cc: Bharat.Bhushan@freescale.com, suravee.suthikulpanit@amd.com,
christoffer.dall@linaro.org
Subject: Re: [Qemu-arm] [RFC 6/7] hw: arm: virt: register reserved IOVA region
Date: Thu, 28 Jan 2016 10:10:06 +0300 [thread overview]
Message-ID: <00a901d1599a$eba575a0$c2f060e0$@samsung.com> (raw)
In-Reply-To: <1453902715-25304-7-git-send-email-eric.auger@linaro.org>
Hello!
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 3839c68..7eaf8be 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -125,6 +125,7 @@ static const MemMapEntry a15memmap[] = {
> [VIRT_GPIO] = { 0x09030000, 0x00001000 },
> [VIRT_SECURE_UART] = { 0x09040000, 0x00001000 },
> [VIRT_MMIO] = { 0x0a000000, 0x00000200 },
> + [VIRT_RESERVED] = { 0x0be00000, 0x00100000 },
Looks like with this approach we would need to add this to all machine models which make use of PCI. But is it a good idea? As far
as i understand, the only requirement for this region is not to clash with guest RAM addresses. So, can we instead have some code,
which automatically finds some place, based on the size? For now we hardcode the size to 0x00100000, but in future we could query
the host for the size, because it's still host's MSI controller.
Kind regards,
Pavel Fedin
Senior Engineer
Samsung Electronics Research center Russia
WARNING: multiple messages have this Message-ID (diff)
From: Pavel Fedin <p.fedin@samsung.com>
To: 'Eric Auger' <eric.auger@linaro.org>,
eric.auger@st.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org,
peter.maydell@linaro.org, alex.williamson@redhat.com,
pranav.sawargaonkar@gmail.com, pbonzini@redhat.com,
agraf@suse.de
Cc: Bharat.Bhushan@freescale.com, suravee.suthikulpanit@amd.com,
christoffer.dall@linaro.org
Subject: Re: [Qemu-devel] [RFC 6/7] hw: arm: virt: register reserved IOVA region
Date: Thu, 28 Jan 2016 10:10:06 +0300 [thread overview]
Message-ID: <00a901d1599a$eba575a0$c2f060e0$@samsung.com> (raw)
In-Reply-To: <1453902715-25304-7-git-send-email-eric.auger@linaro.org>
Hello!
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 3839c68..7eaf8be 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -125,6 +125,7 @@ static const MemMapEntry a15memmap[] = {
> [VIRT_GPIO] = { 0x09030000, 0x00001000 },
> [VIRT_SECURE_UART] = { 0x09040000, 0x00001000 },
> [VIRT_MMIO] = { 0x0a000000, 0x00000200 },
> + [VIRT_RESERVED] = { 0x0be00000, 0x00100000 },
Looks like with this approach we would need to add this to all machine models which make use of PCI. But is it a good idea? As far
as i understand, the only requirement for this region is not to clash with guest RAM addresses. So, can we instead have some code,
which automatically finds some place, based on the size? For now we hardcode the size to 0x00100000, but in future we could query
the host for the size, because it's still host's MSI controller.
Kind regards,
Pavel Fedin
Senior Engineer
Samsung Electronics Research center Russia
next prev parent reply other threads:[~2016-01-28 7:10 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-27 13:51 [Qemu-arm] [RFC 0/7] KVM PCI/MSI passthrough with mach-virt Eric Auger
2016-01-27 13:51 ` [Qemu-devel] " Eric Auger
2016-01-27 13:51 ` [Qemu-devel] [RFC 1/7] linux-headers: partial update for VFIO reserved IOVA registration Eric Auger
2016-01-27 13:51 ` [Qemu-arm] [RFC 2/7] Add a function to determine interrupt number for INTx routing Eric Auger
2016-01-27 13:51 ` [Qemu-devel] " Eric Auger
2016-01-27 13:51 ` [Qemu-arm] [RFC 3/7] Generic PCIe host bridge INTx determination " Eric Auger
2016-01-27 13:51 ` [Qemu-devel] " Eric Auger
2016-01-27 13:51 ` [Qemu-arm] [RFC 4/7] hw: vfio: common: introduce vfio_register_reserved_iova Eric Auger
2016-01-27 13:51 ` [Qemu-devel] " Eric Auger
2016-01-27 13:51 ` [Qemu-arm] [RFC 5/7] memory: add reserved_iova region type Eric Auger
2016-01-27 13:51 ` [Qemu-devel] " Eric Auger
2016-01-27 13:51 ` [Qemu-arm] [RFC 6/7] hw: arm: virt: register reserved IOVA region Eric Auger
2016-01-27 13:51 ` [Qemu-devel] " Eric Auger
2016-01-28 7:10 ` Pavel Fedin [this message]
2016-01-28 7:10 ` Pavel Fedin
2016-01-28 9:39 ` [Qemu-arm] " Eric Auger
2016-01-28 9:39 ` [Qemu-devel] " Eric Auger
2016-01-28 10:10 ` [Qemu-arm] " Peter Maydell
2016-01-28 10:10 ` [Qemu-devel] " Peter Maydell
2016-01-28 10:20 ` [Qemu-arm] " Eric Auger
2016-01-28 10:20 ` [Qemu-devel] " Eric Auger
2016-01-27 13:51 ` [Qemu-arm] [RFC 7/7] hw: vfio: common: adapt vfio_listeners for reserved_iova region Eric Auger
2016-01-27 13:51 ` [Qemu-devel] " Eric Auger
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='00a901d1599a$eba575a0$c2f060e0$@samsung.com' \
--to=p.fedin@samsung.com \
--cc=Bharat.Bhushan@freescale.com \
--cc=agraf@suse.de \
--cc=alex.williamson@redhat.com \
--cc=christoffer.dall@linaro.org \
--cc=eric.auger@linaro.org \
--cc=eric.auger@st.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=pranav.sawargaonkar@gmail.com \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=suravee.suthikulpanit@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.