* [RESEND PATCH] ARM: dts: lpc32xx: set default parent clock for pwm1 & pwm2
@ 2016-09-07 19:37 ` Sylvain Lemieux
0 siblings, 0 replies; 6+ messages in thread
From: Sylvain Lemieux @ 2016-09-07 19:37 UTC (permalink / raw)
To: linux-arm-kernel
From: Sylvain Lemieux <slemieux@tycoint.com>
The change setup the peripheral clock (PERIPH_CLK) as the default
parent clock for PWM1 & PWM2.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
---
arch/arm/boot/dts/lpc32xx.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index e295e1e..ed85b95 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -469,6 +469,9 @@
compatible = "nxp,lpc3220-pwm";
reg = <0x4005C000 0x4>;
clocks = <&clk LPC32XX_CLK_PWM1>;
+ assigned-clocks = <&clk LPC32XX_CLK_PWM1>,
+ <&clk LPC32XX_CLK_PERIPH>;
+ assigned-clock-parents = <&clk LPC32XX_CLK_PERIPH>;
status = "disabled";
};
@@ -476,6 +479,9 @@
compatible = "nxp,lpc3220-pwm";
reg = <0x4005C004 0x4>;
clocks = <&clk LPC32XX_CLK_PWM2>;
+ assigned-clocks = <&clk LPC32XX_CLK_PWM2>,
+ <&clk LPC32XX_CLK_PERIPH>;
+ assigned-clock-parents = <&clk LPC32XX_CLK_PERIPH>;
status = "disabled";
};
--
1.8.3.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [RESEND PATCH] ARM: dts: lpc32xx: set default parent clock for pwm1 & pwm2
@ 2016-09-07 19:37 ` Sylvain Lemieux
0 siblings, 0 replies; 6+ messages in thread
From: Sylvain Lemieux @ 2016-09-07 19:37 UTC (permalink / raw)
To: vz-ChpfBGZJDbMAvxtiuMwx3w, robh+dt-DgEjT+Ai2ygdnm+yROfE0A
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
From: Sylvain Lemieux <slemieux-1xCVI8+nB4ZBDgjK7y7TUQ@public.gmane.org>
The change setup the peripheral clock (PERIPH_CLK) as the default
parent clock for PWM1 & PWM2.
Signed-off-by: Sylvain Lemieux <slemieux-1xCVI8+nB4ZBDgjK7y7TUQ@public.gmane.org>
---
arch/arm/boot/dts/lpc32xx.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index e295e1e..ed85b95 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -469,6 +469,9 @@
compatible = "nxp,lpc3220-pwm";
reg = <0x4005C000 0x4>;
clocks = <&clk LPC32XX_CLK_PWM1>;
+ assigned-clocks = <&clk LPC32XX_CLK_PWM1>,
+ <&clk LPC32XX_CLK_PERIPH>;
+ assigned-clock-parents = <&clk LPC32XX_CLK_PERIPH>;
status = "disabled";
};
@@ -476,6 +479,9 @@
compatible = "nxp,lpc3220-pwm";
reg = <0x4005C004 0x4>;
clocks = <&clk LPC32XX_CLK_PWM2>;
+ assigned-clocks = <&clk LPC32XX_CLK_PWM2>,
+ <&clk LPC32XX_CLK_PERIPH>;
+ assigned-clock-parents = <&clk LPC32XX_CLK_PERIPH>;
status = "disabled";
};
--
1.8.3.1
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* [RESEND PATCH] ARM: dts: lpc32xx: set default parent clock for pwm1 & pwm2
@ 2016-09-07 23:46 ` Vladimir Zapolskiy
0 siblings, 0 replies; 6+ messages in thread
From: Vladimir Zapolskiy @ 2016-09-07 23:46 UTC (permalink / raw)
To: linux-arm-kernel
Hi Sylvain,
On 07.09.2016 22:37, Sylvain Lemieux wrote:
> From: Sylvain Lemieux <slemieux@tycoint.com>
>
> The change setup the peripheral clock (PERIPH_CLK) as the default
> parent clock for PWM1 & PWM2.
>
> Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
> ---
> arch/arm/boot/dts/lpc32xx.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
> index e295e1e..ed85b95 100644
> --- a/arch/arm/boot/dts/lpc32xx.dtsi
> +++ b/arch/arm/boot/dts/lpc32xx.dtsi
> @@ -469,6 +469,9 @@
> compatible = "nxp,lpc3220-pwm";
> reg = <0x4005C000 0x4>;
> clocks = <&clk LPC32XX_CLK_PWM1>;
> + assigned-clocks = <&clk LPC32XX_CLK_PWM1>,
> + <&clk LPC32XX_CLK_PERIPH>;
I believe here "assigned-clocks = <&clk LPC32XX_CLK_PWM1>;" would be
good enough. In this context the second clock could be potentially
specified, if you are going to set its rate, but because it is a common
clock for many controllers it should not be done from a PWM device node.
> + assigned-clock-parents = <&clk LPC32XX_CLK_PERIPH>;
> status = "disabled";
> };
>
> @@ -476,6 +479,9 @@
> compatible = "nxp,lpc3220-pwm";
> reg = <0x4005C004 0x4>;
> clocks = <&clk LPC32XX_CLK_PWM2>;
> + assigned-clocks = <&clk LPC32XX_CLK_PWM2>,
> + <&clk LPC32XX_CLK_PERIPH>;
Same as above.
Please remove the second <&clk LPC32XX_CLK_PERIPH> value from the
assigned-clocks property.
> + assigned-clock-parents = <&clk LPC32XX_CLK_PERIPH>;
> status = "disabled";
> };
>
>
--
With best wishes,
Vladimir
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RESEND PATCH] ARM: dts: lpc32xx: set default parent clock for pwm1 & pwm2
@ 2016-09-07 23:46 ` Vladimir Zapolskiy
0 siblings, 0 replies; 6+ messages in thread
From: Vladimir Zapolskiy @ 2016-09-07 23:46 UTC (permalink / raw)
To: Sylvain Lemieux, robh+dt-DgEjT+Ai2ygdnm+yROfE0A
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
Hi Sylvain,
On 07.09.2016 22:37, Sylvain Lemieux wrote:
> From: Sylvain Lemieux <slemieux-1xCVI8+nB4ZBDgjK7y7TUQ@public.gmane.org>
>
> The change setup the peripheral clock (PERIPH_CLK) as the default
> parent clock for PWM1 & PWM2.
>
> Signed-off-by: Sylvain Lemieux <slemieux-1xCVI8+nB4ZBDgjK7y7TUQ@public.gmane.org>
> ---
> arch/arm/boot/dts/lpc32xx.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
> index e295e1e..ed85b95 100644
> --- a/arch/arm/boot/dts/lpc32xx.dtsi
> +++ b/arch/arm/boot/dts/lpc32xx.dtsi
> @@ -469,6 +469,9 @@
> compatible = "nxp,lpc3220-pwm";
> reg = <0x4005C000 0x4>;
> clocks = <&clk LPC32XX_CLK_PWM1>;
> + assigned-clocks = <&clk LPC32XX_CLK_PWM1>,
> + <&clk LPC32XX_CLK_PERIPH>;
I believe here "assigned-clocks = <&clk LPC32XX_CLK_PWM1>;" would be
good enough. In this context the second clock could be potentially
specified, if you are going to set its rate, but because it is a common
clock for many controllers it should not be done from a PWM device node.
> + assigned-clock-parents = <&clk LPC32XX_CLK_PERIPH>;
> status = "disabled";
> };
>
> @@ -476,6 +479,9 @@
> compatible = "nxp,lpc3220-pwm";
> reg = <0x4005C004 0x4>;
> clocks = <&clk LPC32XX_CLK_PWM2>;
> + assigned-clocks = <&clk LPC32XX_CLK_PWM2>,
> + <&clk LPC32XX_CLK_PERIPH>;
Same as above.
Please remove the second <&clk LPC32XX_CLK_PERIPH> value from the
assigned-clocks property.
> + assigned-clock-parents = <&clk LPC32XX_CLK_PERIPH>;
> status = "disabled";
> };
>
>
--
With best wishes,
Vladimir
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [RESEND PATCH] ARM: dts: lpc32xx: set default parent clock for pwm1 & pwm2
@ 2016-09-08 17:31 ` Sylvain Lemieux
0 siblings, 0 replies; 6+ messages in thread
From: Sylvain Lemieux @ 2016-09-08 17:31 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, 2016-09-08 at 02:46 +0300, Vladimir Zapolskiy wrote:
> Hi Sylvain,
>
> On 07.09.2016 22:37, Sylvain Lemieux wrote:
> > From: Sylvain Lemieux <slemieux@tycoint.com>
> >
> > The change setup the peripheral clock (PERIPH_CLK) as the default
> > parent clock for PWM1 & PWM2.
> >
> > Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
> > ---
> > arch/arm/boot/dts/lpc32xx.dtsi | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/lpc32xx.dtsi
> > b/arch/arm/boot/dts/lpc32xx.dtsi index e295e1e..ed85b95 100644
> > --- a/arch/arm/boot/dts/lpc32xx.dtsi
> > +++ b/arch/arm/boot/dts/lpc32xx.dtsi
> > @@ -469,6 +469,9 @@
> > compatible = "nxp,lpc3220-pwm";
> > reg = <0x4005C000 0x4>;
> > clocks = <&clk LPC32XX_CLK_PWM1>;
> > + assigned-clocks = <&clk LPC32XX_CLK_PWM1>,
> > + <&clk LPC32XX_CLK_PERIPH>;
>
> I believe here "assigned-clocks = <&clk LPC32XX_CLK_PWM1>;" would be good
> enough. In this context the second clock could be potentially specified,
if you
> are going to set its rate, but because it is a common clock for many
controllers it
> should not be done from a PWM device node.
>
Good catch!
Thanks for the feedback; I will submit a version 2 of the patch.
> > + assigned-clock-parents = <&clk
> LPC32XX_CLK_PERIPH>;
> > status = "disabled";
> > };
> >
> > @@ -476,6 +479,9 @@
> > compatible = "nxp,lpc3220-pwm";
> > reg = <0x4005C004 0x4>;
> > clocks = <&clk LPC32XX_CLK_PWM2>;
> > + assigned-clocks = <&clk LPC32XX_CLK_PWM2>,
> > + <&clk LPC32XX_CLK_PERIPH>;
>
> Same as above.
>
> Please remove the second <&clk LPC32XX_CLK_PERIPH> value from the
> assigned-clocks property.
>
> > + assigned-clock-parents = <&clk
> LPC32XX_CLK_PERIPH>;
> > status = "disabled";
> > };
> >
> >
>
> --
> With best wishes,
> Vladimir
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [RESEND PATCH] ARM: dts: lpc32xx: set default parent clock for pwm1 & pwm2
@ 2016-09-08 17:31 ` Sylvain Lemieux
0 siblings, 0 replies; 6+ messages in thread
From: Sylvain Lemieux @ 2016-09-08 17:31 UTC (permalink / raw)
To: 'Vladimir Zapolskiy', robh+dt-DgEjT+Ai2ygdnm+yROfE0A
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
On Thu, 2016-09-08 at 02:46 +0300, Vladimir Zapolskiy wrote:
> Hi Sylvain,
>
> On 07.09.2016 22:37, Sylvain Lemieux wrote:
> > From: Sylvain Lemieux <slemieux-1xCVI8+nB4ZBDgjK7y7TUQ@public.gmane.org>
> >
> > The change setup the peripheral clock (PERIPH_CLK) as the default
> > parent clock for PWM1 & PWM2.
> >
> > Signed-off-by: Sylvain Lemieux <slemieux-1xCVI8+nB4ZBDgjK7y7TUQ@public.gmane.org>
> > ---
> > arch/arm/boot/dts/lpc32xx.dtsi | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/lpc32xx.dtsi
> > b/arch/arm/boot/dts/lpc32xx.dtsi index e295e1e..ed85b95 100644
> > --- a/arch/arm/boot/dts/lpc32xx.dtsi
> > +++ b/arch/arm/boot/dts/lpc32xx.dtsi
> > @@ -469,6 +469,9 @@
> > compatible = "nxp,lpc3220-pwm";
> > reg = <0x4005C000 0x4>;
> > clocks = <&clk LPC32XX_CLK_PWM1>;
> > + assigned-clocks = <&clk LPC32XX_CLK_PWM1>,
> > + <&clk LPC32XX_CLK_PERIPH>;
>
> I believe here "assigned-clocks = <&clk LPC32XX_CLK_PWM1>;" would be good
> enough. In this context the second clock could be potentially specified,
if you
> are going to set its rate, but because it is a common clock for many
controllers it
> should not be done from a PWM device node.
>
Good catch!
Thanks for the feedback; I will submit a version 2 of the patch.
> > + assigned-clock-parents = <&clk
> LPC32XX_CLK_PERIPH>;
> > status = "disabled";
> > };
> >
> > @@ -476,6 +479,9 @@
> > compatible = "nxp,lpc3220-pwm";
> > reg = <0x4005C004 0x4>;
> > clocks = <&clk LPC32XX_CLK_PWM2>;
> > + assigned-clocks = <&clk LPC32XX_CLK_PWM2>,
> > + <&clk LPC32XX_CLK_PERIPH>;
>
> Same as above.
>
> Please remove the second <&clk LPC32XX_CLK_PERIPH> value from the
> assigned-clocks property.
>
> > + assigned-clock-parents = <&clk
> LPC32XX_CLK_PERIPH>;
> > status = "disabled";
> > };
> >
> >
>
> --
> With best wishes,
> Vladimir
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^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-09-08 17:31 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2016-09-07 19:37 [RESEND PATCH] ARM: dts: lpc32xx: set default parent clock for pwm1 & pwm2 Sylvain Lemieux
2016-09-07 19:37 ` Sylvain Lemieux
2016-09-07 23:46 ` Vladimir Zapolskiy
2016-09-07 23:46 ` Vladimir Zapolskiy
2016-09-08 17:31 ` Sylvain Lemieux
2016-09-08 17:31 ` Sylvain Lemieux
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