Re: [PATCH v2 00/13] gpu: nova-core: add Turing support

[John Hubbard <jhubbard@nvidia.com>]

On 12/1/25 3:39 PM, Timur Tabi wrote:
> This patch set adds basic support for pre-booting GSP-RM
> on Turing.
> 
> There is also partial support for GA100, but it's currently not
> fully implemented.  GA100 is considered experimental in Nouveau,
> and so it hasn't been tested with NovaCore either.
> 
> That latest linux-firmware.git is required because it contains the
> Generic Bootloader image that has not yet been propogated to
> distros.
> 

From an initial skim read of the patches, this is looking pretty clean.
I'll try to do a full review in the next day or two


thanks,
-- 
John Hubbard

> Summary of changes:
> 
> 1. Introduce non-secure IMEM support.  For GA102 and later, only secure IMEM
> is used.
> 2. Because of non-secure IMEM, Turing booter firmware images need some of
> the headers parsed differently for stuff like the load target address.
> 3. Add support the tu10x firmware signature section in the ELF image.
> 4. Add several new registers used only on Turing.
> 5. Some functions that were considered generic Falcon operations are
> actually different on Turing vs GA102+, so they are moved to the HAL.
> 6. The FRTS FWSEC firmware in VBIOS uses a different version of the
> descriptor header.
> 7. I don't know why this isn't necessary on GA102+, but GSP-RM
> LIBOS args struct needs to have its 'size' field aligned to 4KB.
> 8. Turing Falcons do not support DMA, so PIO is used to copy images
> into IMEM/DMEM.
> 
> Changes from v1:
> 1. Replaced pointer/length with slice in PIO code.
> 2. Added RFC patch to implement trait object FalconUCodeDescriptor .
> 3. Added comments to new registers, structs, and other places.
> 4. Fixed all CLIPPY complaints.
> 5. Added supports_dma() method for Falcon HAL
> 6. Renamed ImemSec and ImemNs to ImemSecure and ImemNonSecure
> 7. Several other miscellaneous fixes based on review comments.
> 
> Timur Tabi (13):
>   gpu: nova-core: rename Imem to ImemSecure
>   gpu: nova-core: add ImemNonSecure section infrastructure
>   gpu: nova-core: support header parsing on Turing/GA100
>   gpu: nova-core: add support for Turing/GA100 fwsignature
>   gpu: nova-core: add NV_PFALCON_FALCON_DMATRFCMD::with_falcon_mem()
>   gpu: nova-core: add Turing boot registers
>   gpu: nova-core: move some functions into the HAL
>   gpu: nova-core: Add basic Turing HAL
>   gpu: nova-core: add Falcon HAL method supports_dma()
>   gpu: nova-core: add FalconUCodeDescV2 support
>   gpu: nova-core: align LibosMemoryRegionInitArgument size to page size
>   gpu: nova-core: add PIO support for loading firmware images
>   [RFC] gpu: nova: implement trait object FalconUCodeDescriptor
> 
>  drivers/gpu/nova-core/falcon.rs           | 226 +++++++++++++++++-----
>  drivers/gpu/nova-core/falcon/hal.rs       |  19 +-
>  drivers/gpu/nova-core/falcon/hal/ga102.rs |  47 +++++
>  drivers/gpu/nova-core/falcon/hal/tu102.rs |  78 ++++++++
>  drivers/gpu/nova-core/firmware.rs         | 135 ++++++++++++-
>  drivers/gpu/nova-core/firmware/booter.rs  |  46 ++++-
>  drivers/gpu/nova-core/firmware/fwsec.rs   | 215 +++++++++++++++++---
>  drivers/gpu/nova-core/firmware/gsp.rs     |   9 +-
>  drivers/gpu/nova-core/gsp/boot.rs         |  10 +-
>  drivers/gpu/nova-core/gsp/fw.rs           |   2 +-
>  drivers/gpu/nova-core/regs.rs             |  73 +++++++
>  drivers/gpu/nova-core/vbios.rs            |  73 ++++---
>  12 files changed, 805 insertions(+), 128 deletions(-)
>  create mode 100644 drivers/gpu/nova-core/falcon/hal/tu102.rs
> 
> 
> base-commit: 57dc2ea0b7bdb828c5d966d9135c28fe854933a4
> prerequisite-patch-id: fcf54aca59a74f7ca677919565b427d18406462c