From: Timur Tabi <ttabi@nvidia.com>
To: "nouveau@lists.freedesktop.org" <nouveau@lists.freedesktop.org>,
Joel Fernandes <joelagnelf@nvidia.com>,
"dakr@kernel.org" <dakr@kernel.org>,
"lyude@redhat.com" <lyude@redhat.com>,
Alexandre Courbot <acourbot@nvidia.com>,
John Hubbard <jhubbard@nvidia.com>,
"rust-for-linux@vger.kernel.org" <rust-for-linux@vger.kernel.org>
Subject: Re: [PATCH v2 12/13] gpu: nova-core: add PIO support for loading firmware images
Date: Tue, 2 Dec 2025 23:48:08 +0000 [thread overview]
Message-ID: <44986645d9ecb62887f8d3506533d4ef369af69a.camel@nvidia.com> (raw)
In-Reply-To: <df1e24cf-6983-4d17-8652-15adca8281ea@nvidia.com>
On Tue, 2025-12-02 at 15:40 -0800, John Hubbard wrote:
> In fact, I just finished looking through my Hopper/Blackwell PIO code, which
> also needs 4-byte alignment, and concluded that returning -EINVAL for misaligned
> data seems to be the appropriate way to handle things.
I've added this for v3:
// Rejecting misaligned images here allows us to avoid checking
// inside the loops.
if img.len() % 4 != 0 {
return Err(EINVAL);
}
And I manually create the &[u8; 4] now:
for word in block.chunks_exact(4) {
let w = [word[0], word[1], word[2], word[3]];
regs::NV_PFALCON_FALCON_IMEMD::default()
.set_data(u32::from_le_bytes(w))
.write(bar, &E::ID, port);
word[3] will always exist because of chunks_exact(4).
next prev parent reply other threads:[~2025-12-02 23:48 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-01 23:39 [PATCH v2 00/13] gpu: nova-core: add Turing support Timur Tabi
2025-12-01 23:39 ` [PATCH v2 01/13] gpu: nova-core: rename Imem to ImemSecure Timur Tabi
2025-12-01 23:39 ` [PATCH v2 02/13] gpu: nova-core: add ImemNonSecure section infrastructure Timur Tabi
2025-12-01 23:39 ` [PATCH v2 03/13] gpu: nova-core: support header parsing on Turing/GA100 Timur Tabi
2025-12-01 23:39 ` [PATCH v2 04/13] gpu: nova-core: add support for Turing/GA100 fwsignature Timur Tabi
2025-12-01 23:39 ` [PATCH v2 05/13] gpu: nova-core: add NV_PFALCON_FALCON_DMATRFCMD::with_falcon_mem() Timur Tabi
2025-12-01 23:39 ` [PATCH v2 06/13] gpu: nova-core: add Turing boot registers Timur Tabi
2025-12-01 23:39 ` [PATCH v2 07/13] gpu: nova-core: move some functions into the HAL Timur Tabi
2025-12-01 23:39 ` [PATCH v2 08/13] gpu: nova-core: Add basic Turing HAL Timur Tabi
2025-12-01 23:39 ` [PATCH v2 09/13] gpu: nova-core: add Falcon HAL method supports_dma() Timur Tabi
2025-12-01 23:39 ` [PATCH v2 10/13] gpu: nova-core: add FalconUCodeDescV2 support Timur Tabi
2025-12-01 23:39 ` [PATCH v2 11/13] gpu: nova-core: align LibosMemoryRegionInitArgument size to page size Timur Tabi
2025-12-01 23:39 ` [PATCH v2 12/13] gpu: nova-core: add PIO support for loading firmware images Timur Tabi
2025-12-02 21:23 ` Joel Fernandes
2025-12-02 22:51 ` Timur Tabi
2025-12-02 23:20 ` Joel Fernandes
2025-12-02 23:40 ` John Hubbard
2025-12-02 23:48 ` Timur Tabi [this message]
2025-12-03 0:35 ` John Hubbard
2025-12-03 0:42 ` Timur Tabi
2025-12-03 0:45 ` John Hubbard
2025-12-03 2:14 ` Joel Fernandes
2025-12-03 2:21 ` John Hubbard
2025-12-02 21:28 ` Joel Fernandes
2025-12-01 23:39 ` [PATCH v2 13/13] [RFC] gpu: nova: implement trait object FalconUCodeDescriptor Timur Tabi
2025-12-02 3:00 ` John Hubbard
2025-12-02 2:55 ` [PATCH v2 00/13] gpu: nova-core: add Turing support John Hubbard
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