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From: "Alim Akhtar" <alim.akhtar@samsung.com>
To: "'Chanho Park'" <chanho61.park@samsung.com>,
	"'Krzysztof Kozlowski'" <krzysztof.kozlowski@linaro.org>
Cc: <linux-samsung-soc@vger.kernel.org>
Subject: RE: ExynosAutov9 SDAK UFS phy dtbs check error
Date: Wed, 6 Jul 2022 16:45:15 +0530	[thread overview]
Message-ID: <02d201d89129$ab9cb450$02d61cf0$@samsung.com> (raw)
In-Reply-To: <021701d89126$c6e8f410$54badc30$@samsung.com>



>-----Original Message-----
>From: Chanho Park [mailto:chanho61.park@samsung.com]
>Sent: Wednesday, July 6, 2022 4:25 PM
>To: 'Krzysztof Kozlowski' <krzysztof.kozlowski@linaro.org>; 'Alim Akhtar'
><alim.akhtar@samsung.com>
>Cc: linux-samsung-soc@vger.kernel.org
>Subject: RE: ExynosAutov9 SDAK UFS phy dtbs check error
>
>> > When running dtbs_check I found:
>> > arch/arm64/boot/dts/exynos/exynosautov9-sadk.dtb: phy@17e04000:
>clocks:
>> > [[10]] is too short
>> >
>> > 	From schema: Documentation/devicetree/bindings/phy/samsung,ufs-
>> phy.yaml
>> >
>> > arch/arm64/boot/dts/exynos/exynosautov9-sadk.dtb: phy@17e04000:
>> > clock-names: ['ref_clk'] is too short
>> >
>> > 	From schema: Documentation/devicetree/bindings/phy/samsung,ufs-
>> phy.yaml
>> >
>> >
>> > and so on. It seems you miss there clocks.
>>
>> +Cc Alim.
>>
>> Tesla FSD has the same problem:
>> tesla/fsd-evb.dtb: ufs-phy@15124000: clocks: [[35, 2]] is too short
>>
>
>Thanks for the report.
>Ufs-phy clock of Fsd and Exynos Auto v9 shall be 'ref' clock only unlike previous
>exynos7's ufs-phy.
>
>I'm looking into how I can fix the warning.
>I simply made below patch but I'm not sure which is better between
>minItems/maxItems and oneOf selection.
>
Thanks Chanho for the patch

Using "if - then" is better here, because that will be selecting what is needed for SoC in question

Let me know if you will be sending a patch for that.

>--- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
>+++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
>@@ -28,17 +28,23 @@ properties:
>
>   clocks:
>     items:
>-      - description: PLL reference clock
>-      - description: symbol clock for input symbol ( rx0-ch0 symbol clock)
>-      - description: symbol clock for input symbol ( rx1-ch1 symbol clock)
>-      - description: symbol clock for output symbol ( tx0 symbol clock)
>+      minItems: 1
>+      maxItems: 4
>+      items:
>+        - description: PLL reference clock
>+        - description: symbol clock for input symbol ( rx0-ch0 symbol clock)
>+        - description: symbol clock for input symbol ( rx1-ch1 symbol clock)
>+        - description: symbol clock for output symbol ( tx0 symbol clock)
>
>   clock-names:
>-    items:
>-      - const: ref_clk
>-      - const: rx1_symbol_clk
>-      - const: rx0_symbol_clk
>-      - const: tx0_symbol_clk
>+    oneOf:
>+      - items:
>+          - const: ref_clk
>+          - const: rx1_symbol_clk
>+          - const: rx0_symbol_clk
>+          - const: tx0_symbol_clk
>+      - items:
>+          - const: ref_clk
>
>   samsung,pmu-syscon:
>     $ref: '/schemas/types.yaml#/definitions/phandle-array'
>
>Best Regards,
>Chanho Park



  reply	other threads:[~2022-07-06 11:15 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-06  9:53 ExynosAutov9 SDAK UFS phy dtbs check error Krzysztof Kozlowski
2022-07-06  9:54 ` Krzysztof Kozlowski
2022-07-06 10:54   ` Chanho Park
2022-07-06 11:15     ` Alim Akhtar [this message]
2022-07-07  0:45       ` Chanho Park
2022-07-06 15:03     ` Krzysztof Kozlowski
2022-07-07  0:46       ` Chanho Park
2022-07-06 11:06   ` Alim Akhtar

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