[PATCH v4 0/7] Add GPU specific initialization framework to support new Mali GPUs

[PATCH v4 0/7] Add GPU specific initialization framework to support new Mali GPUs

[Karunika Choo]

This patch series introduces a GPU HW abstraction to Panthor, to enable
support for new Mali GPUs.

Key changes:
- Addition of GPU-specific initialization framework to standardize and
  streamline support new GPUs.
- Support for cache maintenance via the FLUSH_CACHES GPU command.
- Support for Mali-Gx10, Mali-Gx15, Mali-Gx20, and Mali-Gx25 GPUs.

Firmware for these GPUs can be found here:
https://gitlab.com/dliviu/linux-firmware

Patch Breakdown:
[PATCH 1]:   Implements the GPU-specific initialization framework to
             handle differences between GPU architectures by enabling
             definition of architecture-specific initialization routines
[PATCH 2-3]: Refactors gpu_info initialization in preparation for GPU
             register changes and at the same time simplifies and makes
             extensible the process of determining the GPU model name.
[PATCH 4]:   Adds support for Mali-G710, Mali-G510 and Mali-G310.
[PATCH 5]:   Adds support for Mali-Gx15 GPUs.
[PATCH 6]:   Adds cache maintenance via the FLUSH_CACHES GPU command due
             to deprecation of FLUSH_MEM and FLUSH_PT MMU_AS commands
             from Mali-Gx20 onwards.
[PATCH 7]:   Adds support for Mali-Gx20 and Mali-Gx25 GPUs.


v4:
- Split 64-bit register accessor patches into another patch series.
  - link: https://lore.kernel.org/dri-devel/20250417123725.2733201-1-karunika.choo@arm.com/
- Switched to using arch_major for comparison instead of arch_id in
  panthor_hw.c.
- Removed the gpu_info_init function pointer in favour of a single
  function to handle minor register changes. The function names have
  also been adjusted accordingly.
- Moved the patch to support Mali-G710, Mali-G510 and Mali-G310 forwards
  to [PATCH 4/7].
- Extended support to perform cache maintenance via GPU_CONTROL to
  Mali-Gx10 and Mali-Gx15 GPUs.
- Link to v2: https://lore.kernel.org/all/20250320111741.1937892-1-karunika.choo@arm.com/
v3:
- Kindly ignore this patch series as there were duplicate patches being
  included.
v2:
- Removed handling for register base addresses as they are not yet
  needed.
- Merged gpu_info handling into panthor_hw.c as they depend on the same
  arch_id matching mechanism.
- Made gpu_info initialization a GPU-specific function.
- Removed unnecessary changes for cache maintenance via GPU_CONTROL.
- Removed unnecessary pre-parsing of register fields from v1. Retaining
  current implementation as much as possible.
- Added support for G710, G715, G720, and G725 series of Mali GPUs.
- Link to v1: https://lore.kernel.org/all/20241219170521.64879-1-karunika.choo@arm.com/

Thanks,
Karunika Choo

Karunika Choo (7):
  drm/panthor: Add GPU specific initialization framework
  drm/panthor: Move GPU info initialization into panthor_hw.c
  drm/panthor: Simplify getting the GPU model name
  drm/panthor: Add support for Mali-G710, Mali-G510 and Mali-G310
  drm/panthor: Add support for Mali-Gx15 family of GPUs
  drm/panthor: Support GPU_CONTROL cache flush based on feature bit
  drm/panthor: Add support for Mali-Gx20 and Mali-Gx25 GPUs

 drivers/gpu/drm/panthor/Makefile         |   1 +
 drivers/gpu/drm/panthor/panthor_device.c |   5 +
 drivers/gpu/drm/panthor/panthor_device.h |   4 +
 drivers/gpu/drm/panthor/panthor_fw.c     |   5 +
 drivers/gpu/drm/panthor/panthor_gpu.c    |  95 -----------
 drivers/gpu/drm/panthor/panthor_hw.c     | 197 +++++++++++++++++++++++
 drivers/gpu/drm/panthor/panthor_hw.h     |  66 ++++++++
 drivers/gpu/drm/panthor/panthor_mmu.c    |  35 ++++
 drivers/gpu/drm/panthor/panthor_regs.h   |  25 +++
 include/uapi/drm/panthor_drm.h           |   3 +
 10 files changed, 341 insertions(+), 95 deletions(-)
 create mode 100644 drivers/gpu/drm/panthor/panthor_hw.c
 create mode 100644 drivers/gpu/drm/panthor/panthor_hw.h

--
2.49.0

[PATCH v4 1/7] drm/panthor: Add GPU specific initialization framework

[Karunika Choo]

This patch provides an initialization framework for multiple Mali GPUs
by introducing a GPU support look-up table. Each entry contains, at
minimum, the architecture major version of the GPU, and may optionally
provide feature flags and register offset overrides.

Signed-off-by: Karunika Choo <karunika.choo@arm.com>
---
 drivers/gpu/drm/panthor/Makefile         |  1 +
 drivers/gpu/drm/panthor/panthor_device.c |  5 ++
 drivers/gpu/drm/panthor/panthor_device.h |  4 ++
 drivers/gpu/drm/panthor/panthor_hw.c     | 65 ++++++++++++++++++++++++
 drivers/gpu/drm/panthor/panthor_hw.h     | 60 ++++++++++++++++++++++
 5 files changed, 135 insertions(+)
 create mode 100644 drivers/gpu/drm/panthor/panthor_hw.c
 create mode 100644 drivers/gpu/drm/panthor/panthor_hw.h

diff --git a/drivers/gpu/drm/panthor/Makefile b/drivers/gpu/drm/panthor/Makefile
index 15294719b09c..02db21748c12 100644
--- a/drivers/gpu/drm/panthor/Makefile
+++ b/drivers/gpu/drm/panthor/Makefile
@@ -8,6 +8,7 @@ panthor-y := \
 	panthor_gem.o \
 	panthor_gpu.o \
 	panthor_heap.o \
+	panthor_hw.o \
 	panthor_mmu.o \
 	panthor_sched.o
 
diff --git a/drivers/gpu/drm/panthor/panthor_device.c b/drivers/gpu/drm/panthor/panthor_device.c
index f0b2da5b2b96..81df49880bd8 100644
--- a/drivers/gpu/drm/panthor/panthor_device.c
+++ b/drivers/gpu/drm/panthor/panthor_device.c
@@ -18,6 +18,7 @@
 #include "panthor_device.h"
 #include "panthor_fw.h"
 #include "panthor_gpu.h"
+#include "panthor_hw.h"
 #include "panthor_mmu.h"
 #include "panthor_regs.h"
 #include "panthor_sched.h"
@@ -244,6 +245,10 @@ int panthor_device_init(struct panthor_device *ptdev)
 			return ret;
 	}
 
+	ret = panthor_hw_init(ptdev);
+	if (ret)
+		goto err_rpm_put;
+
 	ret = panthor_gpu_init(ptdev);
 	if (ret)
 		goto err_rpm_put;
diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/panthor/panthor_device.h
index 340a5ef09477..5b617ab781a5 100644
--- a/drivers/gpu/drm/panthor/panthor_device.h
+++ b/drivers/gpu/drm/panthor/panthor_device.h
@@ -26,6 +26,7 @@ struct panthor_device;
 struct panthor_gpu;
 struct panthor_group_pool;
 struct panthor_heap_pool;
+struct panthor_hw;
 struct panthor_job;
 struct panthor_mmu;
 struct panthor_fw;
@@ -122,6 +123,9 @@ struct panthor_device {
 	/** @csif_info: Command stream interface information. */
 	struct drm_panthor_csif_info csif_info;
 
+	/** @hw: GPU specific data. */
+	struct panthor_hw *hw;
+
 	/** @gpu: GPU management data. */
 	struct panthor_gpu *gpu;
 
diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
new file mode 100644
index 000000000000..4dbe23df0c4c
--- /dev/null
+++ b/drivers/gpu/drm/panthor/panthor_hw.c
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0 or MIT
+/* Copyright 2025 ARM Limited. All rights reserved. */
+
+#include "panthor_device.h"
+#include "panthor_hw.h"
+#include "panthor_regs.h"
+
+static struct panthor_hw panthor_hw_devices[] = {
+	{
+		.arch_major = 10,
+	},
+};
+
+static int init_gpu_id(struct panthor_device *ptdev)
+{
+	ptdev->gpu_info.gpu_id = gpu_read(ptdev, GPU_ID);
+
+	if (!ptdev->gpu_info.gpu_id) {
+		drm_err(&ptdev->base, "Invalid GPU ID (0x0)");
+		return -ENXIO;
+	}
+
+	return 0;
+}
+
+int panthor_hw_init(struct panthor_device *ptdev)
+{
+	struct panthor_hw *hdev = NULL;
+	u32 arch_major = 0;
+	int i, ret;
+
+	ret = init_gpu_id(ptdev);
+	if (ret)
+		return ret;
+
+	arch_major = GPU_ARCH_MAJOR(ptdev->gpu_info.gpu_id);
+
+	if (!arch_major) {
+		drm_err(&ptdev->base, "Invalid arch_major (0x0)");
+		return -ENXIO;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(panthor_hw_devices); i++) {
+		if (arch_major == panthor_hw_devices[i].arch_major) {
+			hdev = &panthor_hw_devices[i];
+			break;
+		}
+	}
+
+	if (!hdev) {
+		drm_err(&ptdev->base, "Unsupported GPU (arch_major 0x%x)",
+			arch_major);
+		return -ENODEV;
+	}
+
+	ptdev->hw = hdev;
+
+	return 0;
+}
+
+bool panthor_hw_supports(struct panthor_device *ptdev,
+			 enum panthor_hw_feature feature)
+{
+	return test_bit(feature, ptdev->hw->features);
+}
diff --git a/drivers/gpu/drm/panthor/panthor_hw.h b/drivers/gpu/drm/panthor/panthor_hw.h
new file mode 100644
index 000000000000..1a3cbc5589fd
--- /dev/null
+++ b/drivers/gpu/drm/panthor/panthor_hw.h
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: GPL-2.0 or MIT */
+/* Copyright 2025 ARM Limited. All rights reserved. */
+
+#ifndef __PANTHOR_HW_H__
+#define __PANTHOR_HW_H__
+
+#include <linux/types.h>
+#include <linux/bitmap.h>
+
+struct panthor_device;
+
+/**
+ * enum panthor_hw_feature - Bit position of each HW feature
+ *
+ * Used to define GPU specific features based on the GPU architecture.
+ * New feature flags will be added with support for newer GPU architectures.
+ */
+enum panthor_hw_feature {
+	/** @PANTHOR_HW_FEATURES_END: Must be last. */
+	PANTHOR_HW_FEATURES_END
+};
+
+/**
+ * struct panthor_hw_regmap - Register offsets for specific register blocks
+ */
+struct panthor_hw_regmap {
+
+};
+
+/**
+ * struct panthor_hw_ops - HW operations that are specific to a GPU
+ */
+struct panthor_hw_ops {
+
+};
+
+/**
+ * struct panthor_hw - GPU specific register mapping and functions
+ */
+struct panthor_hw {
+	/** @arch_major: Architecture major to match against */
+	u32 arch_major;
+
+	/** @features: Bitmap containing panthor_hw_feature */
+	DECLARE_BITMAP(features, PANTHOR_HW_FEATURES_END);
+
+	/** @map: Panthor regmap */
+	struct panthor_hw_regmap map;
+
+	/** @ops: Panthor HW specific operations */
+	struct panthor_hw_ops ops;
+};
+
+int panthor_hw_init(struct panthor_device *ptdev);
+
+bool panthor_hw_supports(struct panthor_device *ptdev,
+			 enum panthor_hw_feature feature);
+
+#endif /* __PANTHOR_HW_H__ */
+
-- 
2.49.0

[PATCH v4 2/7] drm/panthor: Move GPU info initialization into panthor_hw.c

[Karunika Choo]

This patch moves GPU info initialization into panthor_hw.c in
preparation of handling future GPU register changes. The GPU register
reading operations to populate gpu_info are moved into a separate
function to facilitate this.

Future GPU support can be added by extending this function with the
necessary register reads behind GPU architecture version guards if the
change is minor. For more complex changes, the function can be forked
and we can leverage the panthor_hw_ops structure to provide architecture
specific initialization routines.

Signed-off-by: Karunika Choo <karunika.choo@arm.com>
---
 drivers/gpu/drm/panthor/panthor_gpu.c |  95 ------------------------
 drivers/gpu/drm/panthor/panthor_hw.c  | 101 ++++++++++++++++++++++++++
 2 files changed, 101 insertions(+), 95 deletions(-)

diff --git a/drivers/gpu/drm/panthor/panthor_gpu.c b/drivers/gpu/drm/panthor/panthor_gpu.c
index 534735518824..ca720e70211c 100644
--- a/drivers/gpu/drm/panthor/panthor_gpu.c
+++ b/drivers/gpu/drm/panthor/panthor_gpu.c
@@ -37,40 +37,6 @@ struct panthor_gpu {
 	wait_queue_head_t reqs_acked;
 };
 
-/**
- * struct panthor_model - GPU model description
- */
-struct panthor_model {
-	/** @name: Model name. */
-	const char *name;
-
-	/** @arch_major: Major version number of architecture. */
-	u8 arch_major;
-
-	/** @product_major: Major version number of product. */
-	u8 product_major;
-};
-
-/**
- * GPU_MODEL() - Define a GPU model. A GPU product can be uniquely identified
- * by a combination of the major architecture version and the major product
- * version.
- * @_name: Name for the GPU model.
- * @_arch_major: Architecture major.
- * @_product_major: Product major.
- */
-#define GPU_MODEL(_name, _arch_major, _product_major) \
-{\
-	.name = __stringify(_name),				\
-	.arch_major = _arch_major,				\
-	.product_major = _product_major,			\
-}
-
-static const struct panthor_model gpu_models[] = {
-	GPU_MODEL(g610, 10, 7),
-	{},
-};
-
 #define GPU_INTERRUPTS_MASK	\
 	(GPU_IRQ_FAULT | \
 	 GPU_IRQ_PROTM_FAULT | \
@@ -83,66 +49,6 @@ static void panthor_gpu_coherency_set(struct panthor_device *ptdev)
 		ptdev->coherent ? GPU_COHERENCY_PROT_BIT(ACE_LITE) : GPU_COHERENCY_NONE);
 }
 
-static void panthor_gpu_init_info(struct panthor_device *ptdev)
-{
-	const struct panthor_model *model;
-	u32 arch_major, product_major;
-	u32 major, minor, status;
-	unsigned int i;
-
-	ptdev->gpu_info.gpu_id = gpu_read(ptdev, GPU_ID);
-	ptdev->gpu_info.csf_id = gpu_read(ptdev, GPU_CSF_ID);
-	ptdev->gpu_info.gpu_rev = gpu_read(ptdev, GPU_REVID);
-	ptdev->gpu_info.core_features = gpu_read(ptdev, GPU_CORE_FEATURES);
-	ptdev->gpu_info.l2_features = gpu_read(ptdev, GPU_L2_FEATURES);
-	ptdev->gpu_info.tiler_features = gpu_read(ptdev, GPU_TILER_FEATURES);
-	ptdev->gpu_info.mem_features = gpu_read(ptdev, GPU_MEM_FEATURES);
-	ptdev->gpu_info.mmu_features = gpu_read(ptdev, GPU_MMU_FEATURES);
-	ptdev->gpu_info.thread_features = gpu_read(ptdev, GPU_THREAD_FEATURES);
-	ptdev->gpu_info.max_threads = gpu_read(ptdev, GPU_THREAD_MAX_THREADS);
-	ptdev->gpu_info.thread_max_workgroup_size = gpu_read(ptdev, GPU_THREAD_MAX_WORKGROUP_SIZE);
-	ptdev->gpu_info.thread_max_barrier_size = gpu_read(ptdev, GPU_THREAD_MAX_BARRIER_SIZE);
-	ptdev->gpu_info.coherency_features = gpu_read(ptdev, GPU_COHERENCY_FEATURES);
-	for (i = 0; i < 4; i++)
-		ptdev->gpu_info.texture_features[i] = gpu_read(ptdev, GPU_TEXTURE_FEATURES(i));
-
-	ptdev->gpu_info.as_present = gpu_read(ptdev, GPU_AS_PRESENT);
-
-	ptdev->gpu_info.shader_present = gpu_read64(ptdev, GPU_SHADER_PRESENT);
-	ptdev->gpu_info.tiler_present = gpu_read64(ptdev, GPU_TILER_PRESENT);
-	ptdev->gpu_info.l2_present = gpu_read64(ptdev, GPU_L2_PRESENT);
-
-	arch_major = GPU_ARCH_MAJOR(ptdev->gpu_info.gpu_id);
-	product_major = GPU_PROD_MAJOR(ptdev->gpu_info.gpu_id);
-	major = GPU_VER_MAJOR(ptdev->gpu_info.gpu_id);
-	minor = GPU_VER_MINOR(ptdev->gpu_info.gpu_id);
-	status = GPU_VER_STATUS(ptdev->gpu_info.gpu_id);
-
-	for (model = gpu_models; model->name; model++) {
-		if (model->arch_major == arch_major &&
-		    model->product_major == product_major)
-			break;
-	}
-
-	drm_info(&ptdev->base,
-		 "mali-%s id 0x%x major 0x%x minor 0x%x status 0x%x",
-		 model->name ?: "unknown", ptdev->gpu_info.gpu_id >> 16,
-		 major, minor, status);
-
-	drm_info(&ptdev->base,
-		 "Features: L2:%#x Tiler:%#x Mem:%#x MMU:%#x AS:%#x",
-		 ptdev->gpu_info.l2_features,
-		 ptdev->gpu_info.tiler_features,
-		 ptdev->gpu_info.mem_features,
-		 ptdev->gpu_info.mmu_features,
-		 ptdev->gpu_info.as_present);
-
-	drm_info(&ptdev->base,
-		 "shader_present=0x%0llx l2_present=0x%0llx tiler_present=0x%0llx",
-		 ptdev->gpu_info.shader_present, ptdev->gpu_info.l2_present,
-		 ptdev->gpu_info.tiler_present);
-}
-
 static void panthor_gpu_irq_handler(struct panthor_device *ptdev, u32 status)
 {
 	gpu_write(ptdev, GPU_INT_CLEAR, status);
@@ -205,7 +111,6 @@ int panthor_gpu_init(struct panthor_device *ptdev)
 	spin_lock_init(&gpu->reqs_lock);
 	init_waitqueue_head(&gpu->reqs_acked);
 	ptdev->gpu = gpu;
-	panthor_gpu_init_info(ptdev);
 
 	dma_set_max_seg_size(ptdev->base.dev, UINT_MAX);
 	pa_bits = GPU_MMU_FEATURES_PA_BITS(ptdev->gpu_info.mmu_features);
diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
index 4dbe23df0c4c..576cda231c1c 100644
--- a/drivers/gpu/drm/panthor/panthor_hw.c
+++ b/drivers/gpu/drm/panthor/panthor_hw.c
@@ -5,6 +5,105 @@
 #include "panthor_hw.h"
 #include "panthor_regs.h"
 
+/**
+ * struct panthor_model - GPU model description
+ */
+struct panthor_model {
+	/** @name: Model name. */
+	const char *name;
+
+	/** @arch_major: Major version number of architecture. */
+	u8 arch_major;
+
+	/** @product_major: Major version number of product. */
+	u8 product_major;
+};
+
+/**
+ * GPU_MODEL() - Define a GPU model. A GPU product can be uniquely identified
+ * by a combination of the major architecture version and the major product
+ * version.
+ * @_name: Name for the GPU model.
+ * @_arch_major: Architecture major.
+ * @_product_major: Product major.
+ */
+#define GPU_MODEL(_name, _arch_major, _product_major) \
+{\
+	.name = __stringify(_name),				\
+	.arch_major = _arch_major,				\
+	.product_major = _product_major,			\
+}
+
+static const struct panthor_model gpu_models[] = {
+	GPU_MODEL(g610, 10, 7),
+	{},
+};
+
+static void panthor_gpu_info_init(struct panthor_device *ptdev)
+{
+	unsigned int i;
+
+	ptdev->gpu_info.csf_id = gpu_read(ptdev, GPU_CSF_ID);
+	ptdev->gpu_info.gpu_rev = gpu_read(ptdev, GPU_REVID);
+	ptdev->gpu_info.core_features = gpu_read(ptdev, GPU_CORE_FEATURES);
+	ptdev->gpu_info.l2_features = gpu_read(ptdev, GPU_L2_FEATURES);
+	ptdev->gpu_info.tiler_features = gpu_read(ptdev, GPU_TILER_FEATURES);
+	ptdev->gpu_info.mem_features = gpu_read(ptdev, GPU_MEM_FEATURES);
+	ptdev->gpu_info.mmu_features = gpu_read(ptdev, GPU_MMU_FEATURES);
+	ptdev->gpu_info.thread_features = gpu_read(ptdev, GPU_THREAD_FEATURES);
+	ptdev->gpu_info.max_threads = gpu_read(ptdev, GPU_THREAD_MAX_THREADS);
+	ptdev->gpu_info.thread_max_workgroup_size = gpu_read(ptdev, GPU_THREAD_MAX_WORKGROUP_SIZE);
+	ptdev->gpu_info.thread_max_barrier_size = gpu_read(ptdev, GPU_THREAD_MAX_BARRIER_SIZE);
+	ptdev->gpu_info.coherency_features = gpu_read(ptdev, GPU_COHERENCY_FEATURES);
+	for (i = 0; i < 4; i++)
+		ptdev->gpu_info.texture_features[i] = gpu_read(ptdev, GPU_TEXTURE_FEATURES(i));
+
+	ptdev->gpu_info.as_present = gpu_read(ptdev, GPU_AS_PRESENT);
+
+	ptdev->gpu_info.shader_present = gpu_read64(ptdev, GPU_SHADER_PRESENT);
+	ptdev->gpu_info.tiler_present = gpu_read64(ptdev, GPU_TILER_PRESENT);
+	ptdev->gpu_info.l2_present = gpu_read64(ptdev, GPU_L2_PRESENT);
+}
+
+static void panthor_hw_info_init(struct panthor_device *ptdev)
+{
+	const struct panthor_model *model;
+	u32 arch_major, product_major;
+	u32 major, minor, status;
+
+	panthor_gpu_info_init(ptdev);
+
+	arch_major = GPU_ARCH_MAJOR(ptdev->gpu_info.gpu_id);
+	product_major = GPU_PROD_MAJOR(ptdev->gpu_info.gpu_id);
+	major = GPU_VER_MAJOR(ptdev->gpu_info.gpu_id);
+	minor = GPU_VER_MINOR(ptdev->gpu_info.gpu_id);
+	status = GPU_VER_STATUS(ptdev->gpu_info.gpu_id);
+
+	for (model = gpu_models; model->name; model++) {
+		if (model->arch_major == arch_major &&
+		    model->product_major == product_major)
+			break;
+	}
+
+	drm_info(&ptdev->base,
+		 "mali-%s id 0x%x major 0x%x minor 0x%x status 0x%x",
+		 model->name ?: "unknown", ptdev->gpu_info.gpu_id >> 16,
+		 major, minor, status);
+
+	drm_info(&ptdev->base,
+		 "Features: L2:%#x Tiler:%#x Mem:%#x MMU:%#x AS:%#x",
+		 ptdev->gpu_info.l2_features,
+		 ptdev->gpu_info.tiler_features,
+		 ptdev->gpu_info.mem_features,
+		 ptdev->gpu_info.mmu_features,
+		 ptdev->gpu_info.as_present);
+
+	drm_info(&ptdev->base,
+		 "shader_present=0x%0llx l2_present=0x%0llx tiler_present=0x%0llx",
+		 ptdev->gpu_info.shader_present, ptdev->gpu_info.l2_present,
+		 ptdev->gpu_info.tiler_present);
+}
+
 static struct panthor_hw panthor_hw_devices[] = {
 	{
 		.arch_major = 10,
@@ -55,6 +154,8 @@ int panthor_hw_init(struct panthor_device *ptdev)
 
 	ptdev->hw = hdev;
 
+	panthor_hw_info_init(ptdev);
+
 	return 0;
 }
 
-- 
2.49.0

[PATCH v4 3/7] drm/panthor: Simplify getting the GPU model name

[Karunika Choo]

This patch replaces the panthor_model structure with a simple switch
case based on the product_id which is in the format of:
        ((arch_major << 24) | product_major)

This simplifies comparison and allows extending of the function to
accommodate naming differences based on supported GPU features.

Signed-off-by: Karunika Choo <karunika.choo@arm.com>
---
 drivers/gpu/drm/panthor/panthor_hw.c   | 63 +++++++-------------------
 drivers/gpu/drm/panthor/panthor_regs.h |  2 +
 2 files changed, 19 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
index 576cda231c1c..421f84fde7d0 100644
--- a/drivers/gpu/drm/panthor/panthor_hw.c
+++ b/drivers/gpu/drm/panthor/panthor_hw.c
@@ -5,40 +5,6 @@
 #include "panthor_hw.h"
 #include "panthor_regs.h"
 
-/**
- * struct panthor_model - GPU model description
- */
-struct panthor_model {
-	/** @name: Model name. */
-	const char *name;
-
-	/** @arch_major: Major version number of architecture. */
-	u8 arch_major;
-
-	/** @product_major: Major version number of product. */
-	u8 product_major;
-};
-
-/**
- * GPU_MODEL() - Define a GPU model. A GPU product can be uniquely identified
- * by a combination of the major architecture version and the major product
- * version.
- * @_name: Name for the GPU model.
- * @_arch_major: Architecture major.
- * @_product_major: Product major.
- */
-#define GPU_MODEL(_name, _arch_major, _product_major) \
-{\
-	.name = __stringify(_name),				\
-	.arch_major = _arch_major,				\
-	.product_major = _product_major,			\
-}
-
-static const struct panthor_model gpu_models[] = {
-	GPU_MODEL(g610, 10, 7),
-	{},
-};
-
 static void panthor_gpu_info_init(struct panthor_device *ptdev)
 {
 	unsigned int i;
@@ -65,29 +31,34 @@ static void panthor_gpu_info_init(struct panthor_device *ptdev)
 	ptdev->gpu_info.l2_present = gpu_read64(ptdev, GPU_L2_PRESENT);
 }
 
+static char *get_gpu_model_name(struct panthor_device *ptdev)
+{
+	const u32 gpu_id = ptdev->gpu_info.gpu_id;
+	const u32 product_id = GPU_PROD_ID_MAKE(GPU_ARCH_MAJOR(gpu_id),
+						GPU_PROD_MAJOR(gpu_id));
+
+	switch (product_id) {
+	case GPU_PROD_ID_MAKE(10, 7):
+		return "Mali-G610";
+	}
+
+	return "(Unknown Mali GPU)";
+}
+
 static void panthor_hw_info_init(struct panthor_device *ptdev)
 {
-	const struct panthor_model *model;
-	u32 arch_major, product_major;
+	const char *gpu_model_name = get_gpu_model_name(ptdev);
 	u32 major, minor, status;
 
 	panthor_gpu_info_init(ptdev);
 
-	arch_major = GPU_ARCH_MAJOR(ptdev->gpu_info.gpu_id);
-	product_major = GPU_PROD_MAJOR(ptdev->gpu_info.gpu_id);
 	major = GPU_VER_MAJOR(ptdev->gpu_info.gpu_id);
 	minor = GPU_VER_MINOR(ptdev->gpu_info.gpu_id);
 	status = GPU_VER_STATUS(ptdev->gpu_info.gpu_id);
 
-	for (model = gpu_models; model->name; model++) {
-		if (model->arch_major == arch_major &&
-		    model->product_major == product_major)
-			break;
-	}
-
 	drm_info(&ptdev->base,
-		 "mali-%s id 0x%x major 0x%x minor 0x%x status 0x%x",
-		 model->name ?: "unknown", ptdev->gpu_info.gpu_id >> 16,
+		 "%s id 0x%x major 0x%x minor 0x%x status 0x%x",
+		 gpu_model_name, ptdev->gpu_info.gpu_id >> 16,
 		 major, minor, status);
 
 	drm_info(&ptdev->base,
diff --git a/drivers/gpu/drm/panthor/panthor_regs.h b/drivers/gpu/drm/panthor/panthor_regs.h
index 48bbfd40138c..e7a81686afdb 100644
--- a/drivers/gpu/drm/panthor/panthor_regs.h
+++ b/drivers/gpu/drm/panthor/panthor_regs.h
@@ -19,6 +19,8 @@
 #define   GPU_VER_MINOR(x)				(((x) & GENMASK(11, 4)) >> 4)
 #define   GPU_VER_STATUS(x)				((x) & GENMASK(3, 0))
 
+#define GPU_PROD_ID_MAKE(arch_major, prod_major)	(((arch_major) << 24) | (prod_major))
+
 #define GPU_L2_FEATURES					0x4
 #define  GPU_L2_FEATURES_LINE_SIZE(x)			(1 << ((x) & GENMASK(7, 0)))
 
-- 
2.49.0

[PATCH v4 4/7] drm/panthor: Add support for Mali-G710, Mali-G510 and Mali-G310

[Karunika Choo]

This patch adds GPU model name and FW binary support for Mali-G710,
Mali-G510, and Mali-G310.

Signed-off-by: Karunika Choo <karunika.choo@arm.com>
---
 drivers/gpu/drm/panthor/panthor_fw.c | 2 ++
 drivers/gpu/drm/panthor/panthor_hw.c | 6 ++++++
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/panthor/panthor_fw.c b/drivers/gpu/drm/panthor/panthor_fw.c
index 36f1034839c2..b7b454d16f12 100644
--- a/drivers/gpu/drm/panthor/panthor_fw.c
+++ b/drivers/gpu/drm/panthor/panthor_fw.c
@@ -1402,3 +1402,5 @@ int panthor_fw_init(struct panthor_device *ptdev)
 }
 
 MODULE_FIRMWARE("arm/mali/arch10.8/mali_csffw.bin");
+MODULE_FIRMWARE("arm/mali/arch10.10/mali_csffw.bin");
+MODULE_FIRMWARE("arm/mali/arch10.12/mali_csffw.bin");
diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
index 421f84fde7d0..5e423122cd4e 100644
--- a/drivers/gpu/drm/panthor/panthor_hw.c
+++ b/drivers/gpu/drm/panthor/panthor_hw.c
@@ -38,8 +38,14 @@ static char *get_gpu_model_name(struct panthor_device *ptdev)
 						GPU_PROD_MAJOR(gpu_id));
 
 	switch (product_id) {
+	case GPU_PROD_ID_MAKE(10, 2):
+		return "Mali-G710";
 	case GPU_PROD_ID_MAKE(10, 7):
 		return "Mali-G610";
+	case GPU_PROD_ID_MAKE(10, 3):
+		return "Mali-G510";
+	case GPU_PROD_ID_MAKE(10, 4):
+		return "Mali-G310";
 	}
 
 	return "(Unknown Mali GPU)";
-- 
2.49.0

[PATCH v4 5/7] drm/panthor: Add support for Mali-Gx15 family of GPUs

[Karunika Choo]

Mali-Gx15 introduces a new GPU_FEATURES register that provides
information about GPU-wide supported features. The register value will
be passed on to userspace via gpu_info. It also adds the following
registers that are specific to the kernel driver only:
- ASN_HASH_0~2
- DOORBELL_FEATURES
- PRFCNT_FEATURES
- SYSC_ALLOC0~7
- SYSC_PBHA_OVERRIDE0~3

Additionally, Mali-Gx15 presents an 'Immortalis' naming variant
depending on the shader core count and presence of Ray Intersection
feature support.

This patch adds:
- support for correctly identifying the model names for Mali-Gx15 GPUs.
- arch 11.8 FW binary support

Signed-off-by: Karunika Choo <karunika.choo@arm.com>
---
 drivers/gpu/drm/panthor/panthor_fw.c   |  1 +
 drivers/gpu/drm/panthor/panthor_hw.c   | 18 ++++++++++++++++++
 drivers/gpu/drm/panthor/panthor_regs.h | 11 +++++++++++
 include/uapi/drm/panthor_drm.h         |  3 +++
 4 files changed, 33 insertions(+)

diff --git a/drivers/gpu/drm/panthor/panthor_fw.c b/drivers/gpu/drm/panthor/panthor_fw.c
index b7b454d16f12..fa6e0b48a0b2 100644
--- a/drivers/gpu/drm/panthor/panthor_fw.c
+++ b/drivers/gpu/drm/panthor/panthor_fw.c
@@ -1404,3 +1404,4 @@ int panthor_fw_init(struct panthor_device *ptdev)
 MODULE_FIRMWARE("arm/mali/arch10.8/mali_csffw.bin");
 MODULE_FIRMWARE("arm/mali/arch10.10/mali_csffw.bin");
 MODULE_FIRMWARE("arm/mali/arch10.12/mali_csffw.bin");
+MODULE_FIRMWARE("arm/mali/arch11.8/mali_csffw.bin");
diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
index 5e423122cd4e..f5127a4b02dc 100644
--- a/drivers/gpu/drm/panthor/panthor_hw.c
+++ b/drivers/gpu/drm/panthor/panthor_hw.c
@@ -29,6 +29,9 @@ static void panthor_gpu_info_init(struct panthor_device *ptdev)
 	ptdev->gpu_info.shader_present = gpu_read64(ptdev, GPU_SHADER_PRESENT);
 	ptdev->gpu_info.tiler_present = gpu_read64(ptdev, GPU_TILER_PRESENT);
 	ptdev->gpu_info.l2_present = gpu_read64(ptdev, GPU_L2_PRESENT);
+
+	/* Introduced in arch 11.x */
+	ptdev->gpu_info.gpu_features = gpu_read64(ptdev, GPU_FEATURES);
 }
 
 static char *get_gpu_model_name(struct panthor_device *ptdev)
@@ -36,6 +39,9 @@ static char *get_gpu_model_name(struct panthor_device *ptdev)
 	const u32 gpu_id = ptdev->gpu_info.gpu_id;
 	const u32 product_id = GPU_PROD_ID_MAKE(GPU_ARCH_MAJOR(gpu_id),
 						GPU_PROD_MAJOR(gpu_id));
+	const bool ray_intersection = !!(ptdev->gpu_info.gpu_features &
+					 GPU_FEATURES_RAY_INTERSECTION);
+	const u8 shader_core_count = hweight64(ptdev->gpu_info.shader_present);
 
 	switch (product_id) {
 	case GPU_PROD_ID_MAKE(10, 2):
@@ -46,6 +52,15 @@ static char *get_gpu_model_name(struct panthor_device *ptdev)
 		return "Mali-G510";
 	case GPU_PROD_ID_MAKE(10, 4):
 		return "Mali-G310";
+	case GPU_PROD_ID_MAKE(11, 2):
+		if (shader_core_count > 10 && ray_intersection)
+			return "Mali-G715-Immortalis";
+		else if (shader_core_count >= 7)
+			return "Mali-G715";
+
+		fallthrough;
+	case GPU_PROD_ID_MAKE(11, 3):
+		return "Mali-G615";
 	}
 
 	return "(Unknown Mali GPU)";
@@ -85,6 +100,9 @@ static struct panthor_hw panthor_hw_devices[] = {
 	{
 		.arch_major = 10,
 	},
+	{
+		.arch_major = 11,
+	},
 };
 
 static int init_gpu_id(struct panthor_device *ptdev)
diff --git a/drivers/gpu/drm/panthor/panthor_regs.h b/drivers/gpu/drm/panthor/panthor_regs.h
index e7a81686afdb..4eaa2b612756 100644
--- a/drivers/gpu/drm/panthor/panthor_regs.h
+++ b/drivers/gpu/drm/panthor/panthor_regs.h
@@ -72,6 +72,10 @@
 #define GPU_PWR_OVERRIDE0				0x54
 #define GPU_PWR_OVERRIDE1				0x58
 
+#define GPU_FEATURES					0x60
+#define   GPU_FEATURES_RAY_INTERSECTION			BIT(2)
+#define GPU_PRFCNT_FEATURES				0x68
+
 #define GPU_TIMESTAMP_OFFSET				0x88
 #define GPU_CYCLE_COUNT					0x90
 #define GPU_TIMESTAMP					0x98
@@ -83,6 +87,8 @@
 
 #define GPU_TEXTURE_FEATURES(n)				(0xB0 + ((n) * 4))
 
+#define GPU_DOORBELL_FEATURES				0xC0
+
 #define GPU_SHADER_PRESENT				0x100
 #define GPU_TILER_PRESENT				0x110
 #define GPU_L2_PRESENT					0x120
@@ -109,6 +115,8 @@
 
 #define GPU_REVID					0x280
 
+#define GPU_ASN_HASH(n)					(0x2C0 + ((n) * 4))
+
 #define GPU_COHERENCY_FEATURES				0x300
 #define GPU_COHERENCY_PROT_BIT(name)			BIT(GPU_COHERENCY_  ## name)
 
@@ -117,6 +125,9 @@
 #define   GPU_COHERENCY_ACE				1
 #define   GPU_COHERENCY_NONE				31
 
+#define GPU_SYSC_PBHA_OVERRIDE(n)			(0x320 + ((n) * 4))
+#define GPU_SYSC_ALLOC(n)				(0x340 + ((n) * 4))
+
 #define MCU_CONTROL					0x700
 #define MCU_CONTROL_ENABLE				1
 #define MCU_CONTROL_AUTO				2
diff --git a/include/uapi/drm/panthor_drm.h b/include/uapi/drm/panthor_drm.h
index ad9a70afea6c..888179effdee 100644
--- a/include/uapi/drm/panthor_drm.h
+++ b/include/uapi/drm/panthor_drm.h
@@ -310,6 +310,9 @@ struct drm_panthor_gpu_info {
 
 	/** @pad: MBZ. */
 	__u32 pad;
+
+	/** @gpu_features: Bitmask describing supported GPU-wide features */
+	__u64 gpu_features;
 };
 
 /**
-- 
2.49.0

[PATCH v4 6/7] drm/panthor: Support GPU_CONTROL cache flush based on feature bit

[Karunika Choo]

As the FLUSH_MEM and FLUSH_PT commands are deprecated in GPUs from
Mali-Gx20 onwards, this patch adds support for performing cache
maintenance via the FLUSH_CACHES command in GPU_CONTROL, in place of
FLUSH_MEM and FLUSH_PT based on PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH
feature bit.

This patch also enables cache maintenance via GPU_CONTROL for Mali-Gx10
and Mali-Gx15 GPUs for consistency.

Signed-off-by: Karunika Choo <karunika.choo@arm.com>
---
 drivers/gpu/drm/panthor/panthor_hw.c  |  6 +++++
 drivers/gpu/drm/panthor/panthor_hw.h  |  6 +++++
 drivers/gpu/drm/panthor/panthor_mmu.c | 35 +++++++++++++++++++++++++++
 3 files changed, 47 insertions(+)

diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
index f5127a4b02dc..5ec9d7f28368 100644
--- a/drivers/gpu/drm/panthor/panthor_hw.c
+++ b/drivers/gpu/drm/panthor/panthor_hw.c
@@ -99,9 +99,15 @@ static void panthor_hw_info_init(struct panthor_device *ptdev)
 static struct panthor_hw panthor_hw_devices[] = {
 	{
 		.arch_major = 10,
+		.features = {
+			BIT(PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH)
+		},
 	},
 	{
 		.arch_major = 11,
+		.features = {
+			BIT(PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH)
+		},
 	},
 };
 
diff --git a/drivers/gpu/drm/panthor/panthor_hw.h b/drivers/gpu/drm/panthor/panthor_hw.h
index 1a3cbc5589fd..2bb372fe9d4d 100644
--- a/drivers/gpu/drm/panthor/panthor_hw.h
+++ b/drivers/gpu/drm/panthor/panthor_hw.h
@@ -16,6 +16,12 @@ struct panthor_device;
  * New feature flags will be added with support for newer GPU architectures.
  */
 enum panthor_hw_feature {
+	/**
+	 * @PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH: Perform cache maintenance
+	 * via GPU_CONTROL.
+	 */
+	PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH,
+
 	/** @PANTHOR_HW_FEATURES_END: Must be last. */
 	PANTHOR_HW_FEATURES_END
 };
diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c b/drivers/gpu/drm/panthor/panthor_mmu.c
index b39ea6acc6a9..f9ccc8627032 100644
--- a/drivers/gpu/drm/panthor/panthor_mmu.c
+++ b/drivers/gpu/drm/panthor/panthor_mmu.c
@@ -29,7 +29,9 @@
 
 #include "panthor_device.h"
 #include "panthor_gem.h"
+#include "panthor_gpu.h"
 #include "panthor_heap.h"
+#include "panthor_hw.h"
 #include "panthor_mmu.h"
 #include "panthor_regs.h"
 #include "panthor_sched.h"
@@ -568,6 +570,35 @@ static void lock_region(struct panthor_device *ptdev, u32 as_nr,
 	write_cmd(ptdev, as_nr, AS_COMMAND_LOCK);
 }
 
+static int mmu_hw_do_flush_on_gpu_ctrl(struct panthor_device *ptdev, int as_nr,
+				       u32 op)
+{
+	const u32 l2_flush_op = CACHE_CLEAN | CACHE_INV;
+	u32 lsc_flush_op = 0;
+	int ret;
+
+	if (op == AS_COMMAND_FLUSH_MEM)
+		lsc_flush_op = CACHE_CLEAN | CACHE_INV;
+
+	ret = wait_ready(ptdev, as_nr);
+	if (ret)
+		return ret;
+
+	ret = panthor_gpu_flush_caches(ptdev, l2_flush_op, lsc_flush_op, 0);
+	if (ret)
+		return ret;
+
+	/*
+	 * Explicitly unlock the region as the AS is not unlocked automatically
+	 * at the end of the GPU_CONTROL cache flush command, unlike
+	 * AS_COMMAND_FLUSH_MEM or AS_COMMAND_FLUSH_PT.
+	 */
+	write_cmd(ptdev, as_nr, AS_COMMAND_UNLOCK);
+
+	/* Wait for the unlock command to complete */
+	return wait_ready(ptdev, as_nr);
+}
+
 static int mmu_hw_do_operation_locked(struct panthor_device *ptdev, int as_nr,
 				      u64 iova, u64 size, u32 op)
 {
@@ -585,6 +616,10 @@ static int mmu_hw_do_operation_locked(struct panthor_device *ptdev, int as_nr,
 	if (op != AS_COMMAND_UNLOCK)
 		lock_region(ptdev, as_nr, iova, size);
 
+	if (panthor_hw_supports(ptdev,PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH))
+		if (op == AS_COMMAND_FLUSH_MEM || op == AS_COMMAND_FLUSH_PT)
+			return mmu_hw_do_flush_on_gpu_ctrl(ptdev, as_nr, op);
+
 	/* Run the MMU operation */
 	write_cmd(ptdev, as_nr, op);
 
-- 
2.49.0

[PATCH v4 7/7] drm/panthor: Add support for Mali-Gx20 and Mali-Gx25 GPUs

[Karunika Choo]

Mali-Gx20 and Mali-Gx25 deprecates the use of FLUSH_MEM and FLUSH_PT
MMU_AS commands in favour of cache maintenance via
GPU_COMMAND's FLUSH_CACHES and FLUSH_PA_RANGE.

They also introduce the following registers:
- GPU_COMMAND_ARG0~1
- SHADER_PWRFEATURES
- AMBA_FEATURES
- AMBA_ENABLE

This patch enables FLUSH_CACHES for both families of GPUs via the
PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH bit until FLUSH_PA_RANGE support
is added. It also adds the aforementioned register definitions and
firmware binary support for arch 12.8 and 13.8.

Signed-off-by: Karunika Choo <karunika.choo@arm.com>
---
 drivers/gpu/drm/panthor/panthor_fw.c   |  2 ++
 drivers/gpu/drm/panthor/panthor_hw.c   | 30 ++++++++++++++++++++++++++
 drivers/gpu/drm/panthor/panthor_regs.h | 12 +++++++++++
 3 files changed, 44 insertions(+)

diff --git a/drivers/gpu/drm/panthor/panthor_fw.c b/drivers/gpu/drm/panthor/panthor_fw.c
index fa6e0b48a0b2..9bf06e55eaee 100644
--- a/drivers/gpu/drm/panthor/panthor_fw.c
+++ b/drivers/gpu/drm/panthor/panthor_fw.c
@@ -1405,3 +1405,5 @@ MODULE_FIRMWARE("arm/mali/arch10.8/mali_csffw.bin");
 MODULE_FIRMWARE("arm/mali/arch10.10/mali_csffw.bin");
 MODULE_FIRMWARE("arm/mali/arch10.12/mali_csffw.bin");
 MODULE_FIRMWARE("arm/mali/arch11.8/mali_csffw.bin");
+MODULE_FIRMWARE("arm/mali/arch12.8/mali_csffw.bin");
+MODULE_FIRMWARE("arm/mali/arch13.8/mali_csffw.bin");
diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
index 5ec9d7f28368..281d86c4715e 100644
--- a/drivers/gpu/drm/panthor/panthor_hw.c
+++ b/drivers/gpu/drm/panthor/panthor_hw.c
@@ -61,6 +61,24 @@ static char *get_gpu_model_name(struct panthor_device *ptdev)
 		fallthrough;
 	case GPU_PROD_ID_MAKE(11, 3):
 		return "Mali-G615";
+	case GPU_PROD_ID_MAKE(12, 0):
+		if (shader_core_count >= 10 && ray_intersection)
+			return "Mali-G720-Immortalis";
+		else if (shader_core_count >= 6)
+			return "Mali-G720";
+
+		fallthrough;
+	case GPU_PROD_ID_MAKE(12, 1):
+		return "Mali-G620";
+	case GPU_PROD_ID_MAKE(13, 0):
+		if (shader_core_count >= 10 && ray_intersection)
+			return "Mali-G925-Immortalis";
+		else if (shader_core_count >= 6)
+			return "Mali-G725";
+
+		fallthrough;
+	case GPU_PROD_ID_MAKE(13, 1):
+		return "Mali-G625";
 	}
 
 	return "(Unknown Mali GPU)";
@@ -109,6 +127,18 @@ static struct panthor_hw panthor_hw_devices[] = {
 			BIT(PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH)
 		},
 	},
+	{
+		.arch_major = 12,
+		.features = {
+			BIT(PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH)
+		},
+	},
+	{
+		.arch_major = 13,
+		.features = {
+			BIT(PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH)
+		},
+	},
 };
 
 static int init_gpu_id(struct panthor_device *ptdev)
diff --git a/drivers/gpu/drm/panthor/panthor_regs.h b/drivers/gpu/drm/panthor/panthor_regs.h
index 4eaa2b612756..8e01440f8743 100644
--- a/drivers/gpu/drm/panthor/panthor_regs.h
+++ b/drivers/gpu/drm/panthor/panthor_regs.h
@@ -89,6 +89,8 @@
 
 #define GPU_DOORBELL_FEATURES				0xC0
 
+#define GPU_COMMAND_ARG(n)				(0xD0 + ((n) * 8))
+
 #define GPU_SHADER_PRESENT				0x100
 #define GPU_TILER_PRESENT				0x110
 #define GPU_L2_PRESENT					0x120
@@ -98,6 +100,8 @@
 #define L2_READY					0x160
 
 #define SHADER_PWRON					0x180
+#define SHADER_PWRFEATURES				0x188
+#define   SHADER_PWRFEATURES_RAY_TRACING_UNIT		BIT(0)
 #define TILER_PWRON					0x190
 #define L2_PWRON					0x1A0
 
@@ -125,6 +129,13 @@
 #define   GPU_COHERENCY_ACE				1
 #define   GPU_COHERENCY_NONE				31
 
+#define AMBA_FEATURES					0x300
+#define   AMBA_FEATURES_ACE_LITE			BIT(0)
+#define   AMBA_FEATURES_ACE				BIT(1)
+#define   AMBA_FEATURES_SHAREABLE_CACHE_SUPPORT		BIT(5)
+
+#define AMBA_ENABLE					0x304
+
 #define GPU_SYSC_PBHA_OVERRIDE(n)			(0x320 + ((n) * 4))
 #define GPU_SYSC_ALLOC(n)				(0x340 + ((n) * 4))
 
@@ -138,6 +149,7 @@
 #define MCU_STATUS_ENABLED				1
 #define MCU_STATUS_HALT					2
 #define MCU_STATUS_FATAL				3
+#define MCU_FEATURES					0x708
 
 /* Job Control regs */
 #define JOB_INT_RAWSTAT					0x1000
-- 
2.49.0

Re: [PATCH v4 1/7] drm/panthor: Add GPU specific initialization framework

[Chia-I Wu]

On Mon, Jun 2, 2025 at 7:33 AM Karunika Choo <karunika.choo@arm.com> wrote:
>
> This patch provides an initialization framework for multiple Mali GPUs
> by introducing a GPU support look-up table. Each entry contains, at
> minimum, the architecture major version of the GPU, and may optionally
> provide feature flags and register offset overrides.
<snipped>
> +/**
> + * struct panthor_hw - GPU specific register mapping and functions
> + */
> +struct panthor_hw {
> +       /** @arch_major: Architecture major to match against */
> +       u32 arch_major;
> +
> +       /** @features: Bitmap containing panthor_hw_feature */
> +       DECLARE_BITMAP(features, PANTHOR_HW_FEATURES_END);
> +
> +       /** @map: Panthor regmap */
> +       struct panthor_hw_regmap map;
> +
> +       /** @ops: Panthor HW specific operations */
> +       struct panthor_hw_ops ops;
> +};
None of the fields are really needed even at the end of this series.

Can we merge patch 1 & 2, introduce just panthor_hw_init and nothing
else, and let panthor_hw_init call panthor_gpu_init_info?


> +
> +int panthor_hw_init(struct panthor_device *ptdev);
> +
> +bool panthor_hw_supports(struct panthor_device *ptdev,
> +                        enum panthor_hw_feature feature);
> +
> +#endif /* __PANTHOR_HW_H__ */
> +
> --
> 2.49.0
>

Re: [PATCH v4 3/7] drm/panthor: Simplify getting the GPU model name

[Chia-I Wu]

On Mon, Jun 2, 2025 at 8:16 AM Karunika Choo <karunika.choo@arm.com> wrote:
>
> This patch replaces the panthor_model structure with a simple switch
> case based on the product_id which is in the format of:
>         ((arch_major << 24) | product_major)
>
> This simplifies comparison and allows extending of the function to
> accommodate naming differences based on supported GPU features.
>
> Signed-off-by: Karunika Choo <karunika.choo@arm.com>
> ---
>  drivers/gpu/drm/panthor/panthor_hw.c   | 63 +++++++-------------------
>  drivers/gpu/drm/panthor/panthor_regs.h |  2 +
>  2 files changed, 19 insertions(+), 46 deletions(-)
>
> diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
> index 576cda231c1c..421f84fde7d0 100644
> --- a/drivers/gpu/drm/panthor/panthor_hw.c
> +++ b/drivers/gpu/drm/panthor/panthor_hw.c
<snipped>
>  static void panthor_hw_info_init(struct panthor_device *ptdev)
>  {
> -       const struct panthor_model *model;
> -       u32 arch_major, product_major;
> +       const char *gpu_model_name = get_gpu_model_name(ptdev);
Move this to after panthor_gpu_info_init below.

We want to init gpu info before dumping it in general.  And in fact,
get_gpu_model_name will depend on gpu_features/shader_present in a
later patch so this is a real bug.
>         u32 major, minor, status;
>
>         panthor_gpu_info_init(ptdev);
>
> -       arch_major = GPU_ARCH_MAJOR(ptdev->gpu_info.gpu_id);
> -       product_major = GPU_PROD_MAJOR(ptdev->gpu_info.gpu_id);
>         major = GPU_VER_MAJOR(ptdev->gpu_info.gpu_id);
>         minor = GPU_VER_MINOR(ptdev->gpu_info.gpu_id);
>         status = GPU_VER_STATUS(ptdev->gpu_info.gpu_id);
>
> -       for (model = gpu_models; model->name; model++) {
> -               if (model->arch_major == arch_major &&
> -                   model->product_major == product_major)
> -                       break;
> -       }
> -
>         drm_info(&ptdev->base,
> -                "mali-%s id 0x%x major 0x%x minor 0x%x status 0x%x",
> -                model->name ?: "unknown", ptdev->gpu_info.gpu_id >> 16,
> +                "%s id 0x%x major 0x%x minor 0x%x status 0x%x",
> +                gpu_model_name, ptdev->gpu_info.gpu_id >> 16,
>                  major, minor, status);
>
>         drm_info(&ptdev->base,
> diff --git a/drivers/gpu/drm/panthor/panthor_regs.h b/drivers/gpu/drm/panthor/panthor_regs.h
> index 48bbfd40138c..e7a81686afdb 100644
> --- a/drivers/gpu/drm/panthor/panthor_regs.h
> +++ b/drivers/gpu/drm/panthor/panthor_regs.h
> @@ -19,6 +19,8 @@
>  #define   GPU_VER_MINOR(x)                             (((x) & GENMASK(11, 4)) >> 4)
>  #define   GPU_VER_STATUS(x)                            ((x) & GENMASK(3, 0))
>
> +#define GPU_PROD_ID_MAKE(arch_major, prod_major)       (((arch_major) << 24) | (prod_major))
This macro has no hw significance and is only used to decide the model
conveniently.  It should be moved to panthor_hw.c.


>  #define GPU_L2_FEATURES                                        0x4
>  #define  GPU_L2_FEATURES_LINE_SIZE(x)                  (1 << ((x) & GENMASK(7, 0)))
>
> --
> 2.49.0
>

Re: [PATCH v4 6/7] drm/panthor: Support GPU_CONTROL cache flush based on feature bit

[Chia-I Wu]

On Mon, Jun 2, 2025 at 7:42 AM Karunika Choo <karunika.choo@arm.com> wrote:
>
> As the FLUSH_MEM and FLUSH_PT commands are deprecated in GPUs from
> Mali-Gx20 onwards, this patch adds support for performing cache
> maintenance via the FLUSH_CACHES command in GPU_CONTROL, in place of
> FLUSH_MEM and FLUSH_PT based on PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH
> feature bit.
>
> This patch also enables cache maintenance via GPU_CONTROL for Mali-Gx10
> and Mali-Gx15 GPUs for consistency.
>
> Signed-off-by: Karunika Choo <karunika.choo@arm.com>
> ---
>  drivers/gpu/drm/panthor/panthor_hw.c  |  6 +++++
>  drivers/gpu/drm/panthor/panthor_hw.h  |  6 +++++
>  drivers/gpu/drm/panthor/panthor_mmu.c | 35 +++++++++++++++++++++++++++
>  3 files changed, 47 insertions(+)
>
> diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
> index f5127a4b02dc..5ec9d7f28368 100644
> --- a/drivers/gpu/drm/panthor/panthor_hw.c
> +++ b/drivers/gpu/drm/panthor/panthor_hw.c
> @@ -99,9 +99,15 @@ static void panthor_hw_info_init(struct panthor_device *ptdev)
>  static struct panthor_hw panthor_hw_devices[] = {
>         {
>                 .arch_major = 10,
> +               .features = {
> +                       BIT(PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH)
> +               },
>         },
>         {
>                 .arch_major = 11,
> +               .features = {
> +                       BIT(PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH)
> +               },
>         },
>  };
Are there going to be major archs which do not support
PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH?  If not, we don't need the
feature bit.

Re: [PATCH v4 7/7] drm/panthor: Add support for Mali-Gx20 and Mali-Gx25 GPUs

[Chia-I Wu]

On Mon, Jun 2, 2025 at 7:34 AM Karunika Choo <karunika.choo@arm.com> wrote:
>
> Mali-Gx20 and Mali-Gx25 deprecates the use of FLUSH_MEM and FLUSH_PT
> MMU_AS commands in favour of cache maintenance via
> GPU_COMMAND's FLUSH_CACHES and FLUSH_PA_RANGE.
>
> They also introduce the following registers:
> - GPU_COMMAND_ARG0~1
> - SHADER_PWRFEATURES
> - AMBA_FEATURES
> - AMBA_ENABLE
>
> This patch enables FLUSH_CACHES for both families of GPUs via the
> PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH bit until FLUSH_PA_RANGE support
> is added. It also adds the aforementioned register definitions and
> firmware binary support for arch 12.8 and 13.8.
<snipped>
> diff --git a/drivers/gpu/drm/panthor/panthor_regs.h b/drivers/gpu/drm/panthor/panthor_regs.h
> index 4eaa2b612756..8e01440f8743 100644
> --- a/drivers/gpu/drm/panthor/panthor_regs.h
> +++ b/drivers/gpu/drm/panthor/panthor_regs.h
> @@ -89,6 +89,8 @@
>
>  #define GPU_DOORBELL_FEATURES                          0xC0
>
> +#define GPU_COMMAND_ARG(n)                             (0xD0 + ((n) * 8))
> +
>  #define GPU_SHADER_PRESENT                             0x100
>  #define GPU_TILER_PRESENT                              0x110
>  #define GPU_L2_PRESENT                                 0x120
> @@ -98,6 +100,8 @@
>  #define L2_READY                                       0x160
>
>  #define SHADER_PWRON                                   0x180
> +#define SHADER_PWRFEATURES                             0x188
> +#define   SHADER_PWRFEATURES_RAY_TRACING_UNIT          BIT(0)
>  #define TILER_PWRON                                    0x190
>  #define L2_PWRON                                       0x1A0
>
> @@ -125,6 +129,13 @@
>  #define   GPU_COHERENCY_ACE                            1
>  #define   GPU_COHERENCY_NONE                           31
>
> +#define AMBA_FEATURES                                  0x300
> +#define   AMBA_FEATURES_ACE_LITE                       BIT(0)
> +#define   AMBA_FEATURES_ACE                            BIT(1)
> +#define   AMBA_FEATURES_SHAREABLE_CACHE_SUPPORT                BIT(5)
> +
> +#define AMBA_ENABLE                                    0x304
We still use GPU_COHERENCY_FEATURES / GPU_COHERENCY_PROTOCOL even on
v12 and v13.  I suppose they are compatible with AMBA_FEATURES /
AMBA_ENABLE to some degree?  We should unify them.

Re: [PATCH v4 0/7] Add GPU specific initialization framework to support new Mali GPUs

[Steven Price]

Hi Karunika,

On 02/06/2025 15:32, Karunika Choo wrote:
> This patch series introduces a GPU HW abstraction to Panthor, to enable
> support for new Mali GPUs.
> 
> Key changes:
> - Addition of GPU-specific initialization framework to standardize and
>   streamline support new GPUs.
> - Support for cache maintenance via the FLUSH_CACHES GPU command.
> - Support for Mali-Gx10, Mali-Gx15, Mali-Gx20, and Mali-Gx25 GPUs.

The changes mostly look fine to me - just some comments on patch 6 which
I'll send separately. Also as Chia-I Wu has already pointed out I think
there's some excess baggage with unused fields. It's best to keep things
minimal and we can add extra fields when they are actually needed rather
than having dead code which might end up never being used.

Thanks,
Steve

> 
> Firmware for these GPUs can be found here:
> https://gitlab.com/dliviu/linux-firmware
> 
> Patch Breakdown:
> [PATCH 1]:   Implements the GPU-specific initialization framework to
>              handle differences between GPU architectures by enabling
>              definition of architecture-specific initialization routines
> [PATCH 2-3]: Refactors gpu_info initialization in preparation for GPU
>              register changes and at the same time simplifies and makes
>              extensible the process of determining the GPU model name.
> [PATCH 4]:   Adds support for Mali-G710, Mali-G510 and Mali-G310.
> [PATCH 5]:   Adds support for Mali-Gx15 GPUs.
> [PATCH 6]:   Adds cache maintenance via the FLUSH_CACHES GPU command due
>              to deprecation of FLUSH_MEM and FLUSH_PT MMU_AS commands
>              from Mali-Gx20 onwards.
> [PATCH 7]:   Adds support for Mali-Gx20 and Mali-Gx25 GPUs.
> 
> 
> v4:
> - Split 64-bit register accessor patches into another patch series.
>   - link: https://lore.kernel.org/dri-devel/20250417123725.2733201-1-karunika.choo@arm.com/
> - Switched to using arch_major for comparison instead of arch_id in
>   panthor_hw.c.
> - Removed the gpu_info_init function pointer in favour of a single
>   function to handle minor register changes. The function names have
>   also been adjusted accordingly.
> - Moved the patch to support Mali-G710, Mali-G510 and Mali-G310 forwards
>   to [PATCH 4/7].
> - Extended support to perform cache maintenance via GPU_CONTROL to
>   Mali-Gx10 and Mali-Gx15 GPUs.
> - Link to v2: https://lore.kernel.org/all/20250320111741.1937892-1-karunika.choo@arm.com/
> v3:
> - Kindly ignore this patch series as there were duplicate patches being
>   included.
> v2:
> - Removed handling for register base addresses as they are not yet
>   needed.
> - Merged gpu_info handling into panthor_hw.c as they depend on the same
>   arch_id matching mechanism.
> - Made gpu_info initialization a GPU-specific function.
> - Removed unnecessary changes for cache maintenance via GPU_CONTROL.
> - Removed unnecessary pre-parsing of register fields from v1. Retaining
>   current implementation as much as possible.
> - Added support for G710, G715, G720, and G725 series of Mali GPUs.
> - Link to v1: https://lore.kernel.org/all/20241219170521.64879-1-karunika.choo@arm.com/
> 
> Thanks,
> Karunika Choo
> 
> Karunika Choo (7):
>   drm/panthor: Add GPU specific initialization framework
>   drm/panthor: Move GPU info initialization into panthor_hw.c
>   drm/panthor: Simplify getting the GPU model name
>   drm/panthor: Add support for Mali-G710, Mali-G510 and Mali-G310
>   drm/panthor: Add support for Mali-Gx15 family of GPUs
>   drm/panthor: Support GPU_CONTROL cache flush based on feature bit
>   drm/panthor: Add support for Mali-Gx20 and Mali-Gx25 GPUs
> 
>  drivers/gpu/drm/panthor/Makefile         |   1 +
>  drivers/gpu/drm/panthor/panthor_device.c |   5 +
>  drivers/gpu/drm/panthor/panthor_device.h |   4 +
>  drivers/gpu/drm/panthor/panthor_fw.c     |   5 +
>  drivers/gpu/drm/panthor/panthor_gpu.c    |  95 -----------
>  drivers/gpu/drm/panthor/panthor_hw.c     | 197 +++++++++++++++++++++++
>  drivers/gpu/drm/panthor/panthor_hw.h     |  66 ++++++++
>  drivers/gpu/drm/panthor/panthor_mmu.c    |  35 ++++
>  drivers/gpu/drm/panthor/panthor_regs.h   |  25 +++
>  include/uapi/drm/panthor_drm.h           |   3 +
>  10 files changed, 341 insertions(+), 95 deletions(-)
>  create mode 100644 drivers/gpu/drm/panthor/panthor_hw.c
>  create mode 100644 drivers/gpu/drm/panthor/panthor_hw.h
> 
> --
> 2.49.0
> 

Re: [PATCH v4 6/7] drm/panthor: Support GPU_CONTROL cache flush based on feature bit

[Steven Price]

On 02/06/2025 15:32, Karunika Choo wrote:
> As the FLUSH_MEM and FLUSH_PT commands are deprecated in GPUs from
> Mali-Gx20 onwards, this patch adds support for performing cache
> maintenance via the FLUSH_CACHES command in GPU_CONTROL, in place of

NIT: s/GPU_CONTROL/GPU_COMMAND/ (also in the subject and below).
GPU_CONTROL is the register page.

> FLUSH_MEM and FLUSH_PT based on PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH
> feature bit.
> 
> This patch also enables cache maintenance via GPU_CONTROL for Mali-Gx10
> and Mali-Gx15 GPUs for consistency.
> 
> Signed-off-by: Karunika Choo <karunika.choo@arm.com>

I'm puzzled by this patch. You're introducing a new feature bit which is
always enabled on all GPUs at the end of the series. I think this should
be reworked to either:

a) Remove the feature bit and change all GPUs to the new GPU_COMMAND
cache flush mechanism. This should allow a minor code cleanup too.

b) Only opt-in new GPUs where FLUSH_MEM/FLUSH_PT are unavailable.

In particular this patch as it stands does two very different things -
it enables a new feature to be used on the new Gx20-onwards *and*
changes the existing behaviour on older GPUs (which has the possibility
of causing regressions).

A third option is of course to split the patch - add the new feature bit
but don't enable it in the first, and then the second patch is just
enabling the feature bit for existing GPUs. That makes reverting in case
of problems nice and easy. But there's also no point having the feature
bit if we don't expect any users of the old behaviour - so only do that
if you have good reason to think we're going to add a GPU using the old
behaviour.

Thanks,
Steve

> ---
>  drivers/gpu/drm/panthor/panthor_hw.c  |  6 +++++
>  drivers/gpu/drm/panthor/panthor_hw.h  |  6 +++++
>  drivers/gpu/drm/panthor/panthor_mmu.c | 35 +++++++++++++++++++++++++++
>  3 files changed, 47 insertions(+)
> 
> diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
> index f5127a4b02dc..5ec9d7f28368 100644
> --- a/drivers/gpu/drm/panthor/panthor_hw.c
> +++ b/drivers/gpu/drm/panthor/panthor_hw.c
> @@ -99,9 +99,15 @@ static void panthor_hw_info_init(struct panthor_device *ptdev)
>  static struct panthor_hw panthor_hw_devices[] = {
>  	{
>  		.arch_major = 10,
> +		.features = {
> +			BIT(PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH)
> +		},
>  	},
>  	{
>  		.arch_major = 11,
> +		.features = {
> +			BIT(PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH)
> +		},
>  	},
>  };
>  
> diff --git a/drivers/gpu/drm/panthor/panthor_hw.h b/drivers/gpu/drm/panthor/panthor_hw.h
> index 1a3cbc5589fd..2bb372fe9d4d 100644
> --- a/drivers/gpu/drm/panthor/panthor_hw.h
> +++ b/drivers/gpu/drm/panthor/panthor_hw.h
> @@ -16,6 +16,12 @@ struct panthor_device;
>   * New feature flags will be added with support for newer GPU architectures.
>   */
>  enum panthor_hw_feature {
> +	/**
> +	 * @PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH: Perform cache maintenance
> +	 * via GPU_CONTROL.
> +	 */
> +	PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH,
> +
>  	/** @PANTHOR_HW_FEATURES_END: Must be last. */
>  	PANTHOR_HW_FEATURES_END
>  };
> diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c b/drivers/gpu/drm/panthor/panthor_mmu.c
> index b39ea6acc6a9..f9ccc8627032 100644
> --- a/drivers/gpu/drm/panthor/panthor_mmu.c
> +++ b/drivers/gpu/drm/panthor/panthor_mmu.c
> @@ -29,7 +29,9 @@
>  
>  #include "panthor_device.h"
>  #include "panthor_gem.h"
> +#include "panthor_gpu.h"
>  #include "panthor_heap.h"
> +#include "panthor_hw.h"
>  #include "panthor_mmu.h"
>  #include "panthor_regs.h"
>  #include "panthor_sched.h"
> @@ -568,6 +570,35 @@ static void lock_region(struct panthor_device *ptdev, u32 as_nr,
>  	write_cmd(ptdev, as_nr, AS_COMMAND_LOCK);
>  }
>  
> +static int mmu_hw_do_flush_on_gpu_ctrl(struct panthor_device *ptdev, int as_nr,
> +				       u32 op)
> +{
> +	const u32 l2_flush_op = CACHE_CLEAN | CACHE_INV;
> +	u32 lsc_flush_op = 0;
> +	int ret;
> +
> +	if (op == AS_COMMAND_FLUSH_MEM)
> +		lsc_flush_op = CACHE_CLEAN | CACHE_INV;
> +
> +	ret = wait_ready(ptdev, as_nr);
> +	if (ret)
> +		return ret;
> +
> +	ret = panthor_gpu_flush_caches(ptdev, l2_flush_op, lsc_flush_op, 0);
> +	if (ret)
> +		return ret;
> +
> +	/*
> +	 * Explicitly unlock the region as the AS is not unlocked automatically
> +	 * at the end of the GPU_CONTROL cache flush command, unlike
> +	 * AS_COMMAND_FLUSH_MEM or AS_COMMAND_FLUSH_PT.
> +	 */
> +	write_cmd(ptdev, as_nr, AS_COMMAND_UNLOCK);
> +
> +	/* Wait for the unlock command to complete */
> +	return wait_ready(ptdev, as_nr);
> +}
> +
>  static int mmu_hw_do_operation_locked(struct panthor_device *ptdev, int as_nr,
>  				      u64 iova, u64 size, u32 op)
>  {
> @@ -585,6 +616,10 @@ static int mmu_hw_do_operation_locked(struct panthor_device *ptdev, int as_nr,
>  	if (op != AS_COMMAND_UNLOCK)
>  		lock_region(ptdev, as_nr, iova, size);
>  
> +	if (panthor_hw_supports(ptdev,PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH))
> +		if (op == AS_COMMAND_FLUSH_MEM || op == AS_COMMAND_FLUSH_PT)
> +			return mmu_hw_do_flush_on_gpu_ctrl(ptdev, as_nr, op);
> +
>  	/* Run the MMU operation */
>  	write_cmd(ptdev, as_nr, op);
>  

Re: [PATCH v4 1/7] drm/panthor: Add GPU specific initialization framework

[Karunika Choo]

On 11/06/2025 00:12, Chia-I Wu wrote:
> On Mon, Jun 2, 2025 at 7:33 AM Karunika Choo <karunika.choo@arm.com> wrote:
>>
>> This patch provides an initialization framework for multiple Mali GPUs
>> by introducing a GPU support look-up table. Each entry contains, at
>> minimum, the architecture major version of the GPU, and may optionally
>> provide feature flags and register offset overrides.
> <snipped>
>> +/**
>> + * struct panthor_hw - GPU specific register mapping and functions
>> + */
>> +struct panthor_hw {
>> +       /** @arch_major: Architecture major to match against */
>> +       u32 arch_major;
>> +
>> +       /** @features: Bitmap containing panthor_hw_feature */
>> +       DECLARE_BITMAP(features, PANTHOR_HW_FEATURES_END);
>> +
>> +       /** @map: Panthor regmap */
>> +       struct panthor_hw_regmap map;
>> +
>> +       /** @ops: Panthor HW specific operations */
>> +       struct panthor_hw_ops ops;
>> +};
> None of the fields are really needed even at the end of this series.
> 
> Can we merge patch 1 & 2, introduce just panthor_hw_init and nothing
> else, and let panthor_hw_init call panthor_gpu_init_info?

Hello, I have tried to address this in PATCH 1/6 of v5:
- https://lore.kernel.org/all/20250721111344.1610250-2-karunika.choo@arm.com/

> 
> 
>> +
>> +int panthor_hw_init(struct panthor_device *ptdev);
>> +
>> +bool panthor_hw_supports(struct panthor_device *ptdev,
>> +                        enum panthor_hw_feature feature);
>> +
>> +#endif /* __PANTHOR_HW_H__ */
>> +
>> --
>> 2.49.0
>>

Re: [PATCH v4 3/7] drm/panthor: Simplify getting the GPU model name

[Karunika Choo]

On 11/06/2025 00:32, Chia-I Wu wrote:
> On Mon, Jun 2, 2025 at 8:16 AM Karunika Choo <karunika.choo@arm.com> wrote:
>>
>> This patch replaces the panthor_model structure with a simple switch
>> case based on the product_id which is in the format of:
>>         ((arch_major << 24) | product_major)
>>
>> This simplifies comparison and allows extending of the function to
>> accommodate naming differences based on supported GPU features.
>>
>> Signed-off-by: Karunika Choo <karunika.choo@arm.com>
>> ---
>>  drivers/gpu/drm/panthor/panthor_hw.c   | 63 +++++++-------------------
>>  drivers/gpu/drm/panthor/panthor_regs.h |  2 +
>>  2 files changed, 19 insertions(+), 46 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
>> index 576cda231c1c..421f84fde7d0 100644
>> --- a/drivers/gpu/drm/panthor/panthor_hw.c
>> +++ b/drivers/gpu/drm/panthor/panthor_hw.c
> <snipped>
>>  static void panthor_hw_info_init(struct panthor_device *ptdev)
>>  {
>> -       const struct panthor_model *model;
>> -       u32 arch_major, product_major;
>> +       const char *gpu_model_name = get_gpu_model_name(ptdev);
> Move this to after panthor_gpu_info_init below.
> 
> We want to init gpu info before dumping it in general.  And in fact,
> get_gpu_model_name will depend on gpu_features/shader_present in a
> later patch so this is a real bug.
>>         u32 major, minor, status;
>>
>>         panthor_gpu_info_init(ptdev);
>>
>> -       arch_major = GPU_ARCH_MAJOR(ptdev->gpu_info.gpu_id);
>> -       product_major = GPU_PROD_MAJOR(ptdev->gpu_info.gpu_id);
>>         major = GPU_VER_MAJOR(ptdev->gpu_info.gpu_id);
>>         minor = GPU_VER_MINOR(ptdev->gpu_info.gpu_id);
>>         status = GPU_VER_STATUS(ptdev->gpu_info.gpu_id);
>>
>> -       for (model = gpu_models; model->name; model++) {
>> -               if (model->arch_major == arch_major &&
>> -                   model->product_major == product_major)
>> -                       break;
>> -       }
>> -
>>         drm_info(&ptdev->base,
>> -                "mali-%s id 0x%x major 0x%x minor 0x%x status 0x%x",
>> -                model->name ?: "unknown", ptdev->gpu_info.gpu_id >> 16,
>> +                "%s id 0x%x major 0x%x minor 0x%x status 0x%x",
>> +                gpu_model_name, ptdev->gpu_info.gpu_id >> 16,
>>                  major, minor, status);
>>
>>         drm_info(&ptdev->base,
>> diff --git a/drivers/gpu/drm/panthor/panthor_regs.h b/drivers/gpu/drm/panthor/panthor_regs.h
>> index 48bbfd40138c..e7a81686afdb 100644
>> --- a/drivers/gpu/drm/panthor/panthor_regs.h
>> +++ b/drivers/gpu/drm/panthor/panthor_regs.h
>> @@ -19,6 +19,8 @@
>>  #define   GPU_VER_MINOR(x)                             (((x) & GENMASK(11, 4)) >> 4)
>>  #define   GPU_VER_STATUS(x)                            ((x) & GENMASK(3, 0))
>>
>> +#define GPU_PROD_ID_MAKE(arch_major, prod_major)       (((arch_major) << 24) | (prod_major))
> This macro has no hw significance and is only used to decide the model
> conveniently.  It should be moved to panthor_hw.c.
>
>
I have addressed both points in PATCH 2/6 of v5
- https://lore.kernel.org/all/20250721111344.1610250-3-karunika.choo@arm.com/
 >>  #define GPU_L2_FEATURES                                        0x4
>>  #define  GPU_L2_FEATURES_LINE_SIZE(x)                  (1 << ((x) & GENMASK(7, 0)))
>>
>> --
>> 2.49.0
>>

Re: [PATCH v4 6/7] drm/panthor: Support GPU_CONTROL cache flush based on feature bit

[Karunika Choo]

On 11/06/2025 00:42, Chia-I Wu wrote:
> On Mon, Jun 2, 2025 at 7:42 AM Karunika Choo <karunika.choo@arm.com> wrote:
>>
>> As the FLUSH_MEM and FLUSH_PT commands are deprecated in GPUs from
>> Mali-Gx20 onwards, this patch adds support for performing cache
>> maintenance via the FLUSH_CACHES command in GPU_CONTROL, in place of
>> FLUSH_MEM and FLUSH_PT based on PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH
>> feature bit.
>>
>> This patch also enables cache maintenance via GPU_CONTROL for Mali-Gx10
>> and Mali-Gx15 GPUs for consistency.
>>
>> Signed-off-by: Karunika Choo <karunika.choo@arm.com>
>> ---
>>  drivers/gpu/drm/panthor/panthor_hw.c  |  6 +++++
>>  drivers/gpu/drm/panthor/panthor_hw.h  |  6 +++++
>>  drivers/gpu/drm/panthor/panthor_mmu.c | 35 +++++++++++++++++++++++++++
>>  3 files changed, 47 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
>> index f5127a4b02dc..5ec9d7f28368 100644
>> --- a/drivers/gpu/drm/panthor/panthor_hw.c
>> +++ b/drivers/gpu/drm/panthor/panthor_hw.c
>> @@ -99,9 +99,15 @@ static void panthor_hw_info_init(struct panthor_device *ptdev)
>>  static struct panthor_hw panthor_hw_devices[] = {
>>         {
>>                 .arch_major = 10,
>> +               .features = {
>> +                       BIT(PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH)
>> +               },
>>         },
>>         {
>>                 .arch_major = 11,
>> +               .features = {
>> +                       BIT(PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH)
>> +               },
>>         },
>>  };
> Are there going to be major archs which do not support
> PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH?  If not, we don't need the
> feature bit.
I have removed the feature bits and applied the change to all CSF GPUs
in v5.
- https://lore.kernel.org/all/20250721111344.1610250-6-karunika.choo@arm.com/

Re: [PATCH v4 6/7] drm/panthor: Support GPU_CONTROL cache flush based on feature bit

[Karunika Choo]

On 23/06/2025 11:23, Steven Price wrote:
> On 02/06/2025 15:32, Karunika Choo wrote:
>> As the FLUSH_MEM and FLUSH_PT commands are deprecated in GPUs from
>> Mali-Gx20 onwards, this patch adds support for performing cache
>> maintenance via the FLUSH_CACHES command in GPU_CONTROL, in place of
> 
> NIT: s/GPU_CONTROL/GPU_COMMAND/ (also in the subject and below).
> GPU_CONTROL is the register page.
> 
>> FLUSH_MEM and FLUSH_PT based on PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH
>> feature bit.
>>
>> This patch also enables cache maintenance via GPU_CONTROL for Mali-Gx10
>> and Mali-Gx15 GPUs for consistency.
>>
>> Signed-off-by: Karunika Choo <karunika.choo@arm.com>
> 
> I'm puzzled by this patch. You're introducing a new feature bit which is
> always enabled on all GPUs at the end of the series. I think this should
> be reworked to either:
> 
> a) Remove the feature bit and change all GPUs to the new GPU_COMMAND
> cache flush mechanism. This should allow a minor code cleanup too.
> 
> b) Only opt-in new GPUs where FLUSH_MEM/FLUSH_PT are unavailable.
> 
> In particular this patch as it stands does two very different things -
> it enables a new feature to be used on the new Gx20-onwards *and*
> changes the existing behaviour on older GPUs (which has the possibility
> of causing regressions).
> 
> A third option is of course to split the patch - add the new feature bit
> but don't enable it in the first, and then the second patch is just
> enabling the feature bit for existing GPUs. That makes reverting in case
> of problems nice and easy. But there's also no point having the feature
> bit if we don't expect any users of the old behaviour - so only do that
> if you have good reason to think we're going to add a GPU using the old
> behaviour.
> 
> Thanks,
> Steve
> 
Hi Steve, 

On further inspection, this seems to be a change purely to align with the
FLUSH_PA_RANGE workflow and should not have any negative effects if the 
Mali-Gx10 and Mali-Gx15 series use the same mechanism.

I have updated this in v5 and enabled it for all supported GPUs for now.
- https://lore.kernel.org/all/20250721111344.1610250-6-karunika.choo@arm.com/

Kind regards,
Karunika
>> ---
>>  drivers/gpu/drm/panthor/panthor_hw.c  |  6 +++++
>>  drivers/gpu/drm/panthor/panthor_hw.h  |  6 +++++
>>  drivers/gpu/drm/panthor/panthor_mmu.c | 35 +++++++++++++++++++++++++++
>>  3 files changed, 47 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
>> index f5127a4b02dc..5ec9d7f28368 100644
>> --- a/drivers/gpu/drm/panthor/panthor_hw.c
>> +++ b/drivers/gpu/drm/panthor/panthor_hw.c
>> @@ -99,9 +99,15 @@ static void panthor_hw_info_init(struct panthor_device *ptdev)
>>  static struct panthor_hw panthor_hw_devices[] = {
>>  	{
>>  		.arch_major = 10,
>> +		.features = {
>> +			BIT(PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH)
>> +		},
>>  	},
>>  	{
>>  		.arch_major = 11,
>> +		.features = {
>> +			BIT(PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH)
>> +		},
>>  	},
>>  };
>>  
>> diff --git a/drivers/gpu/drm/panthor/panthor_hw.h b/drivers/gpu/drm/panthor/panthor_hw.h
>> index 1a3cbc5589fd..2bb372fe9d4d 100644
>> --- a/drivers/gpu/drm/panthor/panthor_hw.h
>> +++ b/drivers/gpu/drm/panthor/panthor_hw.h
>> @@ -16,6 +16,12 @@ struct panthor_device;
>>   * New feature flags will be added with support for newer GPU architectures.
>>   */
>>  enum panthor_hw_feature {
>> +	/**
>> +	 * @PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH: Perform cache maintenance
>> +	 * via GPU_CONTROL.
>> +	 */
>> +	PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH,
>> +
>>  	/** @PANTHOR_HW_FEATURES_END: Must be last. */
>>  	PANTHOR_HW_FEATURES_END
>>  };
>> diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c b/drivers/gpu/drm/panthor/panthor_mmu.c
>> index b39ea6acc6a9..f9ccc8627032 100644
>> --- a/drivers/gpu/drm/panthor/panthor_mmu.c
>> +++ b/drivers/gpu/drm/panthor/panthor_mmu.c
>> @@ -29,7 +29,9 @@
>>  
>>  #include "panthor_device.h"
>>  #include "panthor_gem.h"
>> +#include "panthor_gpu.h"
>>  #include "panthor_heap.h"
>> +#include "panthor_hw.h"
>>  #include "panthor_mmu.h"
>>  #include "panthor_regs.h"
>>  #include "panthor_sched.h"
>> @@ -568,6 +570,35 @@ static void lock_region(struct panthor_device *ptdev, u32 as_nr,
>>  	write_cmd(ptdev, as_nr, AS_COMMAND_LOCK);
>>  }
>>  
>> +static int mmu_hw_do_flush_on_gpu_ctrl(struct panthor_device *ptdev, int as_nr,
>> +				       u32 op)
>> +{
>> +	const u32 l2_flush_op = CACHE_CLEAN | CACHE_INV;
>> +	u32 lsc_flush_op = 0;
>> +	int ret;
>> +
>> +	if (op == AS_COMMAND_FLUSH_MEM)
>> +		lsc_flush_op = CACHE_CLEAN | CACHE_INV;
>> +
>> +	ret = wait_ready(ptdev, as_nr);
>> +	if (ret)
>> +		return ret;
>> +
>> +	ret = panthor_gpu_flush_caches(ptdev, l2_flush_op, lsc_flush_op, 0);
>> +	if (ret)
>> +		return ret;
>> +
>> +	/*
>> +	 * Explicitly unlock the region as the AS is not unlocked automatically
>> +	 * at the end of the GPU_CONTROL cache flush command, unlike
>> +	 * AS_COMMAND_FLUSH_MEM or AS_COMMAND_FLUSH_PT.
>> +	 */
>> +	write_cmd(ptdev, as_nr, AS_COMMAND_UNLOCK);
>> +
>> +	/* Wait for the unlock command to complete */
>> +	return wait_ready(ptdev, as_nr);
>> +}
>> +
>>  static int mmu_hw_do_operation_locked(struct panthor_device *ptdev, int as_nr,
>>  				      u64 iova, u64 size, u32 op)
>>  {
>> @@ -585,6 +616,10 @@ static int mmu_hw_do_operation_locked(struct panthor_device *ptdev, int as_nr,
>>  	if (op != AS_COMMAND_UNLOCK)
>>  		lock_region(ptdev, as_nr, iova, size);
>>  
>> +	if (panthor_hw_supports(ptdev,PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH))
>> +		if (op == AS_COMMAND_FLUSH_MEM || op == AS_COMMAND_FLUSH_PT)
>> +			return mmu_hw_do_flush_on_gpu_ctrl(ptdev, as_nr, op);
>> +
>>  	/* Run the MMU operation */
>>  	write_cmd(ptdev, as_nr, op);
>>  
> 

Re: [PATCH v4 7/7] drm/panthor: Add support for Mali-Gx20 and Mali-Gx25 GPUs

[Karunika Choo]

On 11/06/2025 00:45, Chia-I Wu wrote:
> On Mon, Jun 2, 2025 at 7:34 AM Karunika Choo <karunika.choo@arm.com> wrote:
>>
>> Mali-Gx20 and Mali-Gx25 deprecates the use of FLUSH_MEM and FLUSH_PT
>> MMU_AS commands in favour of cache maintenance via
>> GPU_COMMAND's FLUSH_CACHES and FLUSH_PA_RANGE.
>>
>> They also introduce the following registers:
>> - GPU_COMMAND_ARG0~1
>> - SHADER_PWRFEATURES
>> - AMBA_FEATURES
>> - AMBA_ENABLE
>>
>> This patch enables FLUSH_CACHES for both families of GPUs via the
>> PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH bit until FLUSH_PA_RANGE support
>> is added. It also adds the aforementioned register definitions and
>> firmware binary support for arch 12.8 and 13.8.
> <snipped>
>> diff --git a/drivers/gpu/drm/panthor/panthor_regs.h b/drivers/gpu/drm/panthor/panthor_regs.h
>> index 4eaa2b612756..8e01440f8743 100644
>> --- a/drivers/gpu/drm/panthor/panthor_regs.h
>> +++ b/drivers/gpu/drm/panthor/panthor_regs.h
>> @@ -89,6 +89,8 @@
>>
>>  #define GPU_DOORBELL_FEATURES                          0xC0
>>
>> +#define GPU_COMMAND_ARG(n)                             (0xD0 + ((n) * 8))
>> +
>>  #define GPU_SHADER_PRESENT                             0x100
>>  #define GPU_TILER_PRESENT                              0x110
>>  #define GPU_L2_PRESENT                                 0x120
>> @@ -98,6 +100,8 @@
>>  #define L2_READY                                       0x160
>>
>>  #define SHADER_PWRON                                   0x180
>> +#define SHADER_PWRFEATURES                             0x188
>> +#define   SHADER_PWRFEATURES_RAY_TRACING_UNIT          BIT(0)
>>  #define TILER_PWRON                                    0x190
>>  #define L2_PWRON                                       0x1A0
>>
>> @@ -125,6 +129,13 @@
>>  #define   GPU_COHERENCY_ACE                            1
>>  #define   GPU_COHERENCY_NONE                           31
>>
>> +#define AMBA_FEATURES                                  0x300
>> +#define   AMBA_FEATURES_ACE_LITE                       BIT(0)
>> +#define   AMBA_FEATURES_ACE                            BIT(1)
>> +#define   AMBA_FEATURES_SHAREABLE_CACHE_SUPPORT                BIT(5)
>> +
>> +#define AMBA_ENABLE                                    0x304
> We still use GPU_COHERENCY_FEATURES / GPU_COHERENCY_PROTOCOL even on
> v12 and v13.  I suppose they are compatible with AMBA_FEATURES /
> AMBA_ENABLE to some degree?  We should unify them.
Hello,

Due to some changes in the fields between AMBA_ENABLE and
GPU_COHERENCY_PROTOCOL, namely SHAREABLE_CACHE_SUPPORT, which has a
value of BIT(5), the previous assumption that FEATURE = BIT(PROTOCOL)
for GPU_COHERENCY_FEATURES is no longer valid.

As such, I have updated the field Macros for GPU_COHERENCY_FEATURES to
enable merging of the two register fields. Hopefully this addresses your
comments.

Kind regards,
Karunika