From: Paul Walmsley <pjw@kernel.org>
To: Rui Qi <qirui.001@bytedance.com>
Cc: palmer@dabbelt.com, pjw@kernel.org, aou@eecs.berkeley.edu,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Andy Chiu" <andybnac@gmail.com>,
"Björn Töpel" <bjorn@rivosinc.com>,
"open list:RISC-V ARCHITECTURE" <linux-riscv@lists.infradead.org>,
"open list" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] riscv: Gate FUNCTION_ALIGNMENT_4B on DYNAMIC_FTRACE
Date: Mon, 13 Jul 2026 11:40:10 -0600 (MDT) [thread overview]
Message-ID: <03933583-e2ce-ead0-65c8-320e43d9be97@kernel.org> (raw)
In-Reply-To: <20260706130415.463682-1-qirui.001@bytedance.com>
On Mon, 6 Jul 2026, Rui Qi wrote:
> The FUNCTION_ALIGNMENT_4B select forces the whole kernel to be built
> with -fmin-function-alignment=4. This alignment is only needed so the
> patchable-function-entry NOPs, which arch/riscv/Makefile emits under
> CONFIG_DYNAMIC_FTRACE, can be patched reliably on RISCV_ISA_C=y builds
> where compressed instructions otherwise allow 2-byte function
> alignment.
>
> The select is currently gated on HAVE_DYNAMIC_FTRACE, a capability bit
> that is selected whenever the toolchain supports dynamic ftrace, rather
> than on whether tracing is actually enabled. As a result every
> RISCV_ISA_C=y build gets 4-byte function alignment across the entire
> kernel even when function tracing is disabled, needlessly growing the
> kernel image and wasting instruction cache for a feature that is not
> in use.
>
> Gate the select on DYNAMIC_FTRACE instead, matching the condition under
> which arch/riscv/Makefile emits -fpatchable-function-entry, so the
> alignment is only applied when it is actually needed.
>
> Fixes: c41bf4326c7b ("riscv: ftrace: align patchable functions to 4 Byte boundary")
> Signed-off-by: Rui Qi <qirui.001@bytedance.com>
Thanks, queued for v7.2-rc.
- Paul
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WARNING: multiple messages have this Message-ID (diff)
From: Paul Walmsley <pjw@kernel.org>
To: Rui Qi <qirui.001@bytedance.com>
Cc: palmer@dabbelt.com, pjw@kernel.org, aou@eecs.berkeley.edu,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Andy Chiu" <andybnac@gmail.com>,
"Björn Töpel" <bjorn@rivosinc.com>,
"open list:RISC-V ARCHITECTURE" <linux-riscv@lists.infradead.org>,
"open list" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] riscv: Gate FUNCTION_ALIGNMENT_4B on DYNAMIC_FTRACE
Date: Mon, 13 Jul 2026 11:40:10 -0600 (MDT) [thread overview]
Message-ID: <03933583-e2ce-ead0-65c8-320e43d9be97@kernel.org> (raw)
In-Reply-To: <20260706130415.463682-1-qirui.001@bytedance.com>
On Mon, 6 Jul 2026, Rui Qi wrote:
> The FUNCTION_ALIGNMENT_4B select forces the whole kernel to be built
> with -fmin-function-alignment=4. This alignment is only needed so the
> patchable-function-entry NOPs, which arch/riscv/Makefile emits under
> CONFIG_DYNAMIC_FTRACE, can be patched reliably on RISCV_ISA_C=y builds
> where compressed instructions otherwise allow 2-byte function
> alignment.
>
> The select is currently gated on HAVE_DYNAMIC_FTRACE, a capability bit
> that is selected whenever the toolchain supports dynamic ftrace, rather
> than on whether tracing is actually enabled. As a result every
> RISCV_ISA_C=y build gets 4-byte function alignment across the entire
> kernel even when function tracing is disabled, needlessly growing the
> kernel image and wasting instruction cache for a feature that is not
> in use.
>
> Gate the select on DYNAMIC_FTRACE instead, matching the condition under
> which arch/riscv/Makefile emits -fpatchable-function-entry, so the
> alignment is only applied when it is actually needed.
>
> Fixes: c41bf4326c7b ("riscv: ftrace: align patchable functions to 4 Byte boundary")
> Signed-off-by: Rui Qi <qirui.001@bytedance.com>
Thanks, queued for v7.2-rc.
- Paul
next prev parent reply other threads:[~2026-07-13 17:40 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-06 13:04 [PATCH] riscv: Gate FUNCTION_ALIGNMENT_4B on DYNAMIC_FTRACE Rui Qi
2026-07-06 13:04 ` Rui Qi
2026-07-13 17:40 ` Paul Walmsley [this message]
2026-07-13 17:40 ` Paul Walmsley
2026-07-13 21:23 ` David Laight
2026-07-13 21:23 ` David Laight
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