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* [U-Boot-Users] Virtex-II Pro and Instruction Prefetching
@ 2003-06-14 12:27 Frank Smith
  2003-06-14 12:48 ` Robert Schwebel
  2003-06-14 13:45 ` [U-Boot-Users] " Wolfgang Denk
  0 siblings, 2 replies; 7+ messages in thread
From: Frank Smith @ 2003-06-14 12:27 UTC (permalink / raw)
  To: u-boot

Hello,

I'm working on getting PPCBoot 2.0.0 and Linux running on a custom
Virtex-II Pro development board.

I'm currently encountering problems with my DDR SDRAM controller --
it can't seem to handle instruction prefetching yet.  So to sidestep the
issue for now, I want to configure the 405 so that instructions
are not prefetched.

I've disabled instruction caching altogether (ICCR = 0x00000000) and I
have a core configuration register (CCR0) value of 0x00700000, which
according to the documentation has "prefetching for non-cachable
regions" disabled.

Even so, ChipScope is telling me that instructions are still 
being prefetched from SDRAM (sometimes 2 instructions, sometimes 4,
and sometimes 8 instructions at a time).  Is there anything else I have
to do to disable prefetching of non-cachable instructions?


Thanks,
Frank.

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2003-06-16  9:45 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2003-06-14 12:27 [U-Boot-Users] Virtex-II Pro and Instruction Prefetching Frank Smith
2003-06-14 12:48 ` Robert Schwebel
2003-06-14 13:45 ` [U-Boot-Users] " Wolfgang Denk
2003-06-14 14:04   ` Frank Smith
2003-06-14 15:35     ` Wolfgang Denk
2003-06-14 16:05       ` [U-Boot-Users] " Frank Smith
2003-06-16  9:45         ` Stefan Roese

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