[PATCH v2 0/3] iio: exynos-adc: use syscon instead of ioremap

[PATCH v2 0/3] iio: exynos-adc: use syscon instead of ioremap

[Naveen Krishna Chatradhi]

Changes since v1:
1. Rebased on top of togreg branch of IIO git.

This patch set does the following
1. Use the syscon and Regmap API instead of ioremappaing the
   ADC_PHY register from PMU.
2. Updates the Documentation in exynos-adc.txt with syscon phandle
   for the ADC nodes.
3. Updates the Dts files for Exynos3250, Exynos4x12, Exynos5250,
   Exynos5420 with the syscon phandle.

Tested on Exynos5420 based Peach PIT and Exynos5800 based Peach PI
by verifying sysfs entries provided by HWMON based NTC thermistors.

Tested-By for Exynos3250, Exynos4x12 would be appreciated.

Naveen Krishna Chatradhi (3):
  iio: exyno-adc: use syscon for PMU register access
  Documentation: dt-bindings: update exynos-adc.txt with syscon handle
  ARM: dts: exynos: Add sysreg phandle to ADC node

 .../devicetree/bindings/arm/samsung/exynos-adc.txt |    9 ++++--
 arch/arm/boot/dts/exynos3250.dtsi                  |    3 +-
 arch/arm/boot/dts/exynos4x12.dtsi                  |    3 +-
 arch/arm/boot/dts/exynos5250.dtsi                  |    3 +-
 arch/arm/boot/dts/exynos5420.dtsi                  |    3 +-
 drivers/iio/adc/exynos_adc.c                       |   30 ++++++++++++++------
 6 files changed, 36 insertions(+), 15 deletions(-)

-- 
1.7.9.5

[PATCH v2 0/3] iio: exynos-adc: use syscon instead of ioremap

[Naveen Krishna Chatradhi]

Changes since v1:
1. Rebased on top of togreg branch of IIO git.

This patch set does the following
1. Use the syscon and Regmap API instead of ioremappaing the
   ADC_PHY register from PMU.
2. Updates the Documentation in exynos-adc.txt with syscon phandle
   for the ADC nodes.
3. Updates the Dts files for Exynos3250, Exynos4x12, Exynos5250,
   Exynos5420 with the syscon phandle.

Tested on Exynos5420 based Peach PIT and Exynos5800 based Peach PI
by verifying sysfs entries provided by HWMON based NTC thermistors.

Tested-By for Exynos3250, Exynos4x12 would be appreciated.

Naveen Krishna Chatradhi (3):
  iio: exyno-adc: use syscon for PMU register access
  Documentation: dt-bindings: update exynos-adc.txt with syscon handle
  ARM: dts: exynos: Add sysreg phandle to ADC node

 .../devicetree/bindings/arm/samsung/exynos-adc.txt |    9 ++++--
 arch/arm/boot/dts/exynos3250.dtsi                  |    3 +-
 arch/arm/boot/dts/exynos4x12.dtsi                  |    3 +-
 arch/arm/boot/dts/exynos5250.dtsi                  |    3 +-
 arch/arm/boot/dts/exynos5420.dtsi                  |    3 +-
 drivers/iio/adc/exynos_adc.c                       |   30 ++++++++++++++------
 6 files changed, 36 insertions(+), 15 deletions(-)

-- 
1.7.9.5

[PATCH v2 1/3] iio: exyno-adc: use syscon for PMU register access

[Naveen Krishna Chatradhi]

This patch updates the IIO based ADC driver to use syscon and regmap
APIs to access and use PMU registers instead of remapping the PMU
registers in the driver.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
To: linux-iio@vger.kernel.org
---
Changes since v1:
Rebased on top of togreg branch of IIO git

 drivers/iio/adc/exynos_adc.c |   30 +++++++++++++++++++++---------
 1 file changed, 21 insertions(+), 9 deletions(-)

diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index 43620fd..fe03177 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -39,6 +39,8 @@
 #include <linux/iio/iio.h>
 #include <linux/iio/machine.h>
 #include <linux/iio/driver.h>
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
 
 /* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */
 #define ADC_V1_CON(x)		((x) + 0x00)
@@ -90,11 +92,14 @@
 
 #define EXYNOS_ADC_TIMEOUT	(msecs_to_jiffies(100))
 
+#define EXYNOS_ADCV1_PHY_OFFSET	0x0718
+#define EXYNOS_ADCV2_PHY_OFFSET	0x0720
+
 struct exynos_adc {
 	struct exynos_adc_data	*data;
 	struct device		*dev;
 	void __iomem		*regs;
-	void __iomem		*enable_reg;
+	struct regmap		*pmu_map;
 	struct clk		*clk;
 	struct clk		*sclk;
 	unsigned int		irq;
@@ -110,6 +115,7 @@ struct exynos_adc_data {
 	int num_channels;
 	bool needs_sclk;
 	bool needs_adc_phy;
+	int phy_offset;
 	u32 mask;
 
 	void (*init_hw)(struct exynos_adc *info);
@@ -183,7 +189,7 @@ static void exynos_adc_v1_init_hw(struct exynos_adc *info)
 	u32 con1;
 
 	if (info->data->needs_adc_phy)
-		writel(1, info->enable_reg);
+		regmap_write(info->pmu_map, info->data->phy_offset, 1);
 
 	/* set default prescaler values and Enable prescaler */
 	con1 =  ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
@@ -198,7 +204,7 @@ static void exynos_adc_v1_exit_hw(struct exynos_adc *info)
 	u32 con;
 
 	if (info->data->needs_adc_phy)
-		writel(0, info->enable_reg);
+		regmap_write(info->pmu_map, info->data->phy_offset, 0);
 
 	con = readl(ADC_V1_CON(info->regs));
 	con |= ADC_V1_CON_STANDBY;
@@ -225,6 +231,7 @@ static const struct exynos_adc_data exynos_adc_v1_data = {
 	.num_channels	= MAX_ADC_V1_CHANNELS,
 	.mask		= ADC_DATX_MASK,	/* 12 bit ADC resolution */
 	.needs_adc_phy	= true,
+	.phy_offset	= EXYNOS_ADCV1_PHY_OFFSET,
 
 	.init_hw	= exynos_adc_v1_init_hw,
 	.exit_hw	= exynos_adc_v1_exit_hw,
@@ -314,7 +321,7 @@ static void exynos_adc_v2_init_hw(struct exynos_adc *info)
 	u32 con1, con2;
 
 	if (info->data->needs_adc_phy)
-		writel(1, info->enable_reg);
+		regmap_write(info->pmu_map, info->data->phy_offset, 1);
 
 	con1 = ADC_V2_CON1_SOFT_RESET;
 	writel(con1, ADC_V2_CON1(info->regs));
@@ -332,7 +339,7 @@ static void exynos_adc_v2_exit_hw(struct exynos_adc *info)
 	u32 con;
 
 	if (info->data->needs_adc_phy)
-		writel(0, info->enable_reg);
+		regmap_write(info->pmu_map, info->data->phy_offset, 0);
 
 	con = readl(ADC_V2_CON1(info->regs));
 	con &= ~ADC_CON_EN_START;
@@ -362,6 +369,7 @@ static const struct exynos_adc_data exynos_adc_v2_data = {
 	.num_channels	= MAX_ADC_V2_CHANNELS,
 	.mask		= ADC_DATX_MASK, /* 12 bit ADC resolution */
 	.needs_adc_phy	= true,
+	.phy_offset	= EXYNOS_ADCV2_PHY_OFFSET,
 
 	.init_hw	= exynos_adc_v2_init_hw,
 	.exit_hw	= exynos_adc_v2_exit_hw,
@@ -374,6 +382,7 @@ static const struct exynos_adc_data exynos3250_adc_data = {
 	.mask		= ADC_DATX_MASK, /* 12 bit ADC resolution */
 	.needs_sclk	= true,
 	.needs_adc_phy	= true,
+	.phy_offset	= EXYNOS_ADCV1_PHY_OFFSET,
 
 	.init_hw	= exynos_adc_v2_init_hw,
 	.exit_hw	= exynos_adc_v2_exit_hw,
@@ -558,10 +567,13 @@ static int exynos_adc_probe(struct platform_device *pdev)
 
 
 	if (info->data->needs_adc_phy) {
-		mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-		info->enable_reg = devm_ioremap_resource(&pdev->dev, mem);
-		if (IS_ERR(info->enable_reg))
-			return PTR_ERR(info->enable_reg);
+		info->pmu_map = syscon_regmap_lookup_by_phandle(
+					pdev->dev.of_node,
+					"samsung,syscon-phandle");
+		if (IS_ERR(info->pmu_map)) {
+			dev_err(&pdev->dev, "syscon regmap lookup failed.\n");
+			return PTR_ERR(info->pmu_map);
+		}
 	}
 
 	irq = platform_get_irq(pdev, 0);
-- 
1.7.9.5

Re: [PATCH v2 1/3] iio: exyno-adc: use syscon for PMU register access

[Vivek Gautam]

Hi all,


CC'ing Naveen's gmail id, since the Samsung id is invalid now.


On Tue, Sep 16, 2014 at 2:28 PM, Naveen Krishna Chatradhi
<ch.naveen@samsung.com> wrote:
> This patch updates the IIO based ADC driver to use syscon and regmap
> APIs to access and use PMU registers instead of remapping the PMU
> registers in the driver.
>
> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
> To: linux-iio@vger.kernel.org
> ---
> Changes since v1:
> Rebased on top of togreg branch of IIO git

If the changes look good, then first two patches of this series can be
picked up ?
The last dt patch then belongs to samsung tree.

>
>  drivers/iio/adc/exynos_adc.c |   30 +++++++++++++++++++++---------
>  1 file changed, 21 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
> index 43620fd..fe03177 100644
> --- a/drivers/iio/adc/exynos_adc.c
> +++ b/drivers/iio/adc/exynos_adc.c
> @@ -39,6 +39,8 @@
>  #include <linux/iio/iio.h>
>  #include <linux/iio/machine.h>
>  #include <linux/iio/driver.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/regmap.h>
>
>  /* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */
>  #define ADC_V1_CON(x)          ((x) + 0x00)
> @@ -90,11 +92,14 @@
>
>  #define EXYNOS_ADC_TIMEOUT     (msecs_to_jiffies(100))
>
> +#define EXYNOS_ADCV1_PHY_OFFSET        0x0718
> +#define EXYNOS_ADCV2_PHY_OFFSET        0x0720
> +
>  struct exynos_adc {
>         struct exynos_adc_data  *data;
>         struct device           *dev;
>         void __iomem            *regs;
> -       void __iomem            *enable_reg;
> +       struct regmap           *pmu_map;
>         struct clk              *clk;
>         struct clk              *sclk;
>         unsigned int            irq;
> @@ -110,6 +115,7 @@ struct exynos_adc_data {
>         int num_channels;
>         bool needs_sclk;
>         bool needs_adc_phy;
> +       int phy_offset;
>         u32 mask;
>
>         void (*init_hw)(struct exynos_adc *info);
> @@ -183,7 +189,7 @@ static void exynos_adc_v1_init_hw(struct exynos_adc *info)
>         u32 con1;
>
>         if (info->data->needs_adc_phy)
> -               writel(1, info->enable_reg);
> +               regmap_write(info->pmu_map, info->data->phy_offset, 1);
>
>         /* set default prescaler values and Enable prescaler */
>         con1 =  ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
> @@ -198,7 +204,7 @@ static void exynos_adc_v1_exit_hw(struct exynos_adc *info)
>         u32 con;
>
>         if (info->data->needs_adc_phy)
> -               writel(0, info->enable_reg);
> +               regmap_write(info->pmu_map, info->data->phy_offset, 0);
>
>         con = readl(ADC_V1_CON(info->regs));
>         con |= ADC_V1_CON_STANDBY;
> @@ -225,6 +231,7 @@ static const struct exynos_adc_data exynos_adc_v1_data = {
>         .num_channels   = MAX_ADC_V1_CHANNELS,
>         .mask           = ADC_DATX_MASK,        /* 12 bit ADC resolution */
>         .needs_adc_phy  = true,
> +       .phy_offset     = EXYNOS_ADCV1_PHY_OFFSET,
>
>         .init_hw        = exynos_adc_v1_init_hw,
>         .exit_hw        = exynos_adc_v1_exit_hw,
> @@ -314,7 +321,7 @@ static void exynos_adc_v2_init_hw(struct exynos_adc *info)
>         u32 con1, con2;
>
>         if (info->data->needs_adc_phy)
> -               writel(1, info->enable_reg);
> +               regmap_write(info->pmu_map, info->data->phy_offset, 1);
>
>         con1 = ADC_V2_CON1_SOFT_RESET;
>         writel(con1, ADC_V2_CON1(info->regs));
> @@ -332,7 +339,7 @@ static void exynos_adc_v2_exit_hw(struct exynos_adc *info)
>         u32 con;
>
>         if (info->data->needs_adc_phy)
> -               writel(0, info->enable_reg);
> +               regmap_write(info->pmu_map, info->data->phy_offset, 0);
>
>         con = readl(ADC_V2_CON1(info->regs));
>         con &= ~ADC_CON_EN_START;
> @@ -362,6 +369,7 @@ static const struct exynos_adc_data exynos_adc_v2_data = {
>         .num_channels   = MAX_ADC_V2_CHANNELS,
>         .mask           = ADC_DATX_MASK, /* 12 bit ADC resolution */
>         .needs_adc_phy  = true,
> +       .phy_offset     = EXYNOS_ADCV2_PHY_OFFSET,
>
>         .init_hw        = exynos_adc_v2_init_hw,
>         .exit_hw        = exynos_adc_v2_exit_hw,
> @@ -374,6 +382,7 @@ static const struct exynos_adc_data exynos3250_adc_data = {
>         .mask           = ADC_DATX_MASK, /* 12 bit ADC resolution */
>         .needs_sclk     = true,
>         .needs_adc_phy  = true,
> +       .phy_offset     = EXYNOS_ADCV1_PHY_OFFSET,
>
>         .init_hw        = exynos_adc_v2_init_hw,
>         .exit_hw        = exynos_adc_v2_exit_hw,
> @@ -558,10 +567,13 @@ static int exynos_adc_probe(struct platform_device *pdev)
>
>
>         if (info->data->needs_adc_phy) {
> -               mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> -               info->enable_reg = devm_ioremap_resource(&pdev->dev, mem);
> -               if (IS_ERR(info->enable_reg))
> -                       return PTR_ERR(info->enable_reg);
> +               info->pmu_map = syscon_regmap_lookup_by_phandle(
> +                                       pdev->dev.of_node,
> +                                       "samsung,syscon-phandle");
> +               if (IS_ERR(info->pmu_map)) {
> +                       dev_err(&pdev->dev, "syscon regmap lookup failed.\n");
> +                       return PTR_ERR(info->pmu_map);
> +               }
>         }
>
>         irq = platform_get_irq(pdev, 0);
> --
> 1.7.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html



-- 
Best Regards
Vivek Gautam
Samsung R&D Institute, Bangalore
India

Re: [PATCH v2 1/3] iio: exyno-adc: use syscon for PMU register access

[Vivek Gautam]

Hi all,


CC'ing Naveen's gmail id, since the Samsung id is invalid now.


On Tue, Sep 16, 2014 at 2:28 PM, Naveen Krishna Chatradhi
<ch.naveen-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> wrote:
> This patch updates the IIO based ADC driver to use syscon and regmap
> APIs to access and use PMU registers instead of remapping the PMU
> registers in the driver.
>
> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> To: linux-iio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> ---
> Changes since v1:
> Rebased on top of togreg branch of IIO git

If the changes look good, then first two patches of this series can be
picked up ?
The last dt patch then belongs to samsung tree.

>
>  drivers/iio/adc/exynos_adc.c |   30 +++++++++++++++++++++---------
>  1 file changed, 21 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
> index 43620fd..fe03177 100644
> --- a/drivers/iio/adc/exynos_adc.c
> +++ b/drivers/iio/adc/exynos_adc.c
> @@ -39,6 +39,8 @@
>  #include <linux/iio/iio.h>
>  #include <linux/iio/machine.h>
>  #include <linux/iio/driver.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/regmap.h>
>
>  /* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */
>  #define ADC_V1_CON(x)          ((x) + 0x00)
> @@ -90,11 +92,14 @@
>
>  #define EXYNOS_ADC_TIMEOUT     (msecs_to_jiffies(100))
>
> +#define EXYNOS_ADCV1_PHY_OFFSET        0x0718
> +#define EXYNOS_ADCV2_PHY_OFFSET        0x0720
> +
>  struct exynos_adc {
>         struct exynos_adc_data  *data;
>         struct device           *dev;
>         void __iomem            *regs;
> -       void __iomem            *enable_reg;
> +       struct regmap           *pmu_map;
>         struct clk              *clk;
>         struct clk              *sclk;
>         unsigned int            irq;
> @@ -110,6 +115,7 @@ struct exynos_adc_data {
>         int num_channels;
>         bool needs_sclk;
>         bool needs_adc_phy;
> +       int phy_offset;
>         u32 mask;
>
>         void (*init_hw)(struct exynos_adc *info);
> @@ -183,7 +189,7 @@ static void exynos_adc_v1_init_hw(struct exynos_adc *info)
>         u32 con1;
>
>         if (info->data->needs_adc_phy)
> -               writel(1, info->enable_reg);
> +               regmap_write(info->pmu_map, info->data->phy_offset, 1);
>
>         /* set default prescaler values and Enable prescaler */
>         con1 =  ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
> @@ -198,7 +204,7 @@ static void exynos_adc_v1_exit_hw(struct exynos_adc *info)
>         u32 con;
>
>         if (info->data->needs_adc_phy)
> -               writel(0, info->enable_reg);
> +               regmap_write(info->pmu_map, info->data->phy_offset, 0);
>
>         con = readl(ADC_V1_CON(info->regs));
>         con |= ADC_V1_CON_STANDBY;
> @@ -225,6 +231,7 @@ static const struct exynos_adc_data exynos_adc_v1_data = {
>         .num_channels   = MAX_ADC_V1_CHANNELS,
>         .mask           = ADC_DATX_MASK,        /* 12 bit ADC resolution */
>         .needs_adc_phy  = true,
> +       .phy_offset     = EXYNOS_ADCV1_PHY_OFFSET,
>
>         .init_hw        = exynos_adc_v1_init_hw,
>         .exit_hw        = exynos_adc_v1_exit_hw,
> @@ -314,7 +321,7 @@ static void exynos_adc_v2_init_hw(struct exynos_adc *info)
>         u32 con1, con2;
>
>         if (info->data->needs_adc_phy)
> -               writel(1, info->enable_reg);
> +               regmap_write(info->pmu_map, info->data->phy_offset, 1);
>
>         con1 = ADC_V2_CON1_SOFT_RESET;
>         writel(con1, ADC_V2_CON1(info->regs));
> @@ -332,7 +339,7 @@ static void exynos_adc_v2_exit_hw(struct exynos_adc *info)
>         u32 con;
>
>         if (info->data->needs_adc_phy)
> -               writel(0, info->enable_reg);
> +               regmap_write(info->pmu_map, info->data->phy_offset, 0);
>
>         con = readl(ADC_V2_CON1(info->regs));
>         con &= ~ADC_CON_EN_START;
> @@ -362,6 +369,7 @@ static const struct exynos_adc_data exynos_adc_v2_data = {
>         .num_channels   = MAX_ADC_V2_CHANNELS,
>         .mask           = ADC_DATX_MASK, /* 12 bit ADC resolution */
>         .needs_adc_phy  = true,
> +       .phy_offset     = EXYNOS_ADCV2_PHY_OFFSET,
>
>         .init_hw        = exynos_adc_v2_init_hw,
>         .exit_hw        = exynos_adc_v2_exit_hw,
> @@ -374,6 +382,7 @@ static const struct exynos_adc_data exynos3250_adc_data = {
>         .mask           = ADC_DATX_MASK, /* 12 bit ADC resolution */
>         .needs_sclk     = true,
>         .needs_adc_phy  = true,
> +       .phy_offset     = EXYNOS_ADCV1_PHY_OFFSET,
>
>         .init_hw        = exynos_adc_v2_init_hw,
>         .exit_hw        = exynos_adc_v2_exit_hw,
> @@ -558,10 +567,13 @@ static int exynos_adc_probe(struct platform_device *pdev)
>
>
>         if (info->data->needs_adc_phy) {
> -               mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> -               info->enable_reg = devm_ioremap_resource(&pdev->dev, mem);
> -               if (IS_ERR(info->enable_reg))
> -                       return PTR_ERR(info->enable_reg);
> +               info->pmu_map = syscon_regmap_lookup_by_phandle(
> +                                       pdev->dev.of_node,
> +                                       "samsung,syscon-phandle");
> +               if (IS_ERR(info->pmu_map)) {
> +                       dev_err(&pdev->dev, "syscon regmap lookup failed.\n");
> +                       return PTR_ERR(info->pmu_map);
> +               }
>         }
>
>         irq = platform_get_irq(pdev, 0);
> --
> 1.7.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html



-- 
Best Regards
Vivek Gautam
Samsung R&D Institute, Bangalore
India

Re: [PATCH v2 1/3] iio: exyno-adc: use syscon for PMU register access

[Jonathan Cameron]

On 28/10/14 12:31, Vivek Gautam wrote:
> Hi all,
> 
> 
> CC'ing Naveen's gmail id, since the Samsung id is invalid now.
> 
> 
> On Tue, Sep 16, 2014 at 2:28 PM, Naveen Krishna Chatradhi
> <ch.naveen@samsung.com> wrote:
>> This patch updates the IIO based ADC driver to use syscon and regmap
>> APIs to access and use PMU registers instead of remapping the PMU
>> registers in the driver.
>>
>> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
>> To: linux-iio@vger.kernel.org
>> ---
>> Changes since v1:
>> Rebased on top of togreg branch of IIO git
> 
> If the changes look good, then first two patches of this series can be
> picked up ?
> The last dt patch then belongs to samsung tree.
Given the interlinked nature of the patches and Kukjin Kim's ack I'll
take the lot. Obviously if someone wants to pull the 3rd patch into
Samsung's tree as well, then git will deal with it just fine at merge
time!

Thanks,

Jonathan
> 
>>
>>  drivers/iio/adc/exynos_adc.c |   30 +++++++++++++++++++++---------
>>  1 file changed, 21 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
>> index 43620fd..fe03177 100644
>> --- a/drivers/iio/adc/exynos_adc.c
>> +++ b/drivers/iio/adc/exynos_adc.c
>> @@ -39,6 +39,8 @@
>>  #include <linux/iio/iio.h>
>>  #include <linux/iio/machine.h>
>>  #include <linux/iio/driver.h>
>> +#include <linux/mfd/syscon.h>
>> +#include <linux/regmap.h>
>>
>>  /* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */
>>  #define ADC_V1_CON(x)          ((x) + 0x00)
>> @@ -90,11 +92,14 @@
>>
>>  #define EXYNOS_ADC_TIMEOUT     (msecs_to_jiffies(100))
>>
>> +#define EXYNOS_ADCV1_PHY_OFFSET        0x0718
>> +#define EXYNOS_ADCV2_PHY_OFFSET        0x0720
>> +
>>  struct exynos_adc {
>>         struct exynos_adc_data  *data;
>>         struct device           *dev;
>>         void __iomem            *regs;
>> -       void __iomem            *enable_reg;
>> +       struct regmap           *pmu_map;
>>         struct clk              *clk;
>>         struct clk              *sclk;
>>         unsigned int            irq;
>> @@ -110,6 +115,7 @@ struct exynos_adc_data {
>>         int num_channels;
>>         bool needs_sclk;
>>         bool needs_adc_phy;
>> +       int phy_offset;
>>         u32 mask;
>>
>>         void (*init_hw)(struct exynos_adc *info);
>> @@ -183,7 +189,7 @@ static void exynos_adc_v1_init_hw(struct exynos_adc *info)
>>         u32 con1;
>>
>>         if (info->data->needs_adc_phy)
>> -               writel(1, info->enable_reg);
>> +               regmap_write(info->pmu_map, info->data->phy_offset, 1);
>>
>>         /* set default prescaler values and Enable prescaler */
>>         con1 =  ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
>> @@ -198,7 +204,7 @@ static void exynos_adc_v1_exit_hw(struct exynos_adc *info)
>>         u32 con;
>>
>>         if (info->data->needs_adc_phy)
>> -               writel(0, info->enable_reg);
>> +               regmap_write(info->pmu_map, info->data->phy_offset, 0);
>>
>>         con = readl(ADC_V1_CON(info->regs));
>>         con |= ADC_V1_CON_STANDBY;
>> @@ -225,6 +231,7 @@ static const struct exynos_adc_data exynos_adc_v1_data = {
>>         .num_channels   = MAX_ADC_V1_CHANNELS,
>>         .mask           = ADC_DATX_MASK,        /* 12 bit ADC resolution */
>>         .needs_adc_phy  = true,
>> +       .phy_offset     = EXYNOS_ADCV1_PHY_OFFSET,
>>
>>         .init_hw        = exynos_adc_v1_init_hw,
>>         .exit_hw        = exynos_adc_v1_exit_hw,
>> @@ -314,7 +321,7 @@ static void exynos_adc_v2_init_hw(struct exynos_adc *info)
>>         u32 con1, con2;
>>
>>         if (info->data->needs_adc_phy)
>> -               writel(1, info->enable_reg);
>> +               regmap_write(info->pmu_map, info->data->phy_offset, 1);
>>
>>         con1 = ADC_V2_CON1_SOFT_RESET;
>>         writel(con1, ADC_V2_CON1(info->regs));
>> @@ -332,7 +339,7 @@ static void exynos_adc_v2_exit_hw(struct exynos_adc *info)
>>         u32 con;
>>
>>         if (info->data->needs_adc_phy)
>> -               writel(0, info->enable_reg);
>> +               regmap_write(info->pmu_map, info->data->phy_offset, 0);
>>
>>         con = readl(ADC_V2_CON1(info->regs));
>>         con &= ~ADC_CON_EN_START;
>> @@ -362,6 +369,7 @@ static const struct exynos_adc_data exynos_adc_v2_data = {
>>         .num_channels   = MAX_ADC_V2_CHANNELS,
>>         .mask           = ADC_DATX_MASK, /* 12 bit ADC resolution */
>>         .needs_adc_phy  = true,
>> +       .phy_offset     = EXYNOS_ADCV2_PHY_OFFSET,
>>
>>         .init_hw        = exynos_adc_v2_init_hw,
>>         .exit_hw        = exynos_adc_v2_exit_hw,
>> @@ -374,6 +382,7 @@ static const struct exynos_adc_data exynos3250_adc_data = {
>>         .mask           = ADC_DATX_MASK, /* 12 bit ADC resolution */
>>         .needs_sclk     = true,
>>         .needs_adc_phy  = true,
>> +       .phy_offset     = EXYNOS_ADCV1_PHY_OFFSET,
>>
>>         .init_hw        = exynos_adc_v2_init_hw,
>>         .exit_hw        = exynos_adc_v2_exit_hw,
>> @@ -558,10 +567,13 @@ static int exynos_adc_probe(struct platform_device *pdev)
>>
>>
>>         if (info->data->needs_adc_phy) {
>> -               mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
>> -               info->enable_reg = devm_ioremap_resource(&pdev->dev, mem);
>> -               if (IS_ERR(info->enable_reg))
>> -                       return PTR_ERR(info->enable_reg);
>> +               info->pmu_map = syscon_regmap_lookup_by_phandle(
>> +                                       pdev->dev.of_node,
>> +                                       "samsung,syscon-phandle");
>> +               if (IS_ERR(info->pmu_map)) {
>> +                       dev_err(&pdev->dev, "syscon regmap lookup failed.\n");
>> +                       return PTR_ERR(info->pmu_map);
>> +               }
>>         }
>>
>>         irq = platform_get_irq(pdev, 0);
>> --
>> 1.7.9.5
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
> 
> 

Re: [PATCH v2 1/3] iio: exyno-adc: use syscon for PMU register access

[Jonathan Cameron]

On 16/09/14 09:58, Naveen Krishna Chatradhi wrote:
> This patch updates the IIO based ADC driver to use syscon and regmap
> APIs to access and use PMU registers instead of remapping the PMU
> registers in the driver.
> 
> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
> To: linux-iio@vger.kernel.org
Applied to the togreg branch of iio.git - initially pushed out as testing
for the autobuilders to play.


> ---
> Changes since v1:
> Rebased on top of togreg branch of IIO git
> 
>  drivers/iio/adc/exynos_adc.c |   30 +++++++++++++++++++++---------
>  1 file changed, 21 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
> index 43620fd..fe03177 100644
> --- a/drivers/iio/adc/exynos_adc.c
> +++ b/drivers/iio/adc/exynos_adc.c
> @@ -39,6 +39,8 @@
>  #include <linux/iio/iio.h>
>  #include <linux/iio/machine.h>
>  #include <linux/iio/driver.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/regmap.h>
>  
>  /* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */
>  #define ADC_V1_CON(x)		((x) + 0x00)
> @@ -90,11 +92,14 @@
>  
>  #define EXYNOS_ADC_TIMEOUT	(msecs_to_jiffies(100))
>  
> +#define EXYNOS_ADCV1_PHY_OFFSET	0x0718
> +#define EXYNOS_ADCV2_PHY_OFFSET	0x0720
> +
>  struct exynos_adc {
>  	struct exynos_adc_data	*data;
>  	struct device		*dev;
>  	void __iomem		*regs;
> -	void __iomem		*enable_reg;
> +	struct regmap		*pmu_map;
>  	struct clk		*clk;
>  	struct clk		*sclk;
>  	unsigned int		irq;
> @@ -110,6 +115,7 @@ struct exynos_adc_data {
>  	int num_channels;
>  	bool needs_sclk;
>  	bool needs_adc_phy;
> +	int phy_offset;
>  	u32 mask;
>  
>  	void (*init_hw)(struct exynos_adc *info);
> @@ -183,7 +189,7 @@ static void exynos_adc_v1_init_hw(struct exynos_adc *info)
>  	u32 con1;
>  
>  	if (info->data->needs_adc_phy)
> -		writel(1, info->enable_reg);
> +		regmap_write(info->pmu_map, info->data->phy_offset, 1);
>  
>  	/* set default prescaler values and Enable prescaler */
>  	con1 =  ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
> @@ -198,7 +204,7 @@ static void exynos_adc_v1_exit_hw(struct exynos_adc *info)
>  	u32 con;
>  
>  	if (info->data->needs_adc_phy)
> -		writel(0, info->enable_reg);
> +		regmap_write(info->pmu_map, info->data->phy_offset, 0);
>  
>  	con = readl(ADC_V1_CON(info->regs));
>  	con |= ADC_V1_CON_STANDBY;
> @@ -225,6 +231,7 @@ static const struct exynos_adc_data exynos_adc_v1_data = {
>  	.num_channels	= MAX_ADC_V1_CHANNELS,
>  	.mask		= ADC_DATX_MASK,	/* 12 bit ADC resolution */
>  	.needs_adc_phy	= true,
> +	.phy_offset	= EXYNOS_ADCV1_PHY_OFFSET,
>  
>  	.init_hw	= exynos_adc_v1_init_hw,
>  	.exit_hw	= exynos_adc_v1_exit_hw,
> @@ -314,7 +321,7 @@ static void exynos_adc_v2_init_hw(struct exynos_adc *info)
>  	u32 con1, con2;
>  
>  	if (info->data->needs_adc_phy)
> -		writel(1, info->enable_reg);
> +		regmap_write(info->pmu_map, info->data->phy_offset, 1);
>  
>  	con1 = ADC_V2_CON1_SOFT_RESET;
>  	writel(con1, ADC_V2_CON1(info->regs));
> @@ -332,7 +339,7 @@ static void exynos_adc_v2_exit_hw(struct exynos_adc *info)
>  	u32 con;
>  
>  	if (info->data->needs_adc_phy)
> -		writel(0, info->enable_reg);
> +		regmap_write(info->pmu_map, info->data->phy_offset, 0);
>  
>  	con = readl(ADC_V2_CON1(info->regs));
>  	con &= ~ADC_CON_EN_START;
> @@ -362,6 +369,7 @@ static const struct exynos_adc_data exynos_adc_v2_data = {
>  	.num_channels	= MAX_ADC_V2_CHANNELS,
>  	.mask		= ADC_DATX_MASK, /* 12 bit ADC resolution */
>  	.needs_adc_phy	= true,
> +	.phy_offset	= EXYNOS_ADCV2_PHY_OFFSET,
>  
>  	.init_hw	= exynos_adc_v2_init_hw,
>  	.exit_hw	= exynos_adc_v2_exit_hw,
> @@ -374,6 +382,7 @@ static const struct exynos_adc_data exynos3250_adc_data = {
>  	.mask		= ADC_DATX_MASK, /* 12 bit ADC resolution */
>  	.needs_sclk	= true,
>  	.needs_adc_phy	= true,
> +	.phy_offset	= EXYNOS_ADCV1_PHY_OFFSET,
>  
>  	.init_hw	= exynos_adc_v2_init_hw,
>  	.exit_hw	= exynos_adc_v2_exit_hw,
> @@ -558,10 +567,13 @@ static int exynos_adc_probe(struct platform_device *pdev)
>  
>  
>  	if (info->data->needs_adc_phy) {
> -		mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> -		info->enable_reg = devm_ioremap_resource(&pdev->dev, mem);
> -		if (IS_ERR(info->enable_reg))
> -			return PTR_ERR(info->enable_reg);
> +		info->pmu_map = syscon_regmap_lookup_by_phandle(
> +					pdev->dev.of_node,
> +					"samsung,syscon-phandle");
> +		if (IS_ERR(info->pmu_map)) {
> +			dev_err(&pdev->dev, "syscon regmap lookup failed.\n");
> +			return PTR_ERR(info->pmu_map);
> +		}
>  	}
>  
>  	irq = platform_get_irq(pdev, 0);
> 

[PATCH v2 2/3] Documentation: dt-bindings: update exynos-adc.txt with syscon handle

[Naveen Krishna Chatradhi]

This patch updates the DT bindings for ADC in exynos-adc.txt with the
syscon phandle to the ADC nodes.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
To: devicetree@vger.kernel.org
---
 .../devicetree/bindings/arm/samsung/exynos-adc.txt |    9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
index 709efaa..c368210 100644
--- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
@@ -43,13 +43,16 @@ Required properties:
 				   compatible ADC block)
 - vdd-supply		VDD input supply.
 
+- samsung,syscon-phandle Contains the PMU system controller node
+			(To access the ADC_PHY register on Exynos5250/5420/5800/3250)
+
 Note: child nodes can be added for auto probing from device tree.
 
 Example: adding device info in dtsi file
 
 adc: adc@12D10000 {
 	compatible = "samsung,exynos-adc-v1";
-	reg = <0x12D10000 0x100>, <0x10040718 0x4>;
+	reg = <0x12D10000 0x100>;
 	interrupts = <0 106 0>;
 	#io-channel-cells = <1>;
 	io-channel-ranges;
@@ -58,13 +61,14 @@ adc: adc@12D10000 {
 	clock-names = "adc";
 
 	vdd-supply = <&buck5_reg>;
+	samsung,syscon-phandle = <&pmu_system_controller>;
 };
 
 Example: adding device info in dtsi file for Exynos3250 with additional sclk
 
 adc: adc@126C0000 {
 	compatible = "samsung,exynos3250-adc", "samsung,exynos-adc-v2;
-	reg = <0x126C0000 0x100>, <0x10020718 0x4>;
+	reg = <0x126C0000 0x100>;
 	interrupts = <0 137 0>;
 	#io-channel-cells = <1>;
 	io-channel-ranges;
@@ -73,6 +77,7 @@ adc: adc@126C0000 {
 	clock-names = "adc", "sclk";
 
 	vdd-supply = <&buck5_reg>;
+	samsung,syscon-phandle = <&pmu_system_controller>;
 };
 
 Example: Adding child nodes in dts file
-- 
1.7.9.5

Re: [PATCH v2 2/3] Documentation: dt-bindings: update exynos-adc.txt with syscon handle

[Jonathan Cameron]

On 16/09/14 09:58, Naveen Krishna Chatradhi wrote:
> This patch updates the DT bindings for ADC in exynos-adc.txt with the
> syscon phandle to the ADC nodes.
> 
> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
> To: devicetree@vger.kernel.org
Applied to the togreg branch of iio.git - initially pushed out as testing.

Thanks,
> ---
>  .../devicetree/bindings/arm/samsung/exynos-adc.txt |    9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
> index 709efaa..c368210 100644
> --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
> +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
> @@ -43,13 +43,16 @@ Required properties:
>  				   compatible ADC block)
>  - vdd-supply		VDD input supply.
>  
> +- samsung,syscon-phandle Contains the PMU system controller node
> +			(To access the ADC_PHY register on Exynos5250/5420/5800/3250)
> +
>  Note: child nodes can be added for auto probing from device tree.
>  
>  Example: adding device info in dtsi file
>  
>  adc: adc@12D10000 {
>  	compatible = "samsung,exynos-adc-v1";
> -	reg = <0x12D10000 0x100>, <0x10040718 0x4>;
> +	reg = <0x12D10000 0x100>;
>  	interrupts = <0 106 0>;
>  	#io-channel-cells = <1>;
>  	io-channel-ranges;
> @@ -58,13 +61,14 @@ adc: adc@12D10000 {
>  	clock-names = "adc";
>  
>  	vdd-supply = <&buck5_reg>;
> +	samsung,syscon-phandle = <&pmu_system_controller>;
>  };
>  
>  Example: adding device info in dtsi file for Exynos3250 with additional sclk
>  
>  adc: adc@126C0000 {
>  	compatible = "samsung,exynos3250-adc", "samsung,exynos-adc-v2;
> -	reg = <0x126C0000 0x100>, <0x10020718 0x4>;
> +	reg = <0x126C0000 0x100>;
>  	interrupts = <0 137 0>;
>  	#io-channel-cells = <1>;
>  	io-channel-ranges;
> @@ -73,6 +77,7 @@ adc: adc@126C0000 {
>  	clock-names = "adc", "sclk";
>  
>  	vdd-supply = <&buck5_reg>;
> +	samsung,syscon-phandle = <&pmu_system_controller>;
>  };
>  
>  Example: Adding child nodes in dts file
> 

[PATCH v2 3/3] ARM: dts: exynos: Add sysreg phandle to ADC node

[Naveen Krishna Chatradhi]

Instead of using the ADC_PHY register base address, use sysreg phandle
in ADC node to control ADC_PHY configuration register.

This patch adds syscon node for Exynos3250, Exynos4x12, Exynos5250,
and Exynos5420, Exynos5800.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
To: linux-samsung-soc@vger.kernel.org
---
 arch/arm/boot/dts/exynos3250.dtsi |    3 ++-
 arch/arm/boot/dts/exynos4x12.dtsi |    3 ++-
 arch/arm/boot/dts/exynos5250.dtsi |    3 ++-
 arch/arm/boot/dts/exynos5420.dtsi |    3 ++-
 4 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 1d52de6..b997a4c 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -272,12 +272,13 @@
 		adc: adc@126C0000 {
 			compatible = "samsung,exynos3250-adc",
 				     "samsung,exynos-adc-v2";
-			reg = <0x126C0000 0x100>, <0x10020718 0x4>;
+			reg = <0x126C0000 0x100>;
 			interrupts = <0 137 0>;
 			clock-names = "adc", "sclk";
 			clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
 			#io-channel-cells = <1>;
 			io-channel-ranges;
+			samsung,syscon-phandle = <&pmu_system_controller>;
 			status = "disabled";
 		};
 
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 861bb91..9ee77d3 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -108,13 +108,14 @@
 
 	adc: adc@126C0000 {
 		compatible = "samsung,exynos-adc-v1";
-		reg = <0x126C0000 0x100>, <0x10020718 0x4>;
+		reg = <0x126C0000 0x100>;
 		interrupt-parent = <&combiner>;
 		interrupts = <10 3>;
 		clocks = <&clock CLK_TSADC>;
 		clock-names = "adc";
 		#io-channel-cells = <1>;
 		io-channel-ranges;
+		samsung,syscon-phandle = <&pmu_system_controller>;
 		status = "disabled";
 	};
 
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 492e1ef..108adc5 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -765,12 +765,13 @@
 
 	adc: adc@12D10000 {
 		compatible = "samsung,exynos-adc-v1";
-		reg = <0x12D10000 0x100>, <0x10040718 0x4>;
+		reg = <0x12D10000 0x100>;
 		interrupts = <0 106 0>;
 		clocks = <&clock CLK_ADC>;
 		clock-names = "adc";
 		#io-channel-cells = <1>;
 		io-channel-ranges;
+		samsung,syscon-phandle = <&pmu_system_controller>;
 		status = "disabled";
 	};
 
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index bfe056d..5fd587a 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -541,12 +541,13 @@
 
 	adc: adc@12D10000 {
 		compatible = "samsung,exynos-adc-v2";
-		reg = <0x12D10000 0x100>, <0x10040720 0x4>;
+		reg = <0x12D10000 0x100>;
 		interrupts = <0 106 0>;
 		clocks = <&clock CLK_TSADC>;
 		clock-names = "adc";
 		#io-channel-cells = <1>;
 		io-channel-ranges;
+		samsung,syscon-phandle = <&pmu_system_controller>;
 		status = "disabled";
 	};
 
-- 
1.7.9.5

Re: [PATCH v2 3/3] ARM: dts: exynos: Add sysreg phandle to ADC node

[Jonathan Cameron]

On 16/09/14 09:58, Naveen Krishna Chatradhi wrote:
> Instead of using the ADC_PHY register base address, use sysreg phandle
> in ADC node to control ADC_PHY configuration register.
> 
> This patch adds syscon node for Exynos3250, Exynos4x12, Exynos5250,
> and Exynos5420, Exynos5800.
> 
> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
> To: linux-samsung-soc@vger.kernel.org
Applied to the togreg branch of iio.git - initially pushed out as testing.

As this is very closely tied with the driver changes I've applied it through
the IIO tree.  If it turns up in the samsung tree as well, we can let git
work it's magic to drop one of the copies!

Jonathan
> ---
>  arch/arm/boot/dts/exynos3250.dtsi |    3 ++-
>  arch/arm/boot/dts/exynos4x12.dtsi |    3 ++-
>  arch/arm/boot/dts/exynos5250.dtsi |    3 ++-
>  arch/arm/boot/dts/exynos5420.dtsi |    3 ++-
>  4 files changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
> index 1d52de6..b997a4c 100644
> --- a/arch/arm/boot/dts/exynos3250.dtsi
> +++ b/arch/arm/boot/dts/exynos3250.dtsi
> @@ -272,12 +272,13 @@
>  		adc: adc@126C0000 {
>  			compatible = "samsung,exynos3250-adc",
>  				     "samsung,exynos-adc-v2";
> -			reg = <0x126C0000 0x100>, <0x10020718 0x4>;
> +			reg = <0x126C0000 0x100>;
>  			interrupts = <0 137 0>;
>  			clock-names = "adc", "sclk";
>  			clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
>  			#io-channel-cells = <1>;
>  			io-channel-ranges;
> +			samsung,syscon-phandle = <&pmu_system_controller>;
>  			status = "disabled";
>  		};
>  
> diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
> index 861bb91..9ee77d3 100644
> --- a/arch/arm/boot/dts/exynos4x12.dtsi
> +++ b/arch/arm/boot/dts/exynos4x12.dtsi
> @@ -108,13 +108,14 @@
>  
>  	adc: adc@126C0000 {
>  		compatible = "samsung,exynos-adc-v1";
> -		reg = <0x126C0000 0x100>, <0x10020718 0x4>;
> +		reg = <0x126C0000 0x100>;
>  		interrupt-parent = <&combiner>;
>  		interrupts = <10 3>;
>  		clocks = <&clock CLK_TSADC>;
>  		clock-names = "adc";
>  		#io-channel-cells = <1>;
>  		io-channel-ranges;
> +		samsung,syscon-phandle = <&pmu_system_controller>;
>  		status = "disabled";
>  	};
>  
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
> index 492e1ef..108adc5 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -765,12 +765,13 @@
>  
>  	adc: adc@12D10000 {
>  		compatible = "samsung,exynos-adc-v1";
> -		reg = <0x12D10000 0x100>, <0x10040718 0x4>;
> +		reg = <0x12D10000 0x100>;
>  		interrupts = <0 106 0>;
>  		clocks = <&clock CLK_ADC>;
>  		clock-names = "adc";
>  		#io-channel-cells = <1>;
>  		io-channel-ranges;
> +		samsung,syscon-phandle = <&pmu_system_controller>;
>  		status = "disabled";
>  	};
>  
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index bfe056d..5fd587a 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -541,12 +541,13 @@
>  
>  	adc: adc@12D10000 {
>  		compatible = "samsung,exynos-adc-v2";
> -		reg = <0x12D10000 0x100>, <0x10040720 0x4>;
> +		reg = <0x12D10000 0x100>;
>  		interrupts = <0 106 0>;
>  		clocks = <&clock CLK_TSADC>;
>  		clock-names = "adc";
>  		#io-channel-cells = <1>;
>  		io-channel-ranges;
> +		samsung,syscon-phandle = <&pmu_system_controller>;
>  		status = "disabled";
>  	};
>  
> 

Re: [PATCH v2 0/3] iio: exynos-adc: use syscon instead of ioremap

[Jonathan Cameron]

On 16/09/14 09:58, Naveen Krishna Chatradhi wrote:
> Changes since v1:
> 1. Rebased on top of togreg branch of IIO git.
> 
> This patch set does the following
> 1. Use the syscon and Regmap API instead of ioremappaing the
>    ADC_PHY register from PMU.
> 2. Updates the Documentation in exynos-adc.txt with syscon phandle
>    for the ADC nodes.
> 3. Updates the Dts files for Exynos3250, Exynos4x12, Exynos5250,
>    Exynos5420 with the syscon phandle.
> 
> Tested on Exynos5420 based Peach PIT and Exynos5800 based Peach PI
> by verifying sysfs entries provided by HWMON based NTC thermistors.
> 
> Tested-By for Exynos3250, Exynos4x12 would be appreciated.
Would definitely be good!

The main issue I have with this series is that it breaks backward
compatibility with old device trees and newer kernels.

Now I appreciate that sometimes there are reasons to do it but want this
to have deeper consideration (and acks to show it) from the Exynos side
of things and preferably from the device tree side of things as well.

cc'd Kukjin Kim for the Exynos side of things as the listed Maintainer.

Otherwise, the series looks fine to me.
> 
> Naveen Krishna Chatradhi (3):
>   iio: exyno-adc: use syscon for PMU register access
>   Documentation: dt-bindings: update exynos-adc.txt with syscon handle
>   ARM: dts: exynos: Add sysreg phandle to ADC node
> 
>  .../devicetree/bindings/arm/samsung/exynos-adc.txt |    9 ++++--
>  arch/arm/boot/dts/exynos3250.dtsi                  |    3 +-
>  arch/arm/boot/dts/exynos4x12.dtsi                  |    3 +-
>  arch/arm/boot/dts/exynos5250.dtsi                  |    3 +-
>  arch/arm/boot/dts/exynos5420.dtsi                  |    3 +-
>  drivers/iio/adc/exynos_adc.c                       |   30 ++++++++++++++------
>  6 files changed, 36 insertions(+), 15 deletions(-)
> 

Re: [PATCH v2 0/3] iio: exynos-adc: use syscon instead of ioremap

[Jonathan Cameron]

On 16/09/14 09:58, Naveen Krishna Chatradhi wrote:
> Changes since v1:
> 1. Rebased on top of togreg branch of IIO git.
> 
> This patch set does the following
> 1. Use the syscon and Regmap API instead of ioremappaing the
>    ADC_PHY register from PMU.
> 2. Updates the Documentation in exynos-adc.txt with syscon phandle
>    for the ADC nodes.
> 3. Updates the Dts files for Exynos3250, Exynos4x12, Exynos5250,
>    Exynos5420 with the syscon phandle.
> 
> Tested on Exynos5420 based Peach PIT and Exynos5800 based Peach PI
> by verifying sysfs entries provided by HWMON based NTC thermistors.
> 
> Tested-By for Exynos3250, Exynos4x12 would be appreciated.
Would definitely be good!

The main issue I have with this series is that it breaks backward
compatibility with old device trees and newer kernels.

Now I appreciate that sometimes there are reasons to do it but want this
to have deeper consideration (and acks to show it) from the Exynos side
of things and preferably from the device tree side of things as well.

cc'd Kukjin Kim for the Exynos side of things as the listed Maintainer.

Otherwise, the series looks fine to me.
> 
> Naveen Krishna Chatradhi (3):
>   iio: exyno-adc: use syscon for PMU register access
>   Documentation: dt-bindings: update exynos-adc.txt with syscon handle
>   ARM: dts: exynos: Add sysreg phandle to ADC node
> 
>  .../devicetree/bindings/arm/samsung/exynos-adc.txt |    9 ++++--
>  arch/arm/boot/dts/exynos3250.dtsi                  |    3 +-
>  arch/arm/boot/dts/exynos4x12.dtsi                  |    3 +-
>  arch/arm/boot/dts/exynos5250.dtsi                  |    3 +-
>  arch/arm/boot/dts/exynos5420.dtsi                  |    3 +-
>  drivers/iio/adc/exynos_adc.c                       |   30 ++++++++++++++------
>  6 files changed, 36 insertions(+), 15 deletions(-)
> 

Re: [PATCH v2 0/3] iio: exynos-adc: use syscon instead of ioremap

[Jonathan Cameron]

On 21/09/14 13:17, Jonathan Cameron wrote:
> On 16/09/14 09:58, Naveen Krishna Chatradhi wrote:
>> Changes since v1:
>> 1. Rebased on top of togreg branch of IIO git.
>>
>> This patch set does the following
>> 1. Use the syscon and Regmap API instead of ioremappaing the
>>    ADC_PHY register from PMU.
>> 2. Updates the Documentation in exynos-adc.txt with syscon phandle
>>    for the ADC nodes.
>> 3. Updates the Dts files for Exynos3250, Exynos4x12, Exynos5250,
>>    Exynos5420 with the syscon phandle.
>>
>> Tested on Exynos5420 based Peach PIT and Exynos5800 based Peach PI
>> by verifying sysfs entries provided by HWMON based NTC thermistors.
>>
>> Tested-By for Exynos3250, Exynos4x12 would be appreciated.
> Would definitely be good!
> 
> The main issue I have with this series is that it breaks backward
> compatibility with old device trees and newer kernels.
> 
> Now I appreciate that sometimes there are reasons to do it but want this
> to have deeper consideration (and acks to show it) from the Exynos side
> of things and preferably from the device tree side of things as well.
> 
> cc'd Kukjin Kim for the Exynos side of things as the listed Maintainer.
> 
> Otherwise, the series looks fine to me.
Kukjin? Sorry to pester, but this has been sat in my waiting queue for a
while now.
>>
>> Naveen Krishna Chatradhi (3):
>>   iio: exyno-adc: use syscon for PMU register access
>>   Documentation: dt-bindings: update exynos-adc.txt with syscon handle
>>   ARM: dts: exynos: Add sysreg phandle to ADC node
>>
>>  .../devicetree/bindings/arm/samsung/exynos-adc.txt |    9 ++++--
>>  arch/arm/boot/dts/exynos3250.dtsi                  |    3 +-
>>  arch/arm/boot/dts/exynos4x12.dtsi                  |    3 +-
>>  arch/arm/boot/dts/exynos5250.dtsi                  |    3 +-
>>  arch/arm/boot/dts/exynos5420.dtsi                  |    3 +-
>>  drivers/iio/adc/exynos_adc.c                       |   30 ++++++++++++++------
>>  6 files changed, 36 insertions(+), 15 deletions(-)
>>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-iio" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: [PATCH v2 0/3] iio: exynos-adc: use syscon instead of ioremap

[Jonathan Cameron]

On 09/10/14 21:05, Jonathan Cameron wrote:
> On 21/09/14 13:17, Jonathan Cameron wrote:
>> On 16/09/14 09:58, Naveen Krishna Chatradhi wrote:
>>> Changes since v1:
>>> 1. Rebased on top of togreg branch of IIO git.
>>>
>>> This patch set does the following
>>> 1. Use the syscon and Regmap API instead of ioremappaing the
>>>    ADC_PHY register from PMU.
>>> 2. Updates the Documentation in exynos-adc.txt with syscon phandle
>>>    for the ADC nodes.
>>> 3. Updates the Dts files for Exynos3250, Exynos4x12, Exynos5250,
>>>    Exynos5420 with the syscon phandle.
>>>
>>> Tested on Exynos5420 based Peach PIT and Exynos5800 based Peach PI
>>> by verifying sysfs entries provided by HWMON based NTC thermistors.
>>>
>>> Tested-By for Exynos3250, Exynos4x12 would be appreciated.
>> Would definitely be good!
>>
>> The main issue I have with this series is that it breaks backward
>> compatibility with old device trees and newer kernels.
>>
>> Now I appreciate that sometimes there are reasons to do it but want this
>> to have deeper consideration (and acks to show it) from the Exynos side
>> of things and preferably from the device tree side of things as well.
>>
>> cc'd Kukjin Kim for the Exynos side of things as the listed Maintainer.
>>
>> Otherwise, the series looks fine to me.
> Kukjin? Sorry to pester, but this has been sat in my waiting queue for a
> while now.
This is still sitting here waiting for those acks from Exynos side of things.
I'm happy to let this sit indefinitely, but does seem a little silly.
>>>
>>> Naveen Krishna Chatradhi (3):
>>>   iio: exyno-adc: use syscon for PMU register access
>>>   Documentation: dt-bindings: update exynos-adc.txt with syscon handle
>>>   ARM: dts: exynos: Add sysreg phandle to ADC node
>>>
>>>  .../devicetree/bindings/arm/samsung/exynos-adc.txt |    9 ++++--
>>>  arch/arm/boot/dts/exynos3250.dtsi                  |    3 +-
>>>  arch/arm/boot/dts/exynos4x12.dtsi                  |    3 +-
>>>  arch/arm/boot/dts/exynos5250.dtsi                  |    3 +-
>>>  arch/arm/boot/dts/exynos5420.dtsi                  |    3 +-
>>>  drivers/iio/adc/exynos_adc.c                       |   30 ++++++++++++++------
>>>  6 files changed, 36 insertions(+), 15 deletions(-)
>>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-iio" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-iio" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

RE: [PATCH v2 0/3] iio: exynos-adc: use syscon instead of ioremap

[Kukjin Kim]

Jonathan Cameron wrote:
> 
> On 09/10/14 21:05, Jonathan Cameron wrote:
> > On 21/09/14 13:17, Jonathan Cameron wrote:
> >> On 16/09/14 09:58, Naveen Krishna Chatradhi wrote:
> >>> Changes since v1:
> >>> 1. Rebased on top of togreg branch of IIO git.
> >>>
> >>> This patch set does the following
> >>> 1. Use the syscon and Regmap API instead of ioremappaing the
> >>>    ADC_PHY register from PMU.
> >>> 2. Updates the Documentation in exynos-adc.txt with syscon phandle
> >>>    for the ADC nodes.
> >>> 3. Updates the Dts files for Exynos3250, Exynos4x12, Exynos5250,
> >>>    Exynos5420 with the syscon phandle.
> >>>
> >>> Tested on Exynos5420 based Peach PIT and Exynos5800 based Peach PI
> >>> by verifying sysfs entries provided by HWMON based NTC thermistors.
> >>>
> >>> Tested-By for Exynos3250, Exynos4x12 would be appreciated.
> >> Would definitely be good!
> >>
> >> The main issue I have with this series is that it breaks backward
> >> compatibility with old device trees and newer kernels.
> >>
> >> Now I appreciate that sometimes there are reasons to do it but want this
> >> to have deeper consideration (and acks to show it) from the Exynos side
> >> of things and preferably from the device tree side of things as well.
> >>
> >> cc'd Kukjin Kim for the Exynos side of things as the listed Maintainer.
> >>
> >> Otherwise, the series looks fine to me.
> > Kukjin? Sorry to pester, but this has been sat in my waiting queue for a
> > while now.
> This is still sitting here waiting for those acks from Exynos side of things.
> I'm happy to let this sit indefinitely, but does seem a little silly.
> >>>

Thanks for asking :)

Since I've missed the patch in my mailbox and just now checked. I'm happy with
Naveen's dt updates, I'm not sure we can see useless merge conflicts though ;)
Anyway it should be small, so please feel free to add my ack on the change.

Acked-by: Kukjin Kim <kgene.kim@samsung.com>

- Kukjin

> >>> Naveen Krishna Chatradhi (3):
> >>>   iio: exyno-adc: use syscon for PMU register access
> >>>   Documentation: dt-bindings: update exynos-adc.txt with syscon handle
> >>>   ARM: dts: exynos: Add sysreg phandle to ADC node
> >>>
> >>>  .../devicetree/bindings/arm/samsung/exynos-adc.txt |    9 ++++--
> >>>  arch/arm/boot/dts/exynos3250.dtsi                  |    3 +-
> >>>  arch/arm/boot/dts/exynos4x12.dtsi                  |    3 +-
> >>>  arch/arm/boot/dts/exynos5250.dtsi                  |    3 +-
> >>>  arch/arm/boot/dts/exynos5420.dtsi                  |    3 +-
> >>>  drivers/iio/adc/exynos_adc.c                       |   30 ++++++++++++++------
> >>>  6 files changed, 36 insertions(+), 15 deletions(-)