All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Jiawen Wu" <jiawenwu@trustnetic.com>
To: "'Russell King \(Oracle\)'" <linux@armlinux.org.uk>
Cc: <netdev@vger.kernel.org>, <andrew@lunn.ch>,
	<hkallweit1@gmail.com>, <Jose.Abreu@synopsys.com>,
	<mengyuanlou@net-swift.com>
Subject: RE: [PATCH net-next 4/7] net: pcs: xpcs: adapt Wangxun NICs for SGMII mode
Date: Tue, 25 Jul 2023 18:45:04 +0800	[thread overview]
Message-ID: <03f501d9bee5$11fc0ea0$35f42be0$@trustnetic.com> (raw)
In-Reply-To: <ZL+fF4365f0Q9QDD@shell.armlinux.org.uk>

On Tuesday, July 25, 2023 6:08 PM, Russell King (Oracle) wrote:
> On Tue, Jul 25, 2023 at 10:58:25AM +0100, Russell King (Oracle) wrote:
> > > The information obtained from the IC designer is that "PHY/MAC side SGMII"
> > > is configured by experimentation. For these different kinds of NICs:
> > > 1) fiber + SFP-RJ45 module: PHY side SGMII
> > > 2) copper (pcs + external PHY): MAC side SGMII
> >
> > This makes no sense. a PHY on a RJ45 SFP module is just the same as a
> > PHY integrated into a board with the MAC.
> 
> 
> MAC ---- PCS <----- sgmii -----> PHY (whether on a board or SFP)
> 
> Control word flow:
>              <------------------ link, speed, duplex
> 	     ------------------> acknowledge (value = 0x4001)
> 
> Sometimes, it's possible to connect two MACs/PCSs together:
> 
> MAC ---- PCS <----- sgmii -----> PCS ---- MAC
> 
> and in this case, one PCS would need to be configured in "MAC" mode
> and the other would need to be configured in "PHY" mode because SGMII
> is fundamentally asymmetric.
> 
> Here is the definition of the control word sent by either end:
> 
> Bit	MAC->PHY	PHY->MAC
> 15	0: Reserved	Link status, 1 = link up
> 14	1: Acknowledge	Reserved for AN acknowledge
> 13	0: Reserved	0: Reserved
> 12	0: Reserved	Duplex mode 1 = full, 0 = half
> 11:10	0: Reserved	Speed 11 = Reserved 10=1G, 01=100M, 00=10M
> 9:1	0: Reserved	0: Reserved
> 0	1		1
> 
> So my guess would be that "PHY side SGMII" means the device generates
> the "PHY->MAC" format word whereas "MAC side SGMII" generates the
> "MAC->PHY" format word - and it's the latter that you want to be using
> both for Copper SFPs, which are no different from PHYs integrated onto
> the board connected with SGMII.

Thanks for the detailed explanation, I can understand it.

So I need to find out why config it in MAC mode doesn't work. When I config
it in MAC mode, PHY would not change state to callback the xpcs_get_state().
I dump the PCS register through the tool at this time, VR_MII_AN_INTR_STS
is not always the same value, sometimes AN complete, sometimes not.

I'm not sure if this is related to the anomaly, log often shows:
"i2c_designware i2c_designware.1024: timeout in disabling adapter"



  reply	other threads:[~2023-07-25 10:46 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-24 10:23 [PATCH net-next 0/7] support more link mode for TXGBE Jiawen Wu
2023-07-24 10:23 ` [PATCH net-next 1/7] net: pcs: xpcs: add specific vendor supoprt for Wangxun 10Gb NICs Jiawen Wu
2023-07-25 17:24   ` Andrew Lunn
2023-07-24 10:23 ` [PATCH net-next 2/7] net: pcs: xpcs: support to switch mode for Wangxun NICs Jiawen Wu
2023-07-25 17:32   ` Andrew Lunn
2023-07-26  2:40     ` Jiawen Wu
2023-07-24 10:23 ` [PATCH net-next 3/7] net: pcs: xpcs: add 1000BASE-X AN interrupt support Jiawen Wu
2023-07-24 10:23 ` [PATCH net-next 4/7] net: pcs: xpcs: adapt Wangxun NICs for SGMII mode Jiawen Wu
2023-07-24 10:34   ` Russell King (Oracle)
2023-07-25  2:05     ` Jiawen Wu
2023-07-25  7:48       ` Russell King (Oracle)
2023-07-25  9:50         ` Jiawen Wu
2023-07-25  9:58           ` Russell King (Oracle)
2023-07-25 10:08             ` Russell King (Oracle)
2023-07-25 10:45               ` Jiawen Wu [this message]
2023-07-28 10:11               ` Jiawen Wu
2023-07-28 10:24                 ` Andrew Lunn
2023-07-31  1:47                   ` Jiawen Wu
2023-07-28 10:33                 ` Russell King (Oracle)
2023-07-31  1:58                   ` Jiawen Wu
2023-08-03  2:20                   ` Jiawen Wu
2023-08-03 11:10                     ` Russell King (Oracle)
2023-08-04  5:56                       ` Jiawen Wu
2023-07-25 17:37   ` Andrew Lunn
2023-07-26 12:14   ` Simon Horman
2023-07-24 10:23 ` [PATCH net-next 5/7] net: txgbe: support switching mode to 1000BASE-X and SGMII Jiawen Wu
2023-07-24 10:40   ` Russell King (Oracle)
2023-07-25  2:29     ` Jiawen Wu
2023-07-24 10:23 ` [PATCH net-next 6/7] net: txgbe: support copper NIC with external PHY Jiawen Wu
2023-07-24 10:43   ` Russell King (Oracle)
2023-07-25  2:41     ` Jiawen Wu
2023-07-25  8:02       ` Russell King (Oracle)
2023-07-25 10:04         ` Jiawen Wu
2023-07-25 10:38           ` Russell King (Oracle)
2023-07-26 12:15   ` Simon Horman
2023-07-24 10:23 ` [PATCH net-next 7/7] net: ngbe: move mdio access registers to libwx Jiawen Wu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='03f501d9bee5$11fc0ea0$35f42be0$@trustnetic.com' \
    --to=jiawenwu@trustnetic.com \
    --cc=Jose.Abreu@synopsys.com \
    --cc=andrew@lunn.ch \
    --cc=hkallweit1@gmail.com \
    --cc=linux@armlinux.org.uk \
    --cc=mengyuanlou@net-swift.com \
    --cc=netdev@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.