[PATCH v3 0/5] drm/xe/hwmon: Update hwmon thermal mailbox handling

[PATCH v3 0/5] drm/xe/hwmon: Update hwmon thermal mailbox handling

[Karthik Poosa]

This series adds CRI-specific temperature sensor handling to the Xe
hwmon implementation.

CRI platforms may report unavailable temperature sensors and support
a variable number of VRAM temperature channels depending on platform
configuration. This series adds the required sensor presence checks and
uses platform-reported thermal configuration data to expose only valid
temperature-related hwmon attributes.

The series also corrects the telemetry group selection used for memory
controller temperature reporting.

v2:
 - Address review comments from Sashiko, Badal and Raag.
 - Enable IEEE 754 temperature decoding for MMIO temperature registers.
  - Split sensor validity check into mailbox vs MMIO handling; add
    is_temp_available() / is_temp_is_visible().
 - Temporarily disable memory controller and PCIe temperatures on CRI.

v3:
  - Detect unavailable temperature sensors: rephrase a debug log.
  - Use VRAM temperature sensor count from thermal config on CRI: address
    review comments from sashiko-bot@kernel.org and Rodrigo.
  - Decode CRI temperature registers as IEEE-754: reject temperatures that
    overflow long on 32-bit systems.

Karthik Poosa (5):
  drm/xe/hwmon: Detect unavailable temperature sensors
  drm/xe/hwmon: Use VRAM temperature sensor count from thermal config on
    CRI
  drm/xe/hwmon: Fix memory controller thermal data handling
  drm/xe/hwmon: Decode CRI temperature registers as IEEE-754
  drm/xe/hwmon: Disable memory controller and PCIe temperatures on CRI

 drivers/gpu/drm/xe/xe_device_types.h |   4 +
 drivers/gpu/drm/xe/xe_hwmon.c        | 322 ++++++++++++++++++++++-----
 drivers/gpu/drm/xe/xe_pci.c          |   2 +
 drivers/gpu/drm/xe/xe_pci_types.h    |   1 +
 drivers/gpu/drm/xe/xe_pcode_api.h    |   1 +
 5 files changed, 273 insertions(+), 57 deletions(-)

-- 
2.25.1

[PATCH v3 1/5] drm/xe/hwmon: Detect unavailable temperature sensors

[Karthik Poosa]

Add is_temp_available() to validate sensor presence.
A temperature reading of 0xFFFFFFF on MMIO and 0xFF from mailbox on CRI
platforms indicates that the corresponding sensor is not present and
should be treated as unavailable.

Use this check from xe_hwmon_temp_is_visible() callback so that attributes
for unavailable sensors are not exposed during hwmon device registration.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
v2:
 - Address review comments from sashiko-bot@kernel.org.
 - Address review comments for Badal, Raag.
 - Update is_temp_valid() to check values based on mailbox or MMIO.
 - Add is_temp_is_visible().
 - Update is_vram_ch_available() to is_temp_available() to check if sensor
   is present.

v3:
 - Rephrase a debug log.

 drivers/gpu/drm/xe/xe_hwmon.c | 100 ++++++++++++++++++++++++----------
 1 file changed, 71 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 5284cab6703d..faed2f5da394 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -813,12 +813,20 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
 	return ret;
 }
 
+static inline bool is_temp_valid(const struct xe_hwmon *hwmon, u32 value, bool is_mmio)
+{
+	if (hwmon->xe->info.platform >= XE_CRESCENTISLAND)
+		return value != (is_mmio ? U32_MAX : U8_MAX);
+
+	return value != 0;
+}
+
 static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
 {
 	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
 	u32 *dword = (u32 *)hwmon->temp.value;
+	int ret, i, count = 0;
 	s32 average = 0;
-	int ret, i;
 
 	for (i = 0; i < DIV_ROUND_UP(TEMP_LIMIT_MAX, sizeof(u32)); i++) {
 		ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
@@ -828,11 +836,23 @@ static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
 		drm_dbg(&hwmon->xe->drm, "thermal data for group %d val 0x%x\n", i, dword[i]);
 	}
 
-	for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++)
+	for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++) {
+		if (!is_temp_valid(hwmon, hwmon->temp.value[i], false))
+			continue;
 		average += hwmon->temp.value[i];
+		count++;
+	}
+
+	if (!count) {
+		drm_dbg(&hwmon->xe->drm, "Memory controller temperature unavailable!\n");
+		return -ENXIO;
+	}
+
+	average /= count;
+
+	if (val)
+		*val = average * MILLIDEGREE_PER_DEGREE;
 
-	average /= (hwmon->temp.count - TEMP_INDEX_MCTRL - 1);
-	*val = average * MILLIDEGREE_PER_DEGREE;
 	return 0;
 }
 
@@ -852,7 +872,13 @@ static int get_pcie_temp(struct xe_hwmon *hwmon, long *val)
 		data = REG_FIELD_GET(PCIE_SENSOR_MASK, data);
 
 	data = REG_FIELD_GET(TEMP_MASK, data);
-	*val = (s8)data * MILLIDEGREE_PER_DEGREE;
+	if (!is_temp_valid(hwmon, data, false)) {
+		drm_dbg(&hwmon->xe->drm, "PCIe temperature not available\n");
+		return -ENXIO;
+	}
+
+	if (val)
+		*val = (s8)data * MILLIDEGREE_PER_DEGREE;
 
 	return 0;
 }
@@ -951,19 +977,39 @@ static void xe_hwmon_get_voltage(struct xe_hwmon *hwmon, int channel, long *valu
 	*value = DIV_ROUND_CLOSEST(REG_FIELD_GET(VOLTAGE_MASK, reg_val) * 2500, SF_VOLTAGE);
 }
 
-static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
+static bool is_temp_available(struct xe_hwmon *hwmon, int channel)
 {
 	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
-	int vram_id = channel - CHANNEL_VRAM_N;
-	struct xe_reg vram_reg;
+	struct xe_reg reg;
+	u32 reg_val;
 
-	vram_reg = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
-	if (!xe_reg_is_valid(vram_reg) || !xe_mmio_read32(mmio, vram_reg))
-		return false;
+	switch (channel) {
+	case CHANNEL_PKG:
+	case CHANNEL_VRAM:
+	case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
+		reg = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
+		if (!xe_reg_is_valid(reg))
+			return false;
+
+		reg_val = xe_mmio_read32(mmio, reg);
+		if (!is_temp_valid(hwmon, reg_val, true)) {
+			drm_dbg(&hwmon->xe->drm,
+				"channel %d temperautre unavailable, val 0x%x\n", channel, reg_val);
+			return false;
+		}
+
+		if (channel >= CHANNEL_VRAM_N)
+			sprintf(hwmon->temp.vram_label[channel - CHANNEL_VRAM_N],
+				"vram_ch_%d", channel - CHANNEL_VRAM_N);
 
-	/* Create label only for available vram channel */
-	sprintf(hwmon->temp.vram_label[vram_id], "vram_ch_%d", vram_id);
-	return true;
+		return true;
+	case CHANNEL_MCTRL:
+		return hwmon->temp.count && !get_mc_temp(hwmon, NULL);
+	case CHANNEL_PCIE:
+		return hwmon->temp.count && !get_pcie_temp(hwmon, NULL);
+	default:
+		return false;
+	}
 }
 
 static umode_t
@@ -973,14 +1019,13 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 	case hwmon_temp_emergency:
 		switch (channel) {
 		case CHANNEL_PKG:
-			return hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] ? 0444 : 0;
-		case CHANNEL_VRAM:
-			return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
 		case CHANNEL_MCTRL:
 		case CHANNEL_PCIE:
-			return hwmon->temp.count ? 0444 : 0;
+			return (is_temp_available(hwmon, channel) &&
+				hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN]) ? 0444 : 0;
+		case CHANNEL_VRAM:
 		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
-			return (is_vram_ch_available(hwmon, channel) &&
+			return (is_temp_available(hwmon, channel) &&
 				hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN]) ? 0444 : 0;
 		default:
 			return 0;
@@ -988,14 +1033,13 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 	case hwmon_temp_crit:
 		switch (channel) {
 		case CHANNEL_PKG:
-			return hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] ? 0444 : 0;
-		case CHANNEL_VRAM:
-			return hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] ? 0444 : 0;
 		case CHANNEL_MCTRL:
 		case CHANNEL_PCIE:
-			return hwmon->temp.count ? 0444 : 0;
+			return (is_temp_available(hwmon, channel) &&
+				hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT]) ? 0444 : 0;
+		case CHANNEL_VRAM:
 		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
-			return (is_vram_ch_available(hwmon, channel) &&
+			return (is_temp_available(hwmon, channel) &&
 				hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT]) ? 0444 : 0;
 		default:
 			return 0;
@@ -1003,7 +1047,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 	case hwmon_temp_max:
 		switch (channel) {
 		case CHANNEL_PKG:
-			return hwmon->temp.limit[TEMP_LIMIT_PKG_MAX] ? 0444 : 0;
+			return (is_temp_available(hwmon, channel) &&
+				hwmon->temp.limit[TEMP_LIMIT_PKG_MAX]) ? 0444 : 0;
 		default:
 			return 0;
 		}
@@ -1012,13 +1057,10 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 		switch (channel) {
 		case CHANNEL_PKG:
 		case CHANNEL_VRAM:
-			return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP,
-								channel)) ? 0444 : 0;
 		case CHANNEL_MCTRL:
 		case CHANNEL_PCIE:
-			return hwmon->temp.count ? 0444 : 0;
 		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
-			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
+			return is_temp_available(hwmon, channel) ? 0444 : 0;
 		default:
 			return 0;
 		}
-- 
2.25.1

Re: [PATCH v3 1/5] drm/xe/hwmon: Detect unavailable temperature sensors

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] Repeated fallible PCODE mailbox reads during sysfs attribute visibility checks block driver probe and can cause flaky attribute registration.
- [Medium] Data race on `hwmon->temp.value` shared scratchpad buffer when `get_mc_temp()` is called lockless from sysfs callbacks.
--

commit daf20f08a8a78b5a377223b407b9b3a08568942e
Author: Karthik Poosa <karthik.poosa@intel.com>
Subject: drm/xe/hwmon: Detect unavailable temperature sensors

This commit introduces is_temp_available() to validate sensor presence during
sysfs attribute registration. It uses hwmon_temp_is_visible() to hide
attributes for sensors that report invalid values, avoiding exposing 
unavailable sensors to userspace.

> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 5284cab6703d8..faed2f5da3947 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
[ ... ]
> -static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
> +static bool is_temp_available(struct xe_hwmon *hwmon, int channel)
>  {
>  	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
[ ... ]
> +	case CHANNEL_MCTRL:
> +		return hwmon->temp.count && !get_mc_temp(hwmon, NULL);
> +	case CHANNEL_PCIE:
> +		return hwmon->temp.count && !get_pcie_temp(hwmon, NULL);
> +	default:
> +		return false;
> +	}
>  }
>  
>  static umode_t
> @@ -973,14 +1019,13 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>  	case hwmon_temp_emergency:
>  		switch (channel) {
>  		case CHANNEL_PKG:
> -			return hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] ? 0444 : 0;
> -		case CHANNEL_VRAM:
> -			return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
>  		case CHANNEL_MCTRL:
>  		case CHANNEL_PCIE:
> -			return hwmon->temp.count ? 0444 : 0;
> +			return (is_temp_available(hwmon, channel) &&
> +				hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN]) ? 0444 : 0;

[Severity: Medium]
Is it safe to execute lockless hardware I/O from the sysfs visibility callback?

The xe_hwmon_temp_is_visible callback executes get_mc_temp without holding
hwmon->hwmon_lock. Because the sysfs core creates attributes one by one, an
aggressive userspace process can open and read an early attribute as soon as
it appears. 

This could trigger a concurrent lockless execution of get_mc_temp from
xe_hwmon_temp_read while the sysfs core is still evaluating is_visible 
for subsequent attributes. Both threads would concurrently execute 
xe_pcode_read and perform unsynchronized writes to the shared 
hwmon->temp.value array. Could this lead to torn or corrupted temperature 
readings?

[Severity: Medium]
Could these repeated hardware reads cause flaky attribute registration and slow
down device probe?

During hwmon_device_register_with_info, the sysfs core sequentially evaluates
the is_visible callback for every attribute in a group. For CHANNEL_MCTRL and
CHANNEL_PCIE, this now unconditionally executes blocking hardware mailbox reads
(get_mc_temp and get_pcie_temp). 

If the PCU mailbox is busy and times out for a single attribute's check, that
specific attribute might be silently omitted while others in the same channel
are successfully created. Should the sensor availability be probed once and
cached during initialization instead of evaluating it dynamically for every
sysfs attribute?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260910182756.638830-1-karthik.poosa@intel.com?part=1

Re: [PATCH v3 1/5] drm/xe/hwmon: Detect unavailable temperature sensors

[Poosa, Karthik]

On 11-09-2026 00:12, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
> - [Medium] Repeated fallible PCODE mailbox reads during sysfs attribute visibility checks block driver probe and can cause flaky attribute registration.
> - [Medium] Data race on `hwmon->temp.value` shared scratchpad buffer when `get_mc_temp()` is called lockless from sysfs callbacks.
> --
>
> commit daf20f08a8a78b5a377223b407b9b3a08568942e
> Author: Karthik Poosa <karthik.poosa@intel.com>
> Subject: drm/xe/hwmon: Detect unavailable temperature sensors
>
> This commit introduces is_temp_available() to validate sensor presence during
> sysfs attribute registration. It uses hwmon_temp_is_visible() to hide
> attributes for sensors that report invalid values, avoiding exposing
> unavailable sensors to userspace.
>
>> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
>> index 5284cab6703d8..faed2f5da3947 100644
>> --- a/drivers/gpu/drm/xe/xe_hwmon.c
>> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> [ ... ]
>> -static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
>> +static bool is_temp_available(struct xe_hwmon *hwmon, int channel)
>>   {
>>   	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
> [ ... ]
>> +	case CHANNEL_MCTRL:
>> +		return hwmon->temp.count && !get_mc_temp(hwmon, NULL);
>> +	case CHANNEL_PCIE:
>> +		return hwmon->temp.count && !get_pcie_temp(hwmon, NULL);
>> +	default:
>> +		return false;
>> +	}
>>   }
>>   
>>   static umode_t
>> @@ -973,14 +1019,13 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>>   	case hwmon_temp_emergency:
>>   		switch (channel) {
>>   		case CHANNEL_PKG:
>> -			return hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] ? 0444 : 0;
>> -		case CHANNEL_VRAM:
>> -			return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
>>   		case CHANNEL_MCTRL:
>>   		case CHANNEL_PCIE:
>> -			return hwmon->temp.count ? 0444 : 0;
>> +			return (is_temp_available(hwmon, channel) &&
>> +				hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN]) ? 0444 : 0;
> [Severity: Medium]
> Is it safe to execute lockless hardware I/O from the sysfs visibility callback?
>
> The xe_hwmon_temp_is_visible callback executes get_mc_temp without holding
> hwmon->hwmon_lock. Because the sysfs core creates attributes one by one, an
> aggressive userspace process can open and read an early attribute as soon as
> it appears.
>
> This could trigger a concurrent lockless execution of get_mc_temp from
> xe_hwmon_temp_read while the sysfs core is still evaluating is_visible
> for subsequent attributes. Both threads would concurrently execute
> xe_pcode_read and perform unsynchronized writes to the shared
> hwmon->temp.value array. Could this lead to torn or corrupted temperature
> readings?
Yes, that could be an issue for get_mc_temp(). It uses hwmon->temp.value 
as shared scratch storage and can be reached from both 
xe_hwmon_temp_is_visible() and xe_hwmon_temp_read(), so those paths 
could overlap and observe a mixed snapshot.

xe_pcode_read() already serializes the mailbox transaction itself, but 
it does not protect the full get_mc_temp() sequence or the shared buffer.

We can address this by taking hwmon->hwmon_lock inside get_mc_temp().

>
> [Severity: Medium]
> Could these repeated hardware reads cause flaky attribute registration and slow
> down device probe?
>
> During hwmon_device_register_with_info, the sysfs core sequentially evaluates
> the is_visible callback for every attribute in a group. For CHANNEL_MCTRL and
> CHANNEL_PCIE, this now unconditionally executes blocking hardware mailbox reads
> (get_mc_temp and get_pcie_temp).
>
> If the PCU mailbox is busy and times out for a single attribute's check, that
> specific attribute might be silently omitted while others in the same channel
> are successfully created. Should the sensor availability be probed once and
> cached during initialization instead of evaluating it dynamically for every
> sysfs attribute?
Agree, for this we probe the temperature sensor availability once during 
registration and cache its state and use is it visible to avoid slow 
device probe.
>

Re: [PATCH v3 1/5] drm/xe/hwmon: Detect unavailable temperature sensors

[Rodrigo Vivi]

On Thu, Sep 10, 2026 at 11:57:52PM +0530, Karthik Poosa wrote:
> Add is_temp_available() to validate sensor presence.
> A temperature reading of 0xFFFFFFF on MMIO and 0xFF from mailbox on CRI
> platforms indicates that the corresponding sensor is not present and
> should be treated as unavailable.
> 
> Use this check from xe_hwmon_temp_is_visible() callback so that attributes
> for unavailable sensors are not exposed during hwmon device registration.

I'm afraid this patch is doing much more than what stated here.
Please split this patch into smaller sections.
It is likely regressing older platforms becuase it is hard to spot the
differences.

> 
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> ---
> v2:
>  - Address review comments from sashiko-bot@kernel.org.
>  - Address review comments for Badal, Raag.
>  - Update is_temp_valid() to check values based on mailbox or MMIO.
>  - Add is_temp_is_visible().
>  - Update is_vram_ch_available() to is_temp_available() to check if sensor
>    is present.
> 
> v3:
>  - Rephrase a debug log.
> 
>  drivers/gpu/drm/xe/xe_hwmon.c | 100 ++++++++++++++++++++++++----------
>  1 file changed, 71 insertions(+), 29 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 5284cab6703d..faed2f5da394 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -813,12 +813,20 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
>  	return ret;
>  }
>  
> +static inline bool is_temp_valid(const struct xe_hwmon *hwmon, u32 value, bool is_mmio)
> +{
> +	if (hwmon->xe->info.platform >= XE_CRESCENTISLAND)
> +		return value != (is_mmio ? U32_MAX : U8_MAX);
> +
> +	return value != 0;
> +}

first of all, please use 2 separate functions for this.
second, you have a bug here and the mailbox logic is never protected s8 is passed,
so U8_MAX will never work.

LLM suggestion:

static bool mmio_temp_valid(const struct xe_hwmon *hwmon, u32 v)
{
        return hwmon->xe->info.has_mbx_temp_sentinel ? v != U32_MAX
                                                     : v != 0;
}

static bool mbx_temp_valid(const struct xe_hwmon *hwmon, s8 v)
{
        return hwmon->xe->info.has_mbx_temp_sentinel ? v != (s8)0xff
                                                     : v != 0;
}


> +
>  static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
>  {
>  	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
>  	u32 *dword = (u32 *)hwmon->temp.value;
> +	int ret, i, count = 0;
>  	s32 average = 0;
> -	int ret, i;
>  
>  	for (i = 0; i < DIV_ROUND_UP(TEMP_LIMIT_MAX, sizeof(u32)); i++) {
>  		ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
> @@ -828,11 +836,23 @@ static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
>  		drm_dbg(&hwmon->xe->drm, "thermal data for group %d val 0x%x\n", i, dword[i]);
>  	}
>  
> -	for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++)
> +	for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++) {
> +		if (!is_temp_valid(hwmon, hwmon->temp.value[i], false))
> +			continue;
>  		average += hwmon->temp.value[i];
> +		count++;
> +	}
> +
> +	if (!count) {
> +		drm_dbg(&hwmon->xe->drm, "Memory controller temperature unavailable!\n");
> +		return -ENXIO;
> +	}
> +
> +	average /= count;
> +
> +	if (val)
> +		*val = average * MILLIDEGREE_PER_DEGREE;
>  
> -	average /= (hwmon->temp.count - TEMP_INDEX_MCTRL - 1);
> -	*val = average * MILLIDEGREE_PER_DEGREE;
>  	return 0;
>  }
>  
> @@ -852,7 +872,13 @@ static int get_pcie_temp(struct xe_hwmon *hwmon, long *val)
>  		data = REG_FIELD_GET(PCIE_SENSOR_MASK, data);
>  
>  	data = REG_FIELD_GET(TEMP_MASK, data);
> -	*val = (s8)data * MILLIDEGREE_PER_DEGREE;
> +	if (!is_temp_valid(hwmon, data, false)) {
> +		drm_dbg(&hwmon->xe->drm, "PCIe temperature not available\n");
> +		return -ENXIO;
> +	}
> +
> +	if (val)
> +		*val = (s8)data * MILLIDEGREE_PER_DEGREE;
>  
>  	return 0;
>  }
> @@ -951,19 +977,39 @@ static void xe_hwmon_get_voltage(struct xe_hwmon *hwmon, int channel, long *valu
>  	*value = DIV_ROUND_CLOSEST(REG_FIELD_GET(VOLTAGE_MASK, reg_val) * 2500, SF_VOLTAGE);
>  }
>  
> -static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
> +static bool is_temp_available(struct xe_hwmon *hwmon, int channel)
>  {
>  	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
> -	int vram_id = channel - CHANNEL_VRAM_N;
> -	struct xe_reg vram_reg;
> +	struct xe_reg reg;
> +	u32 reg_val;
>  
> -	vram_reg = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
> -	if (!xe_reg_is_valid(vram_reg) || !xe_mmio_read32(mmio, vram_reg))
> -		return false;
> +	switch (channel) {
> +	case CHANNEL_PKG:
> +	case CHANNEL_VRAM:
> +	case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> +		reg = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
> +		if (!xe_reg_is_valid(reg))
> +			return false;
> +
> +		reg_val = xe_mmio_read32(mmio, reg);
> +		if (!is_temp_valid(hwmon, reg_val, true)) {
> +			drm_dbg(&hwmon->xe->drm,
> +				"channel %d temperautre unavailable, val 0x%x\n", channel, reg_val);

typo

> +			return false;
> +		}
> +
> +		if (channel >= CHANNEL_VRAM_N)
> +			sprintf(hwmon->temp.vram_label[channel - CHANNEL_VRAM_N],
> +				"vram_ch_%d", channel - CHANNEL_VRAM_N);
>  
> -	/* Create label only for available vram channel */
> -	sprintf(hwmon->temp.vram_label[vram_id], "vram_ch_%d", vram_id);
> -	return true;
> +		return true;
> +	case CHANNEL_MCTRL:
> +		return hwmon->temp.count && !get_mc_temp(hwmon, NULL);
> +	case CHANNEL_PCIE:
> +		return hwmon->temp.count && !get_pcie_temp(hwmon, NULL);
> +	default:
> +		return false;
> +	}
>  }
>  
>  static umode_t
> @@ -973,14 +1019,13 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>  	case hwmon_temp_emergency:
>  		switch (channel) {
>  		case CHANNEL_PKG:
> -			return hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] ? 0444 : 0;
> -		case CHANNEL_VRAM:
> -			return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
>  		case CHANNEL_MCTRL:
>  		case CHANNEL_PCIE:
> -			return hwmon->temp.count ? 0444 : 0;
> +			return (is_temp_available(hwmon, channel) &&
> +				hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN]) ? 0444 : 0;
> +		case CHANNEL_VRAM:
>  		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> -			return (is_vram_ch_available(hwmon, channel) &&
> +			return (is_temp_available(hwmon, channel) &&
>  				hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN]) ? 0444 : 0;
>  		default:
>  			return 0;
> @@ -988,14 +1033,13 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>  	case hwmon_temp_crit:
>  		switch (channel) {
>  		case CHANNEL_PKG:
> -			return hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] ? 0444 : 0;
> -		case CHANNEL_VRAM:
> -			return hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] ? 0444 : 0;
>  		case CHANNEL_MCTRL:
>  		case CHANNEL_PCIE:
> -			return hwmon->temp.count ? 0444 : 0;
> +			return (is_temp_available(hwmon, channel) &&
> +				hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT]) ? 0444 : 0;
> +		case CHANNEL_VRAM:
>  		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> -			return (is_vram_ch_available(hwmon, channel) &&
> +			return (is_temp_available(hwmon, channel) &&
>  				hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT]) ? 0444 : 0;
>  		default:
>  			return 0;
> @@ -1003,7 +1047,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>  	case hwmon_temp_max:
>  		switch (channel) {
>  		case CHANNEL_PKG:
> -			return hwmon->temp.limit[TEMP_LIMIT_PKG_MAX] ? 0444 : 0;
> +			return (is_temp_available(hwmon, channel) &&
> +				hwmon->temp.limit[TEMP_LIMIT_PKG_MAX]) ? 0444 : 0;
>  		default:
>  			return 0;
>  		}
> @@ -1012,13 +1057,10 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>  		switch (channel) {
>  		case CHANNEL_PKG:
>  		case CHANNEL_VRAM:
> -			return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP,
> -								channel)) ? 0444 : 0;
>  		case CHANNEL_MCTRL:
>  		case CHANNEL_PCIE:
> -			return hwmon->temp.count ? 0444 : 0;
>  		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> -			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
> +			return is_temp_available(hwmon, channel) ? 0444 : 0;
>  		default:
>  			return 0;
>  		}
> -- 
> 2.25.1
> 

Re: [PATCH v3 1/5] drm/xe/hwmon: Detect unavailable temperature sensors

[Poosa, Karthik]

On 18-09-2026 15:10, Rodrigo Vivi wrote:
> On Thu, Sep 10, 2026 at 11:57:52PM +0530, Karthik Poosa wrote:
>> Add is_temp_available() to validate sensor presence.
>> A temperature reading of 0xFFFFFFF on MMIO and 0xFF from mailbox on CRI
>> platforms indicates that the corresponding sensor is not present and
>> should be treated as unavailable.
>>
>> Use this check from xe_hwmon_temp_is_visible() callback so that attributes
>> for unavailable sensors are not exposed during hwmon device registration.
> I'm afraid this patch is doing much more than what stated here.
> Please split this patch into smaller sections.
> It is likely regressing older platforms becuase it is hard to spot the
> differences.

Sure will split the patch into

1. Add helpers to validate thermal sensor readings
2. Ignore unavailable memory controller sensors and PCIe thermal sensors
3. Consolidate temperature sensor availability checks

>
>> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
>> ---
>> v2:
>>   - Address review comments from sashiko-bot@kernel.org.
>>   - Address review comments for Badal, Raag.
>>   - Update is_temp_valid() to check values based on mailbox or MMIO.
>>   - Add is_temp_is_visible().
>>   - Update is_vram_ch_available() to is_temp_available() to check if sensor
>>     is present.
>>
>> v3:
>>   - Rephrase a debug log.
>>
>>   drivers/gpu/drm/xe/xe_hwmon.c | 100 ++++++++++++++++++++++++----------
>>   1 file changed, 71 insertions(+), 29 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
>> index 5284cab6703d..faed2f5da394 100644
>> --- a/drivers/gpu/drm/xe/xe_hwmon.c
>> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
>> @@ -813,12 +813,20 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
>>   	return ret;
>>   }
>>   
>> +static inline bool is_temp_valid(const struct xe_hwmon *hwmon, u32 value, bool is_mmio)
>> +{
>> +	if (hwmon->xe->info.platform >= XE_CRESCENTISLAND)
>> +		return value != (is_mmio ? U32_MAX : U8_MAX);
>> +
>> +	return value != 0;
>> +}
> first of all, please use 2 separate functions for this.
> second, you have a bug here and the mailbox logic is never protected s8 is passed,
> so U8_MAX will never work.
>
> LLM suggestion:
>
> static bool mmio_temp_valid(const struct xe_hwmon *hwmon, u32 v)
> {
>          return hwmon->xe->info.has_mbx_temp_sentinel ? v != U32_MAX
>                                                       : v != 0;
> }
>
> static bool mbx_temp_valid(const struct xe_hwmon *hwmon, s8 v)
> {
>          return hwmon->xe->info.has_mbx_temp_sentinel ? v != (s8)0xff
>                                                       : v != 0;
> }
 >

Actually mailbox temperature is of format, bit 7 i.e MSB for sign and 
bit [6:0] bits for magnitude.

So s8 is not right here, In this format, 0xFF represents -127°C, not 
-1°C. I shall correct this.


>
>> +
>>   static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
>>   {
>>   	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
>>   	u32 *dword = (u32 *)hwmon->temp.value;
>> +	int ret, i, count = 0;
>>   	s32 average = 0;
>> -	int ret, i;
>>   
>>   	for (i = 0; i < DIV_ROUND_UP(TEMP_LIMIT_MAX, sizeof(u32)); i++) {
>>   		ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
>> @@ -828,11 +836,23 @@ static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
>>   		drm_dbg(&hwmon->xe->drm, "thermal data for group %d val 0x%x\n", i, dword[i]);
>>   	}
>>   
>> -	for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++)
>> +	for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++) {
>> +		if (!is_temp_valid(hwmon, hwmon->temp.value[i], false))
>> +			continue;
>>   		average += hwmon->temp.value[i];
>> +		count++;
>> +	}
>> +
>> +	if (!count) {
>> +		drm_dbg(&hwmon->xe->drm, "Memory controller temperature unavailable!\n");
>> +		return -ENXIO;
>> +	}
>> +
>> +	average /= count;
>> +
>> +	if (val)
>> +		*val = average * MILLIDEGREE_PER_DEGREE;
>>   
>> -	average /= (hwmon->temp.count - TEMP_INDEX_MCTRL - 1);
>> -	*val = average * MILLIDEGREE_PER_DEGREE;
>>   	return 0;
>>   }
>>   
>> @@ -852,7 +872,13 @@ static int get_pcie_temp(struct xe_hwmon *hwmon, long *val)
>>   		data = REG_FIELD_GET(PCIE_SENSOR_MASK, data);
>>   
>>   	data = REG_FIELD_GET(TEMP_MASK, data);
>> -	*val = (s8)data * MILLIDEGREE_PER_DEGREE;
>> +	if (!is_temp_valid(hwmon, data, false)) {
>> +		drm_dbg(&hwmon->xe->drm, "PCIe temperature not available\n");
>> +		return -ENXIO;
>> +	}
>> +
>> +	if (val)
>> +		*val = (s8)data * MILLIDEGREE_PER_DEGREE;
>>   
>>   	return 0;
>>   }
>> @@ -951,19 +977,39 @@ static void xe_hwmon_get_voltage(struct xe_hwmon *hwmon, int channel, long *valu
>>   	*value = DIV_ROUND_CLOSEST(REG_FIELD_GET(VOLTAGE_MASK, reg_val) * 2500, SF_VOLTAGE);
>>   }
>>   
>> -static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
>> +static bool is_temp_available(struct xe_hwmon *hwmon, int channel)
>>   {
>>   	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
>> -	int vram_id = channel - CHANNEL_VRAM_N;
>> -	struct xe_reg vram_reg;
>> +	struct xe_reg reg;
>> +	u32 reg_val;
>>   
>> -	vram_reg = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
>> -	if (!xe_reg_is_valid(vram_reg) || !xe_mmio_read32(mmio, vram_reg))
>> -		return false;
>> +	switch (channel) {
>> +	case CHANNEL_PKG:
>> +	case CHANNEL_VRAM:
>> +	case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>> +		reg = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
>> +		if (!xe_reg_is_valid(reg))
>> +			return false;
>> +
>> +		reg_val = xe_mmio_read32(mmio, reg);
>> +		if (!is_temp_valid(hwmon, reg_val, true)) {
>> +			drm_dbg(&hwmon->xe->drm,
>> +				"channel %d temperautre unavailable, val 0x%x\n", channel, reg_val);
> typo
>
>> +			return false;
>> +		}
>> +
>> +		if (channel >= CHANNEL_VRAM_N)
>> +			sprintf(hwmon->temp.vram_label[channel - CHANNEL_VRAM_N],
>> +				"vram_ch_%d", channel - CHANNEL_VRAM_N);
>>   
>> -	/* Create label only for available vram channel */
>> -	sprintf(hwmon->temp.vram_label[vram_id], "vram_ch_%d", vram_id);
>> -	return true;
>> +		return true;
>> +	case CHANNEL_MCTRL:
>> +		return hwmon->temp.count && !get_mc_temp(hwmon, NULL);
>> +	case CHANNEL_PCIE:
>> +		return hwmon->temp.count && !get_pcie_temp(hwmon, NULL);
>> +	default:
>> +		return false;
>> +	}
>>   }
>>   
>>   static umode_t
>> @@ -973,14 +1019,13 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>>   	case hwmon_temp_emergency:
>>   		switch (channel) {
>>   		case CHANNEL_PKG:
>> -			return hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] ? 0444 : 0;
>> -		case CHANNEL_VRAM:
>> -			return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
>>   		case CHANNEL_MCTRL:
>>   		case CHANNEL_PCIE:
>> -			return hwmon->temp.count ? 0444 : 0;
>> +			return (is_temp_available(hwmon, channel) &&
>> +				hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN]) ? 0444 : 0;
>> +		case CHANNEL_VRAM:
>>   		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>> -			return (is_vram_ch_available(hwmon, channel) &&
>> +			return (is_temp_available(hwmon, channel) &&
>>   				hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN]) ? 0444 : 0;
>>   		default:
>>   			return 0;
>> @@ -988,14 +1033,13 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>>   	case hwmon_temp_crit:
>>   		switch (channel) {
>>   		case CHANNEL_PKG:
>> -			return hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] ? 0444 : 0;
>> -		case CHANNEL_VRAM:
>> -			return hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] ? 0444 : 0;
>>   		case CHANNEL_MCTRL:
>>   		case CHANNEL_PCIE:
>> -			return hwmon->temp.count ? 0444 : 0;
>> +			return (is_temp_available(hwmon, channel) &&
>> +				hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT]) ? 0444 : 0;
>> +		case CHANNEL_VRAM:
>>   		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>> -			return (is_vram_ch_available(hwmon, channel) &&
>> +			return (is_temp_available(hwmon, channel) &&
>>   				hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT]) ? 0444 : 0;
>>   		default:
>>   			return 0;
>> @@ -1003,7 +1047,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>>   	case hwmon_temp_max:
>>   		switch (channel) {
>>   		case CHANNEL_PKG:
>> -			return hwmon->temp.limit[TEMP_LIMIT_PKG_MAX] ? 0444 : 0;
>> +			return (is_temp_available(hwmon, channel) &&
>> +				hwmon->temp.limit[TEMP_LIMIT_PKG_MAX]) ? 0444 : 0;
>>   		default:
>>   			return 0;
>>   		}
>> @@ -1012,13 +1057,10 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>>   		switch (channel) {
>>   		case CHANNEL_PKG:
>>   		case CHANNEL_VRAM:
>> -			return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP,
>> -								channel)) ? 0444 : 0;
>>   		case CHANNEL_MCTRL:
>>   		case CHANNEL_PCIE:
>> -			return hwmon->temp.count ? 0444 : 0;
>>   		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>> -			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
>> +			return is_temp_available(hwmon, channel) ? 0444 : 0;
>>   		default:
>>   			return 0;
>>   		}
>> -- 
>> 2.25.1
>>

[PATCH v3 2/5] drm/xe/hwmon: Use VRAM temperature sensor count from thermal config on CRI

[Karthik Poosa]

Read the number of VRAM temperature sensor channels from the second byte
of READ_THERMAL_CONFIG on CRI platforms. Use the reported count to avoid
exposing hwmon attributes for unavailable VRAM temperature sensors, while
retaining the maximum supported channel count on non-CRI platforms.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---

v2:
 - Address review comments from sashiko-bot@kernel.org.
 - Address review comments from Badal and Raag.
 - Update HWMON_CHANNEL_INFO() to supports maximum VRAM channels of CRI.

v3:
 - Address review comments from sashiko-bot@kernel.org.
 - Address review comments from Rodrigo.

 drivers/gpu/drm/xe/xe_device_types.h |   4 +
 drivers/gpu/drm/xe/xe_hwmon.c        | 115 +++++++++++++++++++++++++--
 drivers/gpu/drm/xe/xe_pci.c          |   2 +
 drivers/gpu/drm/xe/xe_pci_types.h    |   1 +
 drivers/gpu/drm/xe/xe_pcode_api.h    |   1 +
 5 files changed, 115 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index f88bacf63c83..74037a9c32f7 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -178,6 +178,10 @@ struct xe_device {
 		u8 has_drm_ras:1;
 		/** @info.has_fan_control: Device supports fan control */
 		u8 has_fan_control:1;
+		/*
+		 * @info.has_fixed_vram_channels: Device has fixed VRAM temperature channel count.
+		 */
+		u8 has_fixed_vram_channels:1;
 		/** @info.has_flat_ccs: Whether flat CCS metadata is used */
 		u8 has_flat_ccs:1;
 		/** @info.has_gsc_nvm: Device has gsc non-volatile memory */
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index faed2f5da394..a60a6a731d88 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -39,7 +39,8 @@ enum xe_hwmon_reg_operation {
 	REG_READ64,
 };
 
-#define MAX_VRAM_CHANNELS      (16)
+#define MAX_VRAM_CHANNELS	80
+#define FIXED_VRAM_CHANNELS	16
 
 enum xe_hwmon_channel {
 	CHANNEL_CARD,
@@ -48,6 +49,7 @@ enum xe_hwmon_channel {
 	CHANNEL_MCTRL,
 	CHANNEL_PCIE,
 	CHANNEL_VRAM_N,
+	/* Compile-time upper bound; actual channel count is hwmon->temp.vram_count */
 	CHANNEL_VRAM_N_MAX = CHANNEL_VRAM_N + MAX_VRAM_CHANNELS - 1,
 	CHANNEL_MAX,
 };
@@ -142,12 +144,14 @@ struct xe_hwmon_thermal_info {
 		/** @data: temperature limits in dwords */
 		u32 data[DIV_ROUND_UP(TEMP_LIMIT_MAX, sizeof(u32))];
 	};
-	/** @count: no of temperature sensors available for the platform */
+	/** @count: temperature sensors count from READ_THERMAL_CONFIG */
 	u8 count;
+	/** @vram_count: number of VRAM temperature sensors available for the platform */
+	u8 vram_count;
 	/** @value: signed value from each sensor */
 	s8 value[U8_MAX];
-	/** @vram_label: vram label names */
-	char vram_label[MAX_VRAM_CHANNELS][MAX_LABEL_SIZE];
+	/** @vram_label: vram label names, dynamically allocated based on vram_count */
+	char (*vram_label)[MAX_LABEL_SIZE];
 };
 
 /**
@@ -271,7 +275,7 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg
 				return BMG_PACKAGE_TEMPERATURE;
 			else if (channel == CHANNEL_VRAM)
 				return BMG_VRAM_TEMPERATURE;
-			else if (in_range(channel, CHANNEL_VRAM_N, MAX_VRAM_CHANNELS))
+			else if (in_range(channel, CHANNEL_VRAM_N, hwmon->temp.vram_count))
 				return BMG_VRAM_TEMPERATURE_N(channel - CHANNEL_VRAM_N);
 		} else if (xe->info.platform == XE_DG2) {
 			if (channel == CHANNEL_PKG)
@@ -777,6 +781,70 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL),
 	HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
 			   HWMON_P_CAP,
@@ -794,6 +862,14 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
 	u32 config = 0;
 	int ret;
 
+	/*
+	 * Fixed-channel platforms don't derive the VRAM count from the mailbox
+	 * config, so set it up front to keep the sensors visible even if a read
+	 * below fails.
+	 */
+	if (hwmon->xe->info.has_fixed_vram_channels)
+		hwmon->temp.vram_count = FIXED_VRAM_CHANNELS;
+
 	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_LIMITS, 0),
 			    &hwmon->temp.data[0], &hwmon->temp.data[1]);
 	if (ret)
@@ -810,6 +886,16 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
 	drm_dbg(&hwmon->xe->drm, "thermal config count 0x%x\n", config);
 	hwmon->temp.count = REG_FIELD_GET(TEMP_MASK, config);
 
+	if (!hwmon->xe->info.has_fixed_vram_channels) {
+		hwmon->temp.vram_count = REG_FIELD_GET(VRAM_COUNT_MASK, config);
+		if (hwmon->temp.vram_count > MAX_VRAM_CHANNELS) {
+			drm_warn(&hwmon->xe->drm,
+				 "VRAM channel count %d exceeds max %d, clamping\n",
+				 hwmon->temp.vram_count, MAX_VRAM_CHANNELS);
+			hwmon->temp.vram_count = MAX_VRAM_CHANNELS;
+		}
+	}
+
 	return ret;
 }
 
@@ -1505,7 +1591,7 @@ static int xe_hwmon_read_label(struct device *dev,
 			*str = "mctrl";
 		else if (channel == CHANNEL_PCIE)
 			*str = "pcie";
-		else if (in_range(channel, CHANNEL_VRAM_N, MAX_VRAM_CHANNELS))
+		else if (in_range(channel, CHANNEL_VRAM_N, hwmon->temp.vram_count))
 			*str = hwmon->temp.vram_label[channel - CHANNEL_VRAM_N];
 		return 0;
 	case hwmon_power:
@@ -1634,6 +1720,15 @@ int xe_hwmon_register(struct xe_device *xe)
 
 	xe_hwmon_get_preregistration_info(hwmon);
 
+	if (hwmon->temp.vram_count) {
+		hwmon->temp.vram_label = devm_kcalloc(dev, hwmon->temp.vram_count,
+						      MAX_LABEL_SIZE, GFP_KERNEL);
+		if (!hwmon->temp.vram_label) {
+			ret = -ENOMEM;
+			goto err_null_hwmon;
+		}
+	}
+
 	drm_dbg(&xe->drm, "Register xe hwmon interface\n");
 
 	/*  hwmon_dev points to device hwmon<i> */
@@ -1642,10 +1737,14 @@ int xe_hwmon_register(struct xe_device *xe)
 								hwmon_groups);
 	if (IS_ERR(hwmon->hwmon_dev)) {
 		drm_err(&xe->drm, "Failed to register xe hwmon (%pe)\n", hwmon->hwmon_dev);
-		xe->hwmon = NULL;
-		return PTR_ERR(hwmon->hwmon_dev);
+		ret = PTR_ERR(hwmon->hwmon_dev);
+		goto err_null_hwmon;
 	}
 
 	return 0;
+
+err_null_hwmon:
+	xe->hwmon = NULL;
+	return ret;
 }
 MODULE_IMPORT_NS("INTEL_PMT_TELEMETRY");
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 1e04e8ef2611..d98b240e1753 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -416,6 +416,7 @@ static const struct xe_device_desc bmg_desc = {
 	.dma_mask_size = 46,
 	.has_display = true,
 	.has_fan_control = true,
+	.has_fixed_vram_channels = true,
 	.has_flat_ccs = 1,
 	.has_mbx_power_limits = true,
 	.has_mbx_thermal_info = true,
@@ -794,6 +795,7 @@ static int xe_info_init_early(struct xe_device *xe,
 	xe->info.has_cached_pt = desc->has_cached_pt;
 	xe->info.has_drm_ras = desc->has_drm_ras;
 	xe->info.has_fan_control = desc->has_fan_control;
+	xe->info.has_fixed_vram_channels = desc->has_fixed_vram_channels;
 	/* runtime fusing may force flat_ccs to disabled later */
 	xe->info.has_flat_ccs = desc->has_flat_ccs;
 	xe->info.has_mbx_power_limits = desc->has_mbx_power_limits;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index fed509ff601e..87b8121b3e51 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -42,6 +42,7 @@ struct xe_device_desc {
 	u8 has_display:1;
 	u8 has_drm_ras:1;
 	u8 has_fan_control:1;
+	u8 has_fixed_vram_channels:1;
 	u8 has_flat_ccs:1;
 	u8 has_gsc_nvm:1;
 	u8 has_heci_gscfi:1;
diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
index 94575c476e3d..e1079eff72c6 100644
--- a/drivers/gpu/drm/xe/xe_pcode_api.h
+++ b/drivers/gpu/drm/xe/xe_pcode_api.h
@@ -57,6 +57,7 @@
 #define   PCODE_THERMAL_INFO			0x25
 #define     READ_THERMAL_LIMITS			0x0
 #define     READ_THERMAL_CONFIG			0x1
+#define       VRAM_COUNT_MASK			REG_GENMASK(15, 8)
 #define     READ_THERMAL_DATA			0x2
 #define       PCIE_SENSOR_GROUP_ID		0x2
 #define       PCIE_SENSOR_MASK			REG_GENMASK(31, 16)
-- 
2.25.1

Re: [PATCH v3 2/5] drm/xe/hwmon: Use VRAM temperature sensor count from thermal config on CRI

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:

New issues:
- [Low] Kernel-doc syntax violation for struct member documentation.

Pre-existing issues:
- [High] xe_hwmon_pcode_rmw_power_limit ignores xe_pcode_read failures, leading to hardware state corruption.
- [High] Incorrect bounds check for CRI platforms causes silent field overflow when encoding power limits.
--

commit b3104079752794b6ca510cf54096b19d2c7bfc90
Author: Karthik Poosa <karthik.poosa@intel.com>

    drm/xe/hwmon: Use VRAM temperature sensor count from thermal config on CRI
    
    Read the number of VRAM temperature sensor channels from the second byte
    of READ_THERMAL_CONFIG on CRI platforms. Use the reported count to avoid
    exposing hwmon attributes for unavailable VRAM temperature sensors, while
    retaining the maximum supported channel count on non-CRI platforms.

> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index f88bacf63c83c..74037a9c32f7e 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -178,6 +178,10 @@ struct xe_device {
>  		u8 has_drm_ras:1;
>  		/** @info.has_fan_control: Device supports fan control */
>  		u8 has_fan_control:1;
> +		/*
> +		 * @info.has_fixed_vram_channels: Device has fixed VRAM temperature channel count.
> +		 */
> +		u8 has_fixed_vram_channels:1;
                ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

[Severity: Low]
Is this block comment meant to be a kernel-doc comment?

Using a standard C block comment (/*) instead of a kernel-doc comment (/**)
for the newly added has_fixed_vram_channels member will cause kernel-doc
tooling to emit a "not described" warning when generating documentation.

[ ... ]

[Severity: High]
This is a pre-existing issue, but does xe_hwmon_pcode_rmw_power_limit()
safely handle PCODE read failures?

If xe_pcode_read() fails, it logs the error but proceeds to perform a
read-modify-write on val0 and val1, which remain initialized to 0:

drivers/gpu/drm/xe/xe_hwmon.c:xe_hwmon_pcode_rmw_power_limit() {
	...
	ret = xe_pcode_read(root_tile, PCODE_MBOX(...), &val0, &val1);
	if (ret)
		drm_dbg(&hwmon->xe->drm, "read failed ch %d val0 0x%08x, val1 0x%08x, ret %d\n",
			channel, val0, val1, ret);

	if (attr == PL1_HWMON_ATTR)
		val0 = (val0 & ~clr) | set;
	else if (attr == PL2_HWMON_ATTR)
		val1 = (val1 & ~clr) | set;
	...
	ret = xe_pcode_write64_timeout(root_tile, PCODE_MBOX(...), val0, val1, PL_WRITE_MBX_TIMEOUT_MS);
	...
}

Writing these 0 values back via xe_pcode_write64_timeout() inadvertently zeroes
out the non-targeted power limit and its time windows. Can this disable critical
sustained power limits and cause severe performance throttling?


[Severity: High]
This is a pre-existing issue, but does xe_hwmon_power_max_interval_store()
properly validate the time window for CRI platforms?

The sysfs store function bounds-checks the input time window against max_win
(calculated using legacy encoding up to ~256 seconds) and then shifts the
value before placing it into the 7-bit PWR_LIM_TIME field:

drivers/gpu/drm/xe/xe_hwmon.c:xe_hwmon_power_max_interval_store() {
	...
	if (val > max_win)
		return -EINVAL;

	if (hwmon->xe->info.platform >= XE_CRESCENTISLAND) {
		/* ... */
		rxy = REG_FIELD_PREP(PWR_LIM_TIME, (val << 2));
	}
	...
}

Inputs larger than ~31 ms will silently overflow the 7-bit PWR_LIM_TIME field.
Will this write a truncated, drastically reduced time window to the hardware,
restricting the GPU's ability to absorb bursty workloads and causing immediate
throttling?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260910182756.638830-1-karthik.poosa@intel.com?part=2

Re: [PATCH v3 2/5] drm/xe/hwmon: Use VRAM temperature sensor count from thermal config on CRI

[Rodrigo Vivi]

On Thu, Sep 10, 2026 at 11:57:53PM +0530, Karthik Poosa wrote:
> Read the number of VRAM temperature sensor channels from the second byte
> of READ_THERMAL_CONFIG on CRI platforms. Use the reported count to avoid
> exposing hwmon attributes for unavailable VRAM temperature sensors, while
> retaining the maximum supported channel count on non-CRI platforms.
> 
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> ---
> 
> v2:
>  - Address review comments from sashiko-bot@kernel.org.
>  - Address review comments from Badal and Raag.
>  - Update HWMON_CHANNEL_INFO() to supports maximum VRAM channels of CRI.
> 
> v3:
>  - Address review comments from sashiko-bot@kernel.org.
>  - Address review comments from Rodrigo.
> 
>  drivers/gpu/drm/xe/xe_device_types.h |   4 +
>  drivers/gpu/drm/xe/xe_hwmon.c        | 115 +++++++++++++++++++++++++--
>  drivers/gpu/drm/xe/xe_pci.c          |   2 +
>  drivers/gpu/drm/xe/xe_pci_types.h    |   1 +
>  drivers/gpu/drm/xe/xe_pcode_api.h    |   1 +
>  5 files changed, 115 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index f88bacf63c83..74037a9c32f7 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -178,6 +178,10 @@ struct xe_device {
>  		u8 has_drm_ras:1;
>  		/** @info.has_fan_control: Device supports fan control */
>  		u8 has_fan_control:1;
> +		/*

/**

then Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> +		 * @info.has_fixed_vram_channels: Device has fixed VRAM temperature channel count.
> +		 */
> +		u8 has_fixed_vram_channels:1;
>  		/** @info.has_flat_ccs: Whether flat CCS metadata is used */
>  		u8 has_flat_ccs:1;
>  		/** @info.has_gsc_nvm: Device has gsc non-volatile memory */
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index faed2f5da394..a60a6a731d88 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -39,7 +39,8 @@ enum xe_hwmon_reg_operation {
>  	REG_READ64,
>  };
>  
> -#define MAX_VRAM_CHANNELS      (16)
> +#define MAX_VRAM_CHANNELS	80
> +#define FIXED_VRAM_CHANNELS	16
>  
>  enum xe_hwmon_channel {
>  	CHANNEL_CARD,
> @@ -48,6 +49,7 @@ enum xe_hwmon_channel {
>  	CHANNEL_MCTRL,
>  	CHANNEL_PCIE,
>  	CHANNEL_VRAM_N,
> +	/* Compile-time upper bound; actual channel count is hwmon->temp.vram_count */
>  	CHANNEL_VRAM_N_MAX = CHANNEL_VRAM_N + MAX_VRAM_CHANNELS - 1,
>  	CHANNEL_MAX,
>  };
> @@ -142,12 +144,14 @@ struct xe_hwmon_thermal_info {
>  		/** @data: temperature limits in dwords */
>  		u32 data[DIV_ROUND_UP(TEMP_LIMIT_MAX, sizeof(u32))];
>  	};
> -	/** @count: no of temperature sensors available for the platform */
> +	/** @count: temperature sensors count from READ_THERMAL_CONFIG */
>  	u8 count;
> +	/** @vram_count: number of VRAM temperature sensors available for the platform */
> +	u8 vram_count;
>  	/** @value: signed value from each sensor */
>  	s8 value[U8_MAX];
> -	/** @vram_label: vram label names */
> -	char vram_label[MAX_VRAM_CHANNELS][MAX_LABEL_SIZE];
> +	/** @vram_label: vram label names, dynamically allocated based on vram_count */
> +	char (*vram_label)[MAX_LABEL_SIZE];
>  };
>  
>  /**
> @@ -271,7 +275,7 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg
>  				return BMG_PACKAGE_TEMPERATURE;
>  			else if (channel == CHANNEL_VRAM)
>  				return BMG_VRAM_TEMPERATURE;
> -			else if (in_range(channel, CHANNEL_VRAM_N, MAX_VRAM_CHANNELS))
> +			else if (in_range(channel, CHANNEL_VRAM_N, hwmon->temp.vram_count))
>  				return BMG_VRAM_TEMPERATURE_N(channel - CHANNEL_VRAM_N);
>  		} else if (xe->info.platform == XE_DG2) {
>  			if (channel == CHANNEL_PKG)
> @@ -777,6 +781,70 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
>  			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
>  			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
>  			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
>  			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL),
>  	HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
>  			   HWMON_P_CAP,
> @@ -794,6 +862,14 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
>  	u32 config = 0;
>  	int ret;
>  
> +	/*
> +	 * Fixed-channel platforms don't derive the VRAM count from the mailbox
> +	 * config, so set it up front to keep the sensors visible even if a read
> +	 * below fails.
> +	 */
> +	if (hwmon->xe->info.has_fixed_vram_channels)
> +		hwmon->temp.vram_count = FIXED_VRAM_CHANNELS;
> +
>  	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_LIMITS, 0),
>  			    &hwmon->temp.data[0], &hwmon->temp.data[1]);
>  	if (ret)
> @@ -810,6 +886,16 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
>  	drm_dbg(&hwmon->xe->drm, "thermal config count 0x%x\n", config);
>  	hwmon->temp.count = REG_FIELD_GET(TEMP_MASK, config);
>  
> +	if (!hwmon->xe->info.has_fixed_vram_channels) {
> +		hwmon->temp.vram_count = REG_FIELD_GET(VRAM_COUNT_MASK, config);
> +		if (hwmon->temp.vram_count > MAX_VRAM_CHANNELS) {
> +			drm_warn(&hwmon->xe->drm,
> +				 "VRAM channel count %d exceeds max %d, clamping\n",
> +				 hwmon->temp.vram_count, MAX_VRAM_CHANNELS);
> +			hwmon->temp.vram_count = MAX_VRAM_CHANNELS;
> +		}
> +	}
> +
>  	return ret;
>  }
>  
> @@ -1505,7 +1591,7 @@ static int xe_hwmon_read_label(struct device *dev,
>  			*str = "mctrl";
>  		else if (channel == CHANNEL_PCIE)
>  			*str = "pcie";
> -		else if (in_range(channel, CHANNEL_VRAM_N, MAX_VRAM_CHANNELS))
> +		else if (in_range(channel, CHANNEL_VRAM_N, hwmon->temp.vram_count))
>  			*str = hwmon->temp.vram_label[channel - CHANNEL_VRAM_N];
>  		return 0;
>  	case hwmon_power:
> @@ -1634,6 +1720,15 @@ int xe_hwmon_register(struct xe_device *xe)
>  
>  	xe_hwmon_get_preregistration_info(hwmon);
>  
> +	if (hwmon->temp.vram_count) {
> +		hwmon->temp.vram_label = devm_kcalloc(dev, hwmon->temp.vram_count,
> +						      MAX_LABEL_SIZE, GFP_KERNEL);
> +		if (!hwmon->temp.vram_label) {
> +			ret = -ENOMEM;
> +			goto err_null_hwmon;
> +		}
> +	}
> +
>  	drm_dbg(&xe->drm, "Register xe hwmon interface\n");
>  
>  	/*  hwmon_dev points to device hwmon<i> */
> @@ -1642,10 +1737,14 @@ int xe_hwmon_register(struct xe_device *xe)
>  								hwmon_groups);
>  	if (IS_ERR(hwmon->hwmon_dev)) {
>  		drm_err(&xe->drm, "Failed to register xe hwmon (%pe)\n", hwmon->hwmon_dev);
> -		xe->hwmon = NULL;
> -		return PTR_ERR(hwmon->hwmon_dev);
> +		ret = PTR_ERR(hwmon->hwmon_dev);
> +		goto err_null_hwmon;
>  	}
>  
>  	return 0;
> +
> +err_null_hwmon:
> +	xe->hwmon = NULL;
> +	return ret;
>  }
>  MODULE_IMPORT_NS("INTEL_PMT_TELEMETRY");
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index 1e04e8ef2611..d98b240e1753 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -416,6 +416,7 @@ static const struct xe_device_desc bmg_desc = {
>  	.dma_mask_size = 46,
>  	.has_display = true,
>  	.has_fan_control = true,
> +	.has_fixed_vram_channels = true,
>  	.has_flat_ccs = 1,
>  	.has_mbx_power_limits = true,
>  	.has_mbx_thermal_info = true,
> @@ -794,6 +795,7 @@ static int xe_info_init_early(struct xe_device *xe,
>  	xe->info.has_cached_pt = desc->has_cached_pt;
>  	xe->info.has_drm_ras = desc->has_drm_ras;
>  	xe->info.has_fan_control = desc->has_fan_control;
> +	xe->info.has_fixed_vram_channels = desc->has_fixed_vram_channels;
>  	/* runtime fusing may force flat_ccs to disabled later */
>  	xe->info.has_flat_ccs = desc->has_flat_ccs;
>  	xe->info.has_mbx_power_limits = desc->has_mbx_power_limits;
> diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
> index fed509ff601e..87b8121b3e51 100644
> --- a/drivers/gpu/drm/xe/xe_pci_types.h
> +++ b/drivers/gpu/drm/xe/xe_pci_types.h
> @@ -42,6 +42,7 @@ struct xe_device_desc {
>  	u8 has_display:1;
>  	u8 has_drm_ras:1;
>  	u8 has_fan_control:1;
> +	u8 has_fixed_vram_channels:1;
>  	u8 has_flat_ccs:1;
>  	u8 has_gsc_nvm:1;
>  	u8 has_heci_gscfi:1;
> diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
> index 94575c476e3d..e1079eff72c6 100644
> --- a/drivers/gpu/drm/xe/xe_pcode_api.h
> +++ b/drivers/gpu/drm/xe/xe_pcode_api.h
> @@ -57,6 +57,7 @@
>  #define   PCODE_THERMAL_INFO			0x25
>  #define     READ_THERMAL_LIMITS			0x0
>  #define     READ_THERMAL_CONFIG			0x1
> +#define       VRAM_COUNT_MASK			REG_GENMASK(15, 8)
>  #define     READ_THERMAL_DATA			0x2
>  #define       PCIE_SENSOR_GROUP_ID		0x2
>  #define       PCIE_SENSOR_MASK			REG_GENMASK(31, 16)
> -- 
> 2.25.1
> 

[PATCH v3 3/5] drm/xe/hwmon: Fix memory controller thermal data handling

[Karthik Poosa]

Read all required thermal groups in get_mc_temp() and use an aligned
u32 buffer for PCODE accesses to avoid unaligned memory accesses and
ensure correct MC temperature reporting.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Fixes: 3a0cb885e111 ("drm/xe/hwmon: Expose memory controller temperature")
---
 drivers/gpu/drm/xe/xe_hwmon.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index a60a6a731d88..c682c5a33650 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -148,8 +148,12 @@ struct xe_hwmon_thermal_info {
 	u8 count;
 	/** @vram_count: number of VRAM temperature sensors available for the platform */
 	u8 vram_count;
-	/** @value: signed value from each sensor */
-	s8 value[U8_MAX];
+	union {
+		/** @value: signed value from each sensor */
+		s8 value[U8_MAX + 1];
+		/** @dword: sensor values as dwords, u32-aligned for pcode reads */
+		u32 dword[DIV_ROUND_UP(U8_MAX + 1, sizeof(u32))];
+	};
 	/** @vram_label: vram label names, dynamically allocated based on vram_count */
 	char (*vram_label)[MAX_LABEL_SIZE];
 };
@@ -910,16 +914,16 @@ static inline bool is_temp_valid(const struct xe_hwmon *hwmon, u32 value, bool i
 static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
 {
 	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
-	u32 *dword = (u32 *)hwmon->temp.value;
 	int ret, i, count = 0;
 	s32 average = 0;
 
-	for (i = 0; i < DIV_ROUND_UP(TEMP_LIMIT_MAX, sizeof(u32)); i++) {
+	for (i = 0; i < DIV_ROUND_UP(hwmon->temp.count, sizeof(u32)); i++) {
 		ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
-				    (dword + i), NULL);
+				    &hwmon->temp.dword[i], NULL);
 		if (ret)
 			return ret;
-		drm_dbg(&hwmon->xe->drm, "thermal data for group %d val 0x%x\n", i, dword[i]);
+		drm_dbg(&hwmon->xe->drm, "thermal data for group %d val 0x%x\n", i,
+			hwmon->temp.dword[i]);
 	}
 
 	for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++) {
-- 
2.25.1

Re: [PATCH v3 3/5] drm/xe/hwmon: Fix memory controller thermal data handling

[Rodrigo Vivi]

On Thu, Sep 10, 2026 at 11:57:54PM +0530, Karthik Poosa wrote:
> Read all required thermal groups in get_mc_temp() and use an aligned
> u32 buffer for PCODE accesses to avoid unaligned memory accesses and
> ensure correct MC temperature reporting.
> 
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> Fixes: 3a0cb885e111 ("drm/xe/hwmon: Expose memory controller temperature")

please move this to be the first patch of the series or send this
standalone.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_hwmon.c | 16 ++++++++++------
>  1 file changed, 10 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index a60a6a731d88..c682c5a33650 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -148,8 +148,12 @@ struct xe_hwmon_thermal_info {
>  	u8 count;
>  	/** @vram_count: number of VRAM temperature sensors available for the platform */
>  	u8 vram_count;
> -	/** @value: signed value from each sensor */
> -	s8 value[U8_MAX];
> +	union {
> +		/** @value: signed value from each sensor */
> +		s8 value[U8_MAX + 1];
> +		/** @dword: sensor values as dwords, u32-aligned for pcode reads */
> +		u32 dword[DIV_ROUND_UP(U8_MAX + 1, sizeof(u32))];
> +	};
>  	/** @vram_label: vram label names, dynamically allocated based on vram_count */
>  	char (*vram_label)[MAX_LABEL_SIZE];
>  };
> @@ -910,16 +914,16 @@ static inline bool is_temp_valid(const struct xe_hwmon *hwmon, u32 value, bool i
>  static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
>  {
>  	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
> -	u32 *dword = (u32 *)hwmon->temp.value;
>  	int ret, i, count = 0;
>  	s32 average = 0;
>  
> -	for (i = 0; i < DIV_ROUND_UP(TEMP_LIMIT_MAX, sizeof(u32)); i++) {
> +	for (i = 0; i < DIV_ROUND_UP(hwmon->temp.count, sizeof(u32)); i++) {
>  		ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
> -				    (dword + i), NULL);
> +				    &hwmon->temp.dword[i], NULL);
>  		if (ret)
>  			return ret;
> -		drm_dbg(&hwmon->xe->drm, "thermal data for group %d val 0x%x\n", i, dword[i]);
> +		drm_dbg(&hwmon->xe->drm, "thermal data for group %d val 0x%x\n", i,
> +			hwmon->temp.dword[i]);
>  	}
>  
>  	for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++) {
> -- 
> 2.25.1
> 

[PATCH v3 4/5] drm/xe/hwmon: Decode CRI temperature registers as IEEE-754

[Karthik Poosa]

CRI temperature registers encode package and VRAM temperatures as
IEEE-754 floating-point values. Decode these values before exposing
them through hwmon.
 
Use integer-based IEEE-754 decoding since kernel code does not use
floating-point operations and hwmon reports integer temperatures.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Assisted-by: GitHub Copilot; Model: MAI-Code-1.1-Flash
---

v2: Reject temperatures that overflow long on 32-bit (Sashiko).

 drivers/gpu/drm/xe/xe_hwmon.c | 85 +++++++++++++++++++++++++++++------
 1 file changed, 71 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index c682c5a33650..e4a210916df2 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -1159,6 +1159,62 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 	}
 }
 
+/**
+ * xe_hwmon_temperature_decode - Decode an IEEE-754 temperature register value
+ * @reg_val: The raw register value to decode
+ *
+ * IEEE-754 single-precision format:
+ *
+ *  31 30                         23 22                         0
+ * +--+-----------------------------+----------------------------+
+ * | S|          exponent           |          fraction          |
+ * +--+-----------------------------+----------------------------+
+ *
+ * value = (-1)^S * 1.fraction * 2^(exponent - 127)
+ *
+ * Return: 0 on success or an error if @reg_val is non-finite or cannot be
+ * represented in millidegrees Celsius.
+ */
+static int xe_hwmon_temperature_decode(u32 reg_val, long *temperature)
+{
+	u32 exponent = (reg_val >> 23) & 0xff;
+	u32 mantissa = reg_val & 0x7fffff;
+	s64 value;
+	int shift;
+
+	/* Exponent 0xff encodes infinity or NaN. */
+	if (exponent == 0xff)
+		return -EINVAL;
+
+	/* Subnormal values are smaller than one millidegree Celsius. */
+	if (!exponent) {
+		*temperature = 0;
+		return 0;
+	}
+
+	value = (s64)(mantissa | BIT(23)) * MILLIDEGREE_PER_DEGREE;
+	shift = exponent - 150;
+	if (shift >= 0) {
+		if (shift >= BITS_PER_LONG || value > (LONG_MAX >> shift))
+			return -ERANGE;
+		value <<= shift;
+	} else if (shift > -64) {
+		value >>= -shift;
+	} else {
+		value = 0;
+	}
+
+	/* Ensure the magnitude fits in long, which is 32-bit on some arches. */
+	if (value > LONG_MAX)
+		return -ERANGE;
+
+	if (reg_val & BIT(31))
+		value = -value;
+
+	*temperature = value;
+	return 0;
+}
+
 static int
 xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
 {
@@ -1168,26 +1224,27 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
 	switch (attr) {
 	case hwmon_temp_input:
 		switch (channel) {
-		case CHANNEL_PKG:
-		case CHANNEL_VRAM:
-			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
-
-			/* HW register value is in degrees Celsius, convert to millidegrees. */
-			*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
-			return 0;
 		case CHANNEL_MCTRL:
 			return get_mc_temp(hwmon, val);
 		case CHANNEL_PCIE:
 			return get_pcie_temp(hwmon, val);
+		case CHANNEL_PKG:
+		case CHANNEL_VRAM:
 		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
 			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
-			/*
-			 * This temperature format is 24 bit [31:8] signed integer and 8 bit
-			 * [7:0] fraction.
-			 */
-			*val = (s32)(REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val)) *
-				(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
-				 MILLIDEGREE_PER_DEGREE;
+			if (hwmon->xe->info.platform >= XE_CRESCENTISLAND) {
+				return xe_hwmon_temperature_decode((u32)reg_val, val);
+			} else if (channel >= CHANNEL_VRAM_N) {
+				/*
+				 * This temperature format is 24 bit [31:8] signed integer and 8 bit
+				 * [7:0] fraction for platforms before CRI.
+				 */
+				*val = (s32)REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val) *
+					(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
+					MILLIDEGREE_PER_DEGREE;
+			} else {
+				*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
+			}
 			return 0;
 		default:
 			return -EOPNOTSUPP;
-- 
2.25.1

Re: [PATCH v3 4/5] drm/xe/hwmon: Decode CRI temperature registers as IEEE-754

[Rodrigo Vivi]

On Thu, Sep 10, 2026 at 11:57:55PM +0530, Karthik Poosa wrote:
> CRI temperature registers encode package and VRAM temperatures as
> IEEE-754 floating-point values. Decode these values before exposing
> them through hwmon.
>  
> Use integer-based IEEE-754 decoding since kernel code does not use
> floating-point operations and hwmon reports integer temperatures.
> 
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> Assisted-by: GitHub Copilot; Model: MAI-Code-1.1-Flash

nowadays 'Assisted-by: LLM' should be enough.
And this one here was not the previous style anyway.

> ---
> 
> v2: Reject temperatures that overflow long on 32-bit (Sashiko).
> 
>  drivers/gpu/drm/xe/xe_hwmon.c | 85 +++++++++++++++++++++++++++++------
>  1 file changed, 71 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index c682c5a33650..e4a210916df2 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -1159,6 +1159,62 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>  	}
>  }
>  
> +/**
> + * xe_hwmon_temperature_decode - Decode an IEEE-754 temperature register value
> + * @reg_val: The raw register value to decode
> + *
> + * IEEE-754 single-precision format:
> + *
> + *  31 30                         23 22                         0
> + * +--+-----------------------------+----------------------------+
> + * | S|          exponent           |          fraction          |
> + * +--+-----------------------------+----------------------------+
> + *
> + * value = (-1)^S * 1.fraction * 2^(exponent - 127)
> + *
> + * Return: 0 on success or an error if @reg_val is non-finite or cannot be
> + * represented in millidegrees Celsius.
> + */
> +static int xe_hwmon_temperature_decode(u32 reg_val, long *temperature)
> +{
> +	u32 exponent = (reg_val >> 23) & 0xff;
> +	u32 mantissa = reg_val & 0x7fffff;

Perhaps all of these deserves some define somewhere?!

Perhaps something like LLM suggested:

        #define IEEE754_SIGN            BIT(31)
        #define IEEE754_EXP_MASK        GENMASK(30, 23)
        #define IEEE754_MANTISSA_MASK   GENMASK(22, 0)
        #define IEEE754_EXP_BIAS        127
        #define IEEE754_MANTISSA_BITS   23
        #define IEEE754_EXP_SPECIAL     0xff    /* Inf / NaN */

and use FIELD_GET() for the extraction

> +	s64 value;
> +	int shift;
> +
> +	/* Exponent 0xff encodes infinity or NaN. */
> +	if (exponent == 0xff)
> +		return -EINVAL;
> +
> +	/* Subnormal values are smaller than one millidegree Celsius. */
> +	if (!exponent) {
> +		*temperature = 0;
> +		return 0;
> +	}
> +
> +	value = (s64)(mantissa | BIT(23)) * MILLIDEGREE_PER_DEGREE;
> +	shift = exponent - 150;
> +	if (shift >= 0) {
> +		if (shift >= BITS_PER_LONG || value > (LONG_MAX >> shift))
> +			return -ERANGE;
> +		value <<= shift;
> +	} else if (shift > -64) {
> +		value >>= -shift;
> +	} else {
> +		value = 0;
> +	}
> +
> +	/* Ensure the magnitude fits in long, which is 32-bit on some arches. */
> +	if (value > LONG_MAX)
> +		return -ERANGE;
> +
> +	if (reg_val & BIT(31))
> +		value = -value;
> +
> +	*temperature = value;
> +	return 0;
> +}
> +
>  static int
>  xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>  {
> @@ -1168,26 +1224,27 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>  	switch (attr) {
>  	case hwmon_temp_input:
>  		switch (channel) {
> -		case CHANNEL_PKG:
> -		case CHANNEL_VRAM:
> -			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
> -
> -			/* HW register value is in degrees Celsius, convert to millidegrees. */
> -			*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
> -			return 0;
>  		case CHANNEL_MCTRL:
>  			return get_mc_temp(hwmon, val);
>  		case CHANNEL_PCIE:
>  			return get_pcie_temp(hwmon, val);
> +		case CHANNEL_PKG:
> +		case CHANNEL_VRAM:
>  		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>  			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
> -			/*
> -			 * This temperature format is 24 bit [31:8] signed integer and 8 bit
> -			 * [7:0] fraction.
> -			 */
> -			*val = (s32)(REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val)) *
> -				(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
> -				 MILLIDEGREE_PER_DEGREE;
> +			if (hwmon->xe->info.platform >= XE_CRESCENTISLAND) {
> +				return xe_hwmon_temperature_decode((u32)reg_val, val);
> +			} else if (channel >= CHANNEL_VRAM_N) {
> +				/*
> +				 * This temperature format is 24 bit [31:8] signed integer and 8 bit
> +				 * [7:0] fraction for platforms before CRI.
> +				 */
> +				*val = (s32)REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val) *
> +					(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
> +					MILLIDEGREE_PER_DEGREE;
> +			} else {
> +				*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
> +			}
>  			return 0;
>  		default:
>  			return -EOPNOTSUPP;
> -- 
> 2.25.1
> 

Re: [PATCH v3 4/5] drm/xe/hwmon: Decode CRI temperature registers as IEEE-754

[Poosa, Karthik]

On 18-09-2026 15:43, Rodrigo Vivi wrote:
> On Thu, Sep 10, 2026 at 11:57:55PM +0530, Karthik Poosa wrote:
>> CRI temperature registers encode package and VRAM temperatures as
>> IEEE-754 floating-point values. Decode these values before exposing
>> them through hwmon.
>>   
>> Use integer-based IEEE-754 decoding since kernel code does not use
>> floating-point operations and hwmon reports integer temperatures.
>>
>> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
>> Assisted-by: GitHub Copilot; Model: MAI-Code-1.1-Flash
> nowadays 'Assisted-by: LLM' should be enough.
> And this one here was not the previous style anyway.
>
>> ---
>>
>> v2: Reject temperatures that overflow long on 32-bit (Sashiko).
>>
>>   drivers/gpu/drm/xe/xe_hwmon.c | 85 +++++++++++++++++++++++++++++------
>>   1 file changed, 71 insertions(+), 14 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
>> index c682c5a33650..e4a210916df2 100644
>> --- a/drivers/gpu/drm/xe/xe_hwmon.c
>> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
>> @@ -1159,6 +1159,62 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>>   	}
>>   }
>>   
>> +/**
>> + * xe_hwmon_temperature_decode - Decode an IEEE-754 temperature register value
>> + * @reg_val: The raw register value to decode
>> + *
>> + * IEEE-754 single-precision format:
>> + *
>> + *  31 30                         23 22                         0
>> + * +--+-----------------------------+----------------------------+
>> + * | S|          exponent           |          fraction          |
>> + * +--+-----------------------------+----------------------------+
>> + *
>> + * value = (-1)^S * 1.fraction * 2^(exponent - 127)
>> + *
>> + * Return: 0 on success or an error if @reg_val is non-finite or cannot be
>> + * represented in millidegrees Celsius.
>> + */
>> +static int xe_hwmon_temperature_decode(u32 reg_val, long *temperature)
>> +{
>> +	u32 exponent = (reg_val >> 23) & 0xff;
>> +	u32 mantissa = reg_val & 0x7fffff;
> Perhaps all of these deserves some define somewhere?!
I shall define here itself, as it not used anywhere else.
>
> Perhaps something like LLM suggested:
>
>          #define IEEE754_SIGN            BIT(31)
>          #define IEEE754_EXP_MASK        GENMASK(30, 23)
>          #define IEEE754_MANTISSA_MASK   GENMASK(22, 0)
>          #define IEEE754_EXP_BIAS        127
>          #define IEEE754_MANTISSA_BITS   23
>          #define IEEE754_EXP_SPECIAL     0xff    /* Inf / NaN */
>
> and use FIELD_GET() for the extraction
>
>> +	s64 value;
>> +	int shift;
>> +
>> +	/* Exponent 0xff encodes infinity or NaN. */
>> +	if (exponent == 0xff)
>> +		return -EINVAL;
>> +
>> +	/* Subnormal values are smaller than one millidegree Celsius. */
>> +	if (!exponent) {
>> +		*temperature = 0;
>> +		return 0;
>> +	}
>> +
>> +	value = (s64)(mantissa | BIT(23)) * MILLIDEGREE_PER_DEGREE;
>> +	shift = exponent - 150;
>> +	if (shift >= 0) {
>> +		if (shift >= BITS_PER_LONG || value > (LONG_MAX >> shift))
>> +			return -ERANGE;
>> +		value <<= shift;
>> +	} else if (shift > -64) {
>> +		value >>= -shift;
>> +	} else {
>> +		value = 0;
>> +	}
>> +
>> +	/* Ensure the magnitude fits in long, which is 32-bit on some arches. */
>> +	if (value > LONG_MAX)
>> +		return -ERANGE;
>> +
>> +	if (reg_val & BIT(31))
>> +		value = -value;
>> +
>> +	*temperature = value;
>> +	return 0;
>> +}
>> +
>>   static int
>>   xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>>   {
>> @@ -1168,26 +1224,27 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>>   	switch (attr) {
>>   	case hwmon_temp_input:
>>   		switch (channel) {
>> -		case CHANNEL_PKG:
>> -		case CHANNEL_VRAM:
>> -			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
>> -
>> -			/* HW register value is in degrees Celsius, convert to millidegrees. */
>> -			*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
>> -			return 0;
>>   		case CHANNEL_MCTRL:
>>   			return get_mc_temp(hwmon, val);
>>   		case CHANNEL_PCIE:
>>   			return get_pcie_temp(hwmon, val);
>> +		case CHANNEL_PKG:
>> +		case CHANNEL_VRAM:
>>   		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>>   			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
>> -			/*
>> -			 * This temperature format is 24 bit [31:8] signed integer and 8 bit
>> -			 * [7:0] fraction.
>> -			 */
>> -			*val = (s32)(REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val)) *
>> -				(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
>> -				 MILLIDEGREE_PER_DEGREE;
>> +			if (hwmon->xe->info.platform >= XE_CRESCENTISLAND) {
>> +				return xe_hwmon_temperature_decode((u32)reg_val, val);
>> +			} else if (channel >= CHANNEL_VRAM_N) {
>> +				/*
>> +				 * This temperature format is 24 bit [31:8] signed integer and 8 bit
>> +				 * [7:0] fraction for platforms before CRI.
>> +				 */
>> +				*val = (s32)REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val) *
>> +					(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
>> +					MILLIDEGREE_PER_DEGREE;
>> +			} else {
>> +				*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
>> +			}
>>   			return 0;
>>   		default:
>>   			return -EOPNOTSUPP;
>> -- 
>> 2.25.1
>>

[PATCH v3 5/5] drm/xe/hwmon: Disable memory controller and PCIe temperatures on CRI

[Karthik Poosa]

Temporarily disable memory controller and PCIe temperature reporting on
CRI platforms.
 
The definitions and interpretation of these temperature sources are not
yet sufficiently clear, which may result in inaccurate reporting.
Disable them until the hardware interface and corresponding definitions
are fully validated.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
 drivers/gpu/drm/xe/xe_hwmon.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index e4a210916df2..669bbfe18cea 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -1094,8 +1094,14 @@ static bool is_temp_available(struct xe_hwmon *hwmon, int channel)
 
 		return true;
 	case CHANNEL_MCTRL:
+		if (hwmon->xe->info.platform >= XE_CRESCENTISLAND)
+			return false;
+
 		return hwmon->temp.count && !get_mc_temp(hwmon, NULL);
 	case CHANNEL_PCIE:
+		if (hwmon->xe->info.platform >= XE_CRESCENTISLAND)
+			return false;
+
 		return hwmon->temp.count && !get_pcie_temp(hwmon, NULL);
 	default:
 		return false;
-- 
2.25.1

Re: [PATCH v3 5/5] drm/xe/hwmon: Disable memory controller and PCIe temperatures on CRI

[Rodrigo Vivi]

On Thu, Sep 10, 2026 at 11:57:56PM +0530, Karthik Poosa wrote:
> Temporarily disable memory controller and PCIe temperature reporting on
> CRI platforms.
>  
> The definitions and interpretation of these temperature sources are not
> yet sufficiently clear, which may result in inaccurate reporting.
> Disable them until the hardware interface and corresponding definitions
> are fully validated.

I'm wondering if perhaps some has_ flag should be more appropriate,
but we would also need to think a way that we don't explode that...

so, for now let's move with this

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_hwmon.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index e4a210916df2..669bbfe18cea 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -1094,8 +1094,14 @@ static bool is_temp_available(struct xe_hwmon *hwmon, int channel)
>  
>  		return true;
>  	case CHANNEL_MCTRL:
> +		if (hwmon->xe->info.platform >= XE_CRESCENTISLAND)
> +			return false;
> +
>  		return hwmon->temp.count && !get_mc_temp(hwmon, NULL);
>  	case CHANNEL_PCIE:
> +		if (hwmon->xe->info.platform >= XE_CRESCENTISLAND)
> +			return false;
> +
>  		return hwmon->temp.count && !get_pcie_temp(hwmon, NULL);
>  	default:
>  		return false;
> -- 
> 2.25.1
> 

Re: [PATCH v3 5/5] drm/xe/hwmon: Disable memory controller and PCIe temperatures on CRI

[Poosa, Karthik]

On 18-09-2026 15:50, Rodrigo Vivi wrote:
> On Thu, Sep 10, 2026 at 11:57:56PM +0530, Karthik Poosa wrote:
>> Temporarily disable memory controller and PCIe temperature reporting on
>> CRI platforms.
>>   
>> The definitions and interpretation of these temperature sources are not
>> yet sufficiently clear, which may result in inaccurate reporting.
>> Disable them until the hardware interface and corresponding definitions
>> are fully validated.
> I'm wondering if perhaps some has_ flag should be more appropriate,
> but we would also need to think a way that we don't explode that...
>
> so, for now let's move with this
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

We can omit this.We have got offsets of memory controller and pcie 
sensors mailbox offsets on CRI from HW team.
I shall raise patch for it.

>
>> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
>> ---
>>   drivers/gpu/drm/xe/xe_hwmon.c | 6 ++++++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
>> index e4a210916df2..669bbfe18cea 100644
>> --- a/drivers/gpu/drm/xe/xe_hwmon.c
>> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
>> @@ -1094,8 +1094,14 @@ static bool is_temp_available(struct xe_hwmon *hwmon, int channel)
>>   
>>   		return true;
>>   	case CHANNEL_MCTRL:
>> +		if (hwmon->xe->info.platform >= XE_CRESCENTISLAND)
>> +			return false;
>> +
>>   		return hwmon->temp.count && !get_mc_temp(hwmon, NULL);
>>   	case CHANNEL_PCIE:
>> +		if (hwmon->xe->info.platform >= XE_CRESCENTISLAND)
>> +			return false;
>> +
>>   		return hwmon->temp.count && !get_pcie_temp(hwmon, NULL);
>>   	default:
>>   		return false;
>> -- 
>> 2.25.1
>>

✓ CI.KUnit: success for drm/xe/hwmon: Update hwmon thermal mailbox handling (rev3)

[Patchwork]

== Series Details ==

Series: drm/xe/hwmon: Update hwmon thermal mailbox handling (rev3)
URL   : https://patchwork.freedesktop.org/series/172689/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[18:45:05] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:45:09] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:45:29] Starting KUnit Kernel (1/1)...
[18:45:29] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:45:29] ============= refcount_interrupt (4 subtests) ==============
[18:45:29] [PASSED] test_single_irq_change
[18:45:29] [PASSED] test_nested_irq_change
[18:45:29] [PASSED] test_multiple_irq_change
[18:45:29] [PASSED] test_irq_save
[18:45:29] =============== [PASSED] refcount_interrupt ================
[18:45:29] ================= gpu_buddy (14 subtests) ==================
[18:45:29] [PASSED] gpu_test_buddy_alloc_limit
[18:45:29] [PASSED] gpu_test_buddy_alloc_optimistic
[18:45:29] [PASSED] gpu_test_buddy_alloc_pessimistic
[18:45:29] [PASSED] gpu_test_buddy_alloc_pathological
[18:45:29] [PASSED] gpu_test_buddy_alloc_contiguous
[18:45:29] [PASSED] gpu_test_buddy_alloc_clear
[18:45:29] [PASSED] gpu_test_buddy_alloc_range
[18:45:30] [PASSED] gpu_test_buddy_alloc_range_bias
[18:45:31] [PASSED] gpu_test_buddy_fragmentation_performance
[18:45:31] [PASSED] gpu_test_buddy_dirty_tracker_performance
[18:45:31] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[18:45:31] [PASSED] gpu_test_buddy_offset_aligned_allocation
[18:45:31] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[18:45:31] [PASSED] gpu_test_buddy_addr_to_block
[18:45:31] ==================== [PASSED] gpu_buddy ====================
[18:45:31] ============================================================
[18:45:31] Testing complete. Ran 18 tests: passed: 18
[18:45:31] Elapsed time: 26.697s total, 4.392s configuring, 20.388s building, 1.874s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[18:45:31] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:45:33] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:46:07] Starting KUnit Kernel (1/1)...
[18:46:07] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:46:07] ============= refcount_interrupt (4 subtests) ==============
[18:46:07] [PASSED] test_single_irq_change
[18:46:07] [PASSED] test_nested_irq_change
[18:46:07] [PASSED] test_multiple_irq_change
[18:46:07] [PASSED] test_irq_save
[18:46:07] =============== [PASSED] refcount_interrupt ================
[18:46:07] ================== guc_buf (11 subtests) ===================
[18:46:07] [PASSED] test_smallest
[18:46:07] [PASSED] test_largest
[18:46:07] [PASSED] test_granular
[18:46:07] [PASSED] test_unique
[18:46:07] [PASSED] test_overlap
[18:46:07] [PASSED] test_reusable
[18:46:07] [PASSED] test_too_big
[18:46:07] [PASSED] test_flush
[18:46:07] [PASSED] test_lookup
[18:46:07] [PASSED] test_data
[18:46:07] [PASSED] test_class
[18:46:07] ===================== [PASSED] guc_buf =====================
[18:46:07] =================== guc_dbm (7 subtests) ===================
[18:46:07] [PASSED] test_empty
[18:46:07] [PASSED] test_default
[18:46:07] ======================== test_size  ========================
[18:46:07] [PASSED] 4
[18:46:07] [PASSED] 8
[18:46:07] [PASSED] 32
[18:46:07] [PASSED] 256
[18:46:07] ==================== [PASSED] test_size ====================
[18:46:07] ======================= test_reuse  ========================
[18:46:07] [PASSED] 4
[18:46:07] [PASSED] 8
[18:46:07] [PASSED] 32
[18:46:07] [PASSED] 256
[18:46:07] =================== [PASSED] test_reuse ====================
[18:46:07] =================== test_range_overlap  ====================
[18:46:07] [PASSED] 4
[18:46:07] [PASSED] 8
[18:46:07] [PASSED] 32
[18:46:07] [PASSED] 256
[18:46:07] =============== [PASSED] test_range_overlap ================
[18:46:07] =================== test_range_compact  ====================
[18:46:07] [PASSED] 4
[18:46:07] [PASSED] 8
[18:46:07] [PASSED] 32
[18:46:07] [PASSED] 256
[18:46:07] =============== [PASSED] test_range_compact ================
[18:46:07] ==================== test_range_spare  =====================
[18:46:07] [PASSED] 4
[18:46:07] [PASSED] 8
[18:46:07] [PASSED] 32
[18:46:07] [PASSED] 256
[18:46:07] ================ [PASSED] test_range_spare =================
[18:46:07] ===================== [PASSED] guc_dbm =====================
[18:46:07] =================== guc_idm (6 subtests) ===================
[18:46:07] [PASSED] bad_init
[18:46:07] [PASSED] no_init
[18:46:07] [PASSED] init_fini
[18:46:07] [PASSED] check_used
[18:46:07] [PASSED] check_quota
[18:46:07] [PASSED] check_all
[18:46:07] ===================== [PASSED] guc_idm =====================
[18:46:07] =============== guc_klv_helpers (9 subtests) ===============
[18:46:07] [PASSED] test_count
[18:46:07] [PASSED] test_encode_u32
[18:46:07] [PASSED] test_encode_u64
[18:46:07] [PASSED] test_encode_string
[18:46:07] [PASSED] test_encode_object_raw
[18:46:07] [PASSED] test_encode_object_klv
[18:46:07] [PASSED] test_encode_object_nested
[18:46:07] [PASSED] test_encode_object_basic
[18:46:07] [PASSED] test_print
[18:46:07] ================= [PASSED] guc_klv_helpers =================
[18:46:07] =================== xe_log (4 subtests) ====================
[18:46:07] [PASSED] demo_cper
[18:46:07] [PASSED] demo_dmesg
[18:46:07] ======================= test_dmesg  ========================
[18:46:07] [PASSED] test_fatal
[18:46:07] [PASSED] test_fatal_tile
[18:46:07] [PASSED] test_fatal_gt
[18:46:07] [PASSED] test_fatal_comp
[18:46:07] [PASSED] test_fatal_comp_tile
[18:46:07] [PASSED] test_fatal_comp_gt
[18:46:07] [PASSED] test_fatal_all
[18:46:07] [PASSED] test_recoverable
[18:46:07] [PASSED] test_recoverable_tile
[18:46:07] [PASSED] test_recoverable_gt
[18:46:07] [PASSED] test_recoverable_comp
[18:46:07] [PASSED] test_recoverable_comp_tile
[18:46:07] [PASSED] test_recoverable_comp_gt
[18:46:07] [PASSED] test_recoverable_all
[18:46:07] [PASSED] test_info
[18:46:07] [PASSED] test_info_tile
[18:46:07] [PASSED] test_info_gt
[18:46:07] [PASSED] test_info_err
[18:46:07] [PASSED] test_info_comp
[18:46:07] [PASSED] test_info_comp_tile
[18:46:07] [PASSED] test_info_comp_gt
[18:46:07] [PASSED] test_info_all
[18:46:07] [PASSED] test_hw_fatal
[18:46:07] [PASSED] test_hw_recoverable
[18:46:07] [PASSED] test_hw_corrected
[18:46:07] [PASSED] test_hw_informational
[18:46:07] =================== [PASSED] test_dmesg ====================
[18:46:07] ====================== test_invalid  =======================
[18:46:07] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[18:46:07] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[18:46:07] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[18:46:07] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[18:46:07] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[18:46:07] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[18:46:07] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[18:46:07] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[18:46:07] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[18:46:07] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[18:46:07] ================== [SKIPPED] test_invalid ==================
[18:46:07] ===================== [PASSED] xe_log ======================
[18:46:07] ================== no_relay (3 subtests) ===================
[18:46:07] [PASSED] xe_drops_guc2pf_if_not_ready
[18:46:07] [PASSED] xe_drops_guc2vf_if_not_ready
[18:46:07] [PASSED] xe_rejects_send_if_not_ready
[18:46:07] ==================== [PASSED] no_relay =====================
[18:46:07] ================== pf_relay (14 subtests) ==================
[18:46:07] [PASSED] pf_rejects_guc2pf_too_short
[18:46:07] [PASSED] pf_rejects_guc2pf_too_long
[18:46:07] [PASSED] pf_rejects_guc2pf_no_payload
[18:46:07] [PASSED] pf_fails_no_payload
[18:46:07] [PASSED] pf_fails_bad_origin
[18:46:07] [PASSED] pf_fails_bad_type
[18:46:07] [PASSED] pf_txn_reports_error
[18:46:07] [PASSED] pf_txn_sends_pf2guc
[18:46:07] [PASSED] pf_sends_pf2guc
[18:46:07] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[18:46:07] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[18:46:07] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[18:46:07] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[18:46:07] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[18:46:07] ==================== [PASSED] pf_relay =====================
[18:46:07] ================== vf_relay (3 subtests) ===================
[18:46:07] [PASSED] vf_rejects_guc2vf_too_short
[18:46:07] [PASSED] vf_rejects_guc2vf_too_long
[18:46:07] [PASSED] vf_rejects_guc2vf_no_payload
[18:46:07] ==================== [PASSED] vf_relay =====================
[18:46:07] ================ pf_gt_config (9 subtests) =================
[18:46:07] [PASSED] fair_contexts_1vf
[18:46:07] [PASSED] fair_doorbells_1vf
[18:46:07] [PASSED] fair_ggtt_1vf
[18:46:07] ====================== fair_vram_1vf  ======================
[18:46:07] [PASSED] 3.50 GiB
[18:46:07] [PASSED] 11.5 GiB
[18:46:07] [PASSED] 15.5 GiB
[18:46:07] [PASSED] 31.5 GiB
[18:46:07] [PASSED] 63.5 GiB
[18:46:07] [PASSED] 1.91 GiB
[18:46:07] ================== [PASSED] fair_vram_1vf ==================
[18:46:07] ================ fair_vram_1vf_admin_only  =================
[18:46:07] [PASSED] 3.50 GiB
[18:46:07] [PASSED] 11.5 GiB
[18:46:07] [PASSED] 15.5 GiB
[18:46:07] [PASSED] 31.5 GiB
[18:46:07] [PASSED] 63.5 GiB
[18:46:07] [PASSED] 1.91 GiB
[18:46:07] ============ [PASSED] fair_vram_1vf_admin_only =============
[18:46:07] ====================== fair_contexts  ======================
[18:46:07] [PASSED] 1 VF
[18:46:07] [PASSED] 2 VFs
[18:46:07] [PASSED] 3 VFs
[18:46:07] [PASSED] 4 VFs
[18:46:07] [PASSED] 5 VFs
[18:46:07] [PASSED] 6 VFs
[18:46:07] [PASSED] 7 VFs
[18:46:07] [PASSED] 8 VFs
[18:46:07] [PASSED] 9 VFs
[18:46:07] [PASSED] 10 VFs
[18:46:07] [PASSED] 11 VFs
[18:46:07] [PASSED] 12 VFs
[18:46:07] [PASSED] 13 VFs
[18:46:07] [PASSED] 14 VFs
[18:46:07] [PASSED] 15 VFs
[18:46:07] [PASSED] 16 VFs
[18:46:07] [PASSED] 17 VFs
[18:46:07] [PASSED] 18 VFs
[18:46:07] [PASSED] 19 VFs
[18:46:07] [PASSED] 20 VFs
[18:46:07] [PASSED] 21 VFs
[18:46:07] [PASSED] 22 VFs
[18:46:07] [PASSED] 23 VFs
[18:46:07] [PASSED] 24 VFs
[18:46:07] [PASSED] 25 VFs
[18:46:07] [PASSED] 26 VFs
[18:46:07] [PASSED] 27 VFs
[18:46:07] [PASSED] 28 VFs
[18:46:07] [PASSED] 29 VFs
[18:46:07] [PASSED] 30 VFs
[18:46:07] [PASSED] 31 VFs
[18:46:07] [PASSED] 32 VFs
[18:46:07] [PASSED] 33 VFs
[18:46:07] [PASSED] 34 VFs
[18:46:07] [PASSED] 35 VFs
[18:46:07] [PASSED] 36 VFs
[18:46:07] [PASSED] 37 VFs
[18:46:07] [PASSED] 38 VFs
[18:46:07] [PASSED] 39 VFs
[18:46:07] [PASSED] 40 VFs
[18:46:07] [PASSED] 41 VFs
[18:46:07] [PASSED] 42 VFs
[18:46:07] [PASSED] 43 VFs
[18:46:07] [PASSED] 44 VFs
[18:46:07] [PASSED] 45 VFs
[18:46:07] [PASSED] 46 VFs
[18:46:07] [PASSED] 47 VFs
[18:46:07] [PASSED] 48 VFs
[18:46:07] [PASSED] 49 VFs
[18:46:07] [PASSED] 50 VFs
[18:46:07] [PASSED] 51 VFs
[18:46:07] [PASSED] 52 VFs
[18:46:07] [PASSED] 53 VFs
[18:46:07] [PASSED] 54 VFs
[18:46:07] [PASSED] 55 VFs
[18:46:07] [PASSED] 56 VFs
[18:46:07] [PASSED] 57 VFs
[18:46:07] [PASSED] 58 VFs
[18:46:07] [PASSED] 59 VFs
[18:46:07] [PASSED] 60 VFs
[18:46:07] [PASSED] 61 VFs
[18:46:07] [PASSED] 62 VFs
[18:46:07] [PASSED] 63 VFs
[18:46:07] ================== [PASSED] fair_contexts ==================
[18:46:07] ===================== fair_doorbells  ======================
[18:46:07] [PASSED] 1 VF
[18:46:07] [PASSED] 2 VFs
[18:46:07] [PASSED] 3 VFs
[18:46:07] [PASSED] 4 VFs
[18:46:07] [PASSED] 5 VFs
[18:46:07] [PASSED] 6 VFs
[18:46:07] [PASSED] 7 VFs
[18:46:07] [PASSED] 8 VFs
[18:46:07] [PASSED] 9 VFs
[18:46:07] [PASSED] 10 VFs
[18:46:07] [PASSED] 11 VFs
[18:46:07] [PASSED] 12 VFs
[18:46:07] [PASSED] 13 VFs
[18:46:07] [PASSED] 14 VFs
[18:46:07] [PASSED] 15 VFs
[18:46:07] [PASSED] 16 VFs
[18:46:07] [PASSED] 17 VFs
[18:46:07] [PASSED] 18 VFs
[18:46:07] [PASSED] 19 VFs
[18:46:07] [PASSED] 20 VFs
[18:46:07] [PASSED] 21 VFs
[18:46:07] [PASSED] 22 VFs
[18:46:07] [PASSED] 23 VFs
[18:46:07] [PASSED] 24 VFs
[18:46:07] [PASSED] 25 VFs
[18:46:07] [PASSED] 26 VFs
[18:46:07] [PASSED] 27 VFs
[18:46:07] [PASSED] 28 VFs
[18:46:07] [PASSED] 29 VFs
[18:46:07] [PASSED] 30 VFs
[18:46:07] [PASSED] 31 VFs
[18:46:07] [PASSED] 32 VFs
[18:46:07] [PASSED] 33 VFs
[18:46:07] [PASSED] 34 VFs
[18:46:07] [PASSED] 35 VFs
[18:46:07] [PASSED] 36 VFs
[18:46:07] [PASSED] 37 VFs
[18:46:07] [PASSED] 38 VFs
[18:46:07] [PASSED] 39 VFs
[18:46:07] [PASSED] 40 VFs
[18:46:07] [PASSED] 41 VFs
[18:46:07] [PASSED] 42 VFs
[18:46:07] [PASSED] 43 VFs
[18:46:07] [PASSED] 44 VFs
[18:46:07] [PASSED] 45 VFs
[18:46:07] [PASSED] 46 VFs
[18:46:07] [PASSED] 47 VFs
[18:46:07] [PASSED] 48 VFs
[18:46:07] [PASSED] 49 VFs
[18:46:07] [PASSED] 50 VFs
[18:46:07] [PASSED] 51 VFs
[18:46:07] [PASSED] 52 VFs
[18:46:07] [PASSED] 53 VFs
[18:46:07] [PASSED] 54 VFs
[18:46:07] [PASSED] 55 VFs
[18:46:07] [PASSED] 56 VFs
[18:46:07] [PASSED] 57 VFs
[18:46:07] [PASSED] 58 VFs
[18:46:07] [PASSED] 59 VFs
[18:46:07] [PASSED] 60 VFs
[18:46:07] [PASSED] 61 VFs
[18:46:07] [PASSED] 62 VFs
[18:46:07] [PASSED] 63 VFs
[18:46:07] ================= [PASSED] fair_doorbells ==================
[18:46:07] ======================== fair_ggtt  ========================
[18:46:07] [PASSED] 1 VF
[18:46:07] [PASSED] 2 VFs
[18:46:07] [PASSED] 3 VFs
[18:46:07] [PASSED] 4 VFs
[18:46:07] [PASSED] 5 VFs
[18:46:07] [PASSED] 6 VFs
[18:46:07] [PASSED] 7 VFs
[18:46:07] [PASSED] 8 VFs
[18:46:07] [PASSED] 9 VFs
[18:46:07] [PASSED] 10 VFs
[18:46:07] [PASSED] 11 VFs
[18:46:07] [PASSED] 12 VFs
[18:46:07] [PASSED] 13 VFs
[18:46:07] [PASSED] 14 VFs
[18:46:07] [PASSED] 15 VFs
[18:46:07] [PASSED] 16 VFs
[18:46:07] [PASSED] 17 VFs
[18:46:07] [PASSED] 18 VFs
[18:46:07] [PASSED] 19 VFs
[18:46:07] [PASSED] 20 VFs
[18:46:07] [PASSED] 21 VFs
[18:46:07] [PASSED] 22 VFs
[18:46:07] [PASSED] 23 VFs
[18:46:07] [PASSED] 24 VFs
[18:46:07] [PASSED] 25 VFs
[18:46:07] [PASSED] 26 VFs
[18:46:07] [PASSED] 27 VFs
[18:46:07] [PASSED] 28 VFs
[18:46:07] [PASSED] 29 VFs
[18:46:07] [PASSED] 30 VFs
[18:46:07] [PASSED] 31 VFs
[18:46:07] [PASSED] 32 VFs
[18:46:07] [PASSED] 33 VFs
[18:46:07] [PASSED] 34 VFs
[18:46:07] [PASSED] 35 VFs
[18:46:07] [PASSED] 36 VFs
[18:46:07] [PASSED] 37 VFs
[18:46:07] [PASSED] 38 VFs
[18:46:07] [PASSED] 39 VFs
[18:46:07] [PASSED] 40 VFs
[18:46:07] [PASSED] 41 VFs
[18:46:07] [PASSED] 42 VFs
[18:46:07] [PASSED] 43 VFs
[18:46:07] [PASSED] 44 VFs
[18:46:07] [PASSED] 45 VFs
[18:46:07] [PASSED] 46 VFs
[18:46:07] [PASSED] 47 VFs
[18:46:07] [PASSED] 48 VFs
[18:46:07] [PASSED] 49 VFs
[18:46:07] [PASSED] 50 VFs
[18:46:07] [PASSED] 51 VFs
[18:46:07] [PASSED] 52 VFs
[18:46:07] [PASSED] 53 VFs
[18:46:07] [PASSED] 54 VFs
[18:46:07] [PASSED] 55 VFs
[18:46:07] [PASSED] 56 VFs
[18:46:07] [PASSED] 57 VFs
[18:46:07] [PASSED] 58 VFs
[18:46:07] [PASSED] 59 VFs
[18:46:07] [PASSED] 60 VFs
[18:46:07] [PASSED] 61 VFs
[18:46:07] [PASSED] 62 VFs
[18:46:07] [PASSED] 63 VFs
[18:46:07] ==================== [PASSED] fair_ggtt ====================
[18:46:07] ======================== fair_vram  ========================
[18:46:07] [PASSED] 1 VF
[18:46:07] [PASSED] 2 VFs
[18:46:07] [PASSED] 3 VFs
[18:46:07] [PASSED] 4 VFs
[18:46:07] [PASSED] 5 VFs
[18:46:07] [PASSED] 6 VFs
[18:46:07] [PASSED] 7 VFs
[18:46:07] [PASSED] 8 VFs
[18:46:07] [PASSED] 9 VFs
[18:46:07] [PASSED] 10 VFs
[18:46:07] [PASSED] 11 VFs
[18:46:07] [PASSED] 12 VFs
[18:46:07] [PASSED] 13 VFs
[18:46:08] [PASSED] 14 VFs
[18:46:08] [PASSED] 15 VFs
[18:46:08] [PASSED] 16 VFs
[18:46:08] [PASSED] 17 VFs
[18:46:08] [PASSED] 18 VFs
[18:46:08] [PASSED] 19 VFs
[18:46:08] [PASSED] 20 VFs
[18:46:08] [PASSED] 21 VFs
[18:46:08] [PASSED] 22 VFs
[18:46:08] [PASSED] 23 VFs
[18:46:08] [PASSED] 24 VFs
[18:46:08] [PASSED] 25 VFs
[18:46:08] [PASSED] 26 VFs
[18:46:08] [PASSED] 27 VFs
[18:46:08] [PASSED] 28 VFs
[18:46:08] [PASSED] 29 VFs
[18:46:08] [PASSED] 30 VFs
[18:46:08] [PASSED] 31 VFs
[18:46:08] [PASSED] 32 VFs
[18:46:08] [PASSED] 33 VFs
[18:46:08] [PASSED] 34 VFs
[18:46:08] [PASSED] 35 VFs
[18:46:08] [PASSED] 36 VFs
[18:46:08] [PASSED] 37 VFs
[18:46:08] [PASSED] 38 VFs
[18:46:08] [PASSED] 39 VFs
[18:46:08] [PASSED] 40 VFs
[18:46:08] [PASSED] 41 VFs
[18:46:08] [PASSED] 42 VFs
[18:46:08] [PASSED] 43 VFs
[18:46:08] [PASSED] 44 VFs
[18:46:08] [PASSED] 45 VFs
[18:46:08] [PASSED] 46 VFs
[18:46:08] [PASSED] 47 VFs
[18:46:08] [PASSED] 48 VFs
[18:46:08] [PASSED] 49 VFs
[18:46:08] [PASSED] 50 VFs
[18:46:08] [PASSED] 51 VFs
[18:46:08] [PASSED] 52 VFs
[18:46:08] [PASSED] 53 VFs
[18:46:08] [PASSED] 54 VFs
[18:46:08] [PASSED] 55 VFs
[18:46:08] [PASSED] 56 VFs
[18:46:08] [PASSED] 57 VFs
[18:46:08] [PASSED] 58 VFs
[18:46:08] [PASSED] 59 VFs
[18:46:08] [PASSED] 60 VFs
[18:46:08] [PASSED] 61 VFs
[18:46:08] [PASSED] 62 VFs
[18:46:08] [PASSED] 63 VFs
[18:46:08] ==================== [PASSED] fair_vram ====================
[18:46:08] ================== [PASSED] pf_gt_config ===================
[18:46:08] ===================== lmtt (1 subtest) =====================
[18:46:08] ======================== test_ops  =========================
[18:46:08] [PASSED] 2-level
[18:46:08] [PASSED] multi-level
[18:46:08] ==================== [PASSED] test_ops =====================
[18:46:08] ====================== [PASSED] lmtt =======================
[18:46:08] ================= sriov_packet (1 subtest) =================
[18:46:08] [PASSED] test_descriptor_init
[18:46:08] ================== [PASSED] sriov_packet ===================
[18:46:08] ================= pf_service (11 subtests) =================
[18:46:08] [PASSED] pf_negotiate_any
[18:46:08] [PASSED] pf_negotiate_base_match
[18:46:08] [PASSED] pf_negotiate_base_newer
[18:46:08] [PASSED] pf_negotiate_base_next
[18:46:08] [SKIPPED] pf_negotiate_base_older (no older minor)
[18:46:08] [PASSED] pf_negotiate_base_prev
[18:46:08] [PASSED] pf_negotiate_latest_match
[18:46:08] [PASSED] pf_negotiate_latest_newer
[18:46:08] [PASSED] pf_negotiate_latest_next
[18:46:08] [SKIPPED] pf_negotiate_latest_older (no older minor)
[18:46:08] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[18:46:08] =================== [PASSED] pf_service ====================
[18:46:08] ================= xe_guc_g2g (2 subtests) ==================
[18:46:08] ============== xe_live_guc_g2g_kunit_default  ==============
[18:46:08] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[18:46:08] ============== xe_live_guc_g2g_kunit_allmem  ===============
[18:46:08] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[18:46:08] =================== [SKIPPED] xe_guc_g2g ===================
[18:46:08] =================== xe_mocs (2 subtests) ===================
[18:46:08] ================ xe_live_mocs_kernel_kunit  ================
[18:46:08] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[18:46:08] ================ xe_live_mocs_reset_kunit  =================
[18:46:08] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[18:46:08] ==================== [SKIPPED] xe_mocs =====================
[18:46:08] ================= xe_migrate (2 subtests) ==================
[18:46:08] ================= xe_migrate_sanity_kunit  =================
[18:46:08] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[18:46:08] ================== xe_validate_ccs_kunit  ==================
[18:46:08] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[18:46:08] =================== [SKIPPED] xe_migrate ===================
[18:46:08] ================== xe_dma_buf (1 subtest) ==================
[18:46:08] ==================== xe_dma_buf_kunit  =====================
[18:46:08] ================ [SKIPPED] xe_dma_buf_kunit ================
[18:46:08] =================== [SKIPPED] xe_dma_buf ===================
[18:46:08] ================= xe_bo_shrink (1 subtest) =================
[18:46:08] =================== xe_bo_shrink_kunit  ====================
[18:46:08] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[18:46:08] ================== [SKIPPED] xe_bo_shrink ==================
[18:46:08] ==================== xe_bo (2 subtests) ====================
[18:46:08] ================== xe_ccs_migrate_kunit  ===================
[18:46:08] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[18:46:08] ==================== xe_bo_evict_kunit  ====================
[18:46:08] =============== [SKIPPED] xe_bo_evict_kunit ================
[18:46:08] ===================== [SKIPPED] xe_bo ======================
[18:46:08] =================== xe_any (9 subtests) ====================
[18:46:08] [PASSED] test_to_xe
[18:46:08] [PASSED] test_to_dev
[18:46:08] [PASSED] test_to_pdev
[18:46:08] [PASSED] test_to_drm
[18:46:08] [PASSED] test_if_pdev
[18:46:08] [PASSED] test_if_xe
[18:46:08] [PASSED] test_if_tile
[18:46:08] [PASSED] test_if_gt
[18:46:08] [PASSED] test_to_id
[18:46:08] ===================== [PASSED] xe_any ======================
[18:46:08] ==================== args (13 subtests) ====================
[18:46:08] [PASSED] count_args_test
[18:46:08] [PASSED] call_args_example
[18:46:08] [PASSED] call_args_test
[18:46:08] [PASSED] drop_first_arg_example
[18:46:08] [PASSED] drop_first_arg_test
[18:46:08] [PASSED] first_arg_example
[18:46:08] [PASSED] first_arg_test
[18:46:08] [PASSED] last_arg_example
[18:46:08] [PASSED] last_arg_test
[18:46:08] [PASSED] pick_arg_example
[18:46:08] [PASSED] if_args_example
[18:46:08] [PASSED] if_args_test
[18:46:08] [PASSED] sep_comma_example
[18:46:08] ====================== [PASSED] args =======================
[18:46:08] =================== xe_pci (3 subtests) ====================
[18:46:08] ==================== check_graphics_ip  ====================
[18:46:08] [PASSED] 12.00 Xe_LP
[18:46:08] [PASSED] 12.10 Xe_LP+
[18:46:08] [PASSED] 12.55 Xe_HPG
[18:46:08] [PASSED] 12.60 Xe_HPC
[18:46:08] [PASSED] 12.70 Xe_LPG
[18:46:08] [PASSED] 12.71 Xe_LPG
[18:46:08] [PASSED] 12.74 Xe_LPG+
[18:46:08] [PASSED] 20.01 Xe2_HPG
[18:46:08] [PASSED] 20.02 Xe2_HPG
[18:46:08] [PASSED] 20.04 Xe2_LPG
[18:46:08] [PASSED] 30.00 Xe3_LPG
[18:46:08] [PASSED] 30.01 Xe3_LPG
[18:46:08] [PASSED] 30.03 Xe3_LPG
[18:46:08] [PASSED] 30.04 Xe3_LPG
[18:46:08] [PASSED] 30.05 Xe3_LPG
[18:46:08] [PASSED] 35.10 Xe3p_LPG
[18:46:08] [PASSED] 35.11 Xe3p_XPC
[18:46:08] ================ [PASSED] check_graphics_ip ================
[18:46:08] ===================== check_media_ip  ======================
[18:46:08] [PASSED] 12.00 Xe_M
[18:46:08] [PASSED] 12.55 Xe_HPM
[18:46:08] [PASSED] 13.00 Xe_LPM+
[18:46:08] [PASSED] 13.01 Xe2_HPM
[18:46:08] [PASSED] 20.00 Xe2_LPM
[18:46:08] [PASSED] 30.00 Xe3_LPM
[18:46:08] [PASSED] 30.02 Xe3_LPM
[18:46:08] [PASSED] 35.00 Xe3p_LPM
[18:46:08] [PASSED] 35.03 Xe3p_HPM
[18:46:08] ================= [PASSED] check_media_ip ==================
[18:46:08] =================== check_platform_desc  ===================
[18:46:08] [PASSED] 0x9A60 (TIGERLAKE)
[18:46:08] [PASSED] 0x9A68 (TIGERLAKE)
[18:46:08] [PASSED] 0x9A70 (TIGERLAKE)
[18:46:08] [PASSED] 0x9A40 (TIGERLAKE)
[18:46:08] [PASSED] 0x9A49 (TIGERLAKE)
[18:46:08] [PASSED] 0x9A59 (TIGERLAKE)
[18:46:08] [PASSED] 0x9A78 (TIGERLAKE)
[18:46:08] [PASSED] 0x9AC0 (TIGERLAKE)
[18:46:08] [PASSED] 0x9AC9 (TIGERLAKE)
[18:46:08] [PASSED] 0x9AD9 (TIGERLAKE)
[18:46:08] [PASSED] 0x9AF8 (TIGERLAKE)
[18:46:08] [PASSED] 0x4C80 (ROCKETLAKE)
[18:46:08] [PASSED] 0x4C8A (ROCKETLAKE)
[18:46:08] [PASSED] 0x4C8B (ROCKETLAKE)
[18:46:08] [PASSED] 0x4C8C (ROCKETLAKE)
[18:46:08] [PASSED] 0x4C90 (ROCKETLAKE)
[18:46:08] [PASSED] 0x4C9A (ROCKETLAKE)
[18:46:08] [PASSED] 0x4680 (ALDERLAKE_S)
[18:46:08] [PASSED] 0x4682 (ALDERLAKE_S)
[18:46:08] [PASSED] 0x4688 (ALDERLAKE_S)
[18:46:08] [PASSED] 0x468A (ALDERLAKE_S)
[18:46:08] [PASSED] 0x468B (ALDERLAKE_S)
[18:46:08] [PASSED] 0x4690 (ALDERLAKE_S)
[18:46:08] [PASSED] 0x4692 (ALDERLAKE_S)
[18:46:08] [PASSED] 0x4693 (ALDERLAKE_S)
[18:46:08] [PASSED] 0x46A0 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x46A1 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x46A2 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x46A3 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x46A6 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x46A8 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x46AA (ALDERLAKE_P)
[18:46:08] [PASSED] 0x462A (ALDERLAKE_P)
[18:46:08] [PASSED] 0x4626 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x4628 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x46B0 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x46B1 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x46B2 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x46B3 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x46C0 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x46C1 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x46C2 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x46C3 (ALDERLAKE_P)
[18:46:08] [PASSED] 0x46D0 (ALDERLAKE_N)
[18:46:08] [PASSED] 0x46D1 (ALDERLAKE_N)
[18:46:08] [PASSED] 0x46D2 (ALDERLAKE_N)
[18:46:08] [PASSED] 0x46D3 (ALDERLAKE_N)
[18:46:08] [PASSED] 0x46D4 (ALDERLAKE_N)
[18:46:08] [PASSED] 0xA721 (ALDERLAKE_P)
[18:46:08] [PASSED] 0xA7A1 (ALDERLAKE_P)
[18:46:08] [PASSED] 0xA7A9 (ALDERLAKE_P)
[18:46:08] [PASSED] 0xA7AC (ALDERLAKE_P)
[18:46:08] [PASSED] 0xA7AD (ALDERLAKE_P)
[18:46:08] [PASSED] 0xA720 (ALDERLAKE_P)
[18:46:08] [PASSED] 0xA7A0 (ALDERLAKE_P)
[18:46:08] [PASSED] 0xA7A8 (ALDERLAKE_P)
[18:46:08] [PASSED] 0xA7AA (ALDERLAKE_P)
[18:46:08] [PASSED] 0xA7AB (ALDERLAKE_P)
[18:46:08] [PASSED] 0xA780 (ALDERLAKE_S)
[18:46:08] [PASSED] 0xA781 (ALDERLAKE_S)
[18:46:08] [PASSED] 0xA782 (ALDERLAKE_S)
[18:46:08] [PASSED] 0xA783 (ALDERLAKE_S)
[18:46:08] [PASSED] 0xA788 (ALDERLAKE_S)
[18:46:08] [PASSED] 0xA789 (ALDERLAKE_S)
[18:46:08] [PASSED] 0xA78A (ALDERLAKE_S)
[18:46:08] [PASSED] 0xA78B (ALDERLAKE_S)
[18:46:08] [PASSED] 0x4905 (DG1)
[18:46:08] [PASSED] 0x4906 (DG1)
[18:46:08] [PASSED] 0x4907 (DG1)
[18:46:08] [PASSED] 0x4908 (DG1)
[18:46:08] [PASSED] 0x4909 (DG1)
[18:46:08] [PASSED] 0x56C0 (DG2)
[18:46:08] [PASSED] 0x56C2 (DG2)
[18:46:08] [PASSED] 0x56C1 (DG2)
[18:46:08] [PASSED] 0x7D51 (METEORLAKE)
[18:46:08] [PASSED] 0x7DD1 (METEORLAKE)
[18:46:08] [PASSED] 0x7D41 (METEORLAKE)
[18:46:08] [PASSED] 0x7D67 (METEORLAKE)
[18:46:08] [PASSED] 0xB640 (METEORLAKE)
[18:46:08] [PASSED] 0x56A0 (DG2)
[18:46:08] [PASSED] 0x56A1 (DG2)
[18:46:08] [PASSED] 0x56A2 (DG2)
[18:46:08] [PASSED] 0x56BE (DG2)
[18:46:08] [PASSED] 0x56BF (DG2)
[18:46:08] [PASSED] 0x5690 (DG2)
[18:46:08] [PASSED] 0x5691 (DG2)
[18:46:08] [PASSED] 0x5692 (DG2)
[18:46:08] [PASSED] 0x56A5 (DG2)
[18:46:08] [PASSED] 0x56A6 (DG2)
[18:46:08] [PASSED] 0x56B0 (DG2)
[18:46:08] [PASSED] 0x56B1 (DG2)
[18:46:08] [PASSED] 0x56BA (DG2)
[18:46:08] [PASSED] 0x56BB (DG2)
[18:46:08] [PASSED] 0x56BC (DG2)
[18:46:08] [PASSED] 0x56BD (DG2)
[18:46:08] [PASSED] 0x5693 (DG2)
[18:46:08] [PASSED] 0x5694 (DG2)
[18:46:08] [PASSED] 0x5695 (DG2)
[18:46:08] [PASSED] 0x56A3 (DG2)
[18:46:08] [PASSED] 0x56A4 (DG2)
[18:46:08] [PASSED] 0x56B2 (DG2)
[18:46:08] [PASSED] 0x56B3 (DG2)
[18:46:08] [PASSED] 0x5696 (DG2)
[18:46:08] [PASSED] 0x5697 (DG2)
[18:46:08] [PASSED] 0xB69 (PVC)
[18:46:08] [PASSED] 0xB6E (PVC)
[18:46:08] [PASSED] 0xBD4 (PVC)
[18:46:08] [PASSED] 0xBD5 (PVC)
[18:46:08] [PASSED] 0xBD6 (PVC)
[18:46:08] [PASSED] 0xBD7 (PVC)
[18:46:08] [PASSED] 0xBD8 (PVC)
[18:46:08] [PASSED] 0xBD9 (PVC)
[18:46:08] [PASSED] 0xBDA (PVC)
[18:46:08] [PASSED] 0xBDB (PVC)
[18:46:08] [PASSED] 0xBE0 (PVC)
[18:46:08] [PASSED] 0xBE1 (PVC)
[18:46:08] [PASSED] 0xBE5 (PVC)
[18:46:08] [PASSED] 0x7D40 (METEORLAKE)
[18:46:08] [PASSED] 0x7D45 (METEORLAKE)
[18:46:08] [PASSED] 0x7D55 (METEORLAKE)
[18:46:08] [PASSED] 0x7D60 (METEORLAKE)
[18:46:08] [PASSED] 0x7DD5 (METEORLAKE)
[18:46:08] [PASSED] 0x6420 (LUNARLAKE)
[18:46:08] [PASSED] 0x64A0 (LUNARLAKE)
[18:46:08] [PASSED] 0x64B0 (LUNARLAKE)
[18:46:08] [PASSED] 0xE202 (BATTLEMAGE)
[18:46:08] [PASSED] 0xE209 (BATTLEMAGE)
[18:46:08] [PASSED] 0xE20B (BATTLEMAGE)
[18:46:08] [PASSED] 0xE20C (BATTLEMAGE)
[18:46:08] [PASSED] 0xE20D (BATTLEMAGE)
[18:46:08] [PASSED] 0xE210 (BATTLEMAGE)
[18:46:08] [PASSED] 0xE211 (BATTLEMAGE)
[18:46:08] [PASSED] 0xE212 (BATTLEMAGE)
[18:46:08] [PASSED] 0xE216 (BATTLEMAGE)
[18:46:08] [PASSED] 0xE220 (BATTLEMAGE)
[18:46:08] [PASSED] 0xE221 (BATTLEMAGE)
[18:46:08] [PASSED] 0xE222 (BATTLEMAGE)
[18:46:08] [PASSED] 0xE223 (BATTLEMAGE)
[18:46:08] [PASSED] 0xB080 (PANTHERLAKE)
[18:46:08] [PASSED] 0xB081 (PANTHERLAKE)
[18:46:08] [PASSED] 0xB082 (PANTHERLAKE)
[18:46:08] [PASSED] 0xB083 (PANTHERLAKE)
[18:46:08] [PASSED] 0xB084 (PANTHERLAKE)
[18:46:08] [PASSED] 0xB085 (PANTHERLAKE)
[18:46:08] [PASSED] 0xB086 (PANTHERLAKE)
[18:46:08] [PASSED] 0xB087 (PANTHERLAKE)
[18:46:08] [PASSED] 0xB08F (PANTHERLAKE)
[18:46:08] [PASSED] 0xB090 (PANTHERLAKE)
[18:46:08] [PASSED] 0xB0A0 (PANTHERLAKE)
[18:46:08] [PASSED] 0xB0B0 (PANTHERLAKE)
[18:46:08] [PASSED] 0xFD80 (PANTHERLAKE)
[18:46:08] [PASSED] 0xFD81 (PANTHERLAKE)
[18:46:08] [PASSED] 0xD740 (NOVALAKE_S)
[18:46:08] [PASSED] 0xD741 (NOVALAKE_S)
[18:46:08] [PASSED] 0xD742 (NOVALAKE_S)
[18:46:08] [PASSED] 0xD743 (NOVALAKE_S)
[18:46:08] [PASSED] 0xD745 (NOVALAKE_S)
[18:46:08] [PASSED] 0xD74A (NOVALAKE_S)
[18:46:08] [PASSED] 0xD74B (NOVALAKE_S)
[18:46:08] [PASSED] 0x674C (CRESCENTISLAND)
[18:46:08] [PASSED] 0x674D (CRESCENTISLAND)
[18:46:08] [PASSED] 0x674E (CRESCENTISLAND)
[18:46:08] [PASSED] 0x674F (CRESCENTISLAND)
[18:46:08] [PASSED] 0x6750 (CRESCENTISLAND)
[18:46:08] [PASSED] 0xD750 (NOVALAKE_P)
[18:46:08] [PASSED] 0xD751 (NOVALAKE_P)
[18:46:08] [PASSED] 0xD752 (NOVALAKE_P)
[18:46:08] [PASSED] 0xD753 (NOVALAKE_P)
[18:46:08] [PASSED] 0xD754 (NOVALAKE_P)
[18:46:08] [PASSED] 0xD755 (NOVALAKE_P)
[18:46:08] [PASSED] 0xD756 (NOVALAKE_P)
[18:46:08] [PASSED] 0xD757 (NOVALAKE_P)
[18:46:08] [PASSED] 0xD75F (NOVALAKE_P)
[18:46:08] =============== [PASSED] check_platform_desc ===============
[18:46:08] ===================== [PASSED] xe_pci ======================
[18:46:08] ============= xe_rtp_tables_test (5 subtests) ==============
[18:46:08] ================== xe_rtp_table_gt_test  ===================
[18:46:08] [PASSED] gt_was/14011060649
[18:46:08] [PASSED] gt_was/14011059788
[18:46:08] [PASSED] gt_was/14015795083
[18:46:08] [PASSED] gt_was/16021867713
[18:46:08] [PASSED] gt_was/14019449301
[18:46:08] [PASSED] gt_was/16028005424
[18:46:08] [PASSED] gt_was/14026578760
[18:46:08] [PASSED] gt_was/1409420604
[18:46:08] [PASSED] gt_was/1408615072
[18:46:08] [PASSED] gt_was/22010523718
[18:46:08] [PASSED] gt_was/14011006942
[18:46:08] [PASSED] gt_was/14014830051
[18:46:08] [PASSED] gt_was/18018781329
[18:46:08] [PASSED] gt_was/1509235366
[18:46:08] [PASSED] gt_was/18018781329
[18:46:08] [PASSED] gt_was/16016694945
[18:46:08] [PASSED] gt_was/14018575942
[18:46:08] [PASSED] gt_was/22016670082
[18:46:08] [PASSED] gt_was/22016670082
[18:46:08] [PASSED] gt_was/14017421178
[18:46:08] [PASSED] gt_was/16025250150
[18:46:08] [PASSED] gt_was/14021871409
[18:46:08] [PASSED] gt_was/16021865536
[18:46:08] [PASSED] gt_was/14021486841
[18:46:08] [PASSED] gt_was/14025160223
[18:46:08] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[18:46:08] [PASSED] gt_was/14025635424
[18:46:08] [PASSED] gt_was/16028005424
[18:46:08] ============== [PASSED] xe_rtp_table_gt_test ===============
[18:46:08] ================== xe_rtp_table_gt_test  ===================
[18:46:08] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[18:46:08] [PASSED] gt_tunings/Tuning: 32B Access Enable
[18:46:08] [PASSED] gt_tunings/Tuning: L3 cache
[18:46:08] [PASSED] gt_tunings/Tuning: L3 cache - media
[18:46:08] [PASSED] gt_tunings/Tuning: Compression Overfetch
[18:46:08] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[18:46:08] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[18:46:08] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[18:46:08] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[18:46:08] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[18:46:08] [PASSED] gt_tunings/Tuning: Stateless compression control
[18:46:08] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[18:46:08] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[18:46:08] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[18:46:08] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[18:46:08] ============== [PASSED] xe_rtp_table_gt_test ===============
[18:46:08] ================== xe_rtp_table_oob_test  ==================
[18:46:08] [PASSED] oob_was/1607983814
[18:46:08] [PASSED] oob_was/16010904313
[18:46:08] [PASSED] oob_was/18022495364
[18:46:08] [PASSED] oob_was/22012773006
[18:46:08] [PASSED] oob_was/14014475959
[18:46:08] [PASSED] oob_was/22011391025
[18:46:08] [PASSED] oob_was/22012727170
[18:46:08] [PASSED] oob_was/22012727685
[18:46:08] [PASSED] oob_was/22016596838
[18:46:08] [PASSED] oob_was/18020744125
[18:46:08] [PASSED] oob_was/1409600907
[18:46:08] [PASSED] oob_was/22014953428
[18:46:08] [PASSED] oob_was/16017236439
[18:46:08] [PASSED] oob_was/14019821291
[18:46:08] [PASSED] oob_was/14015076503
[18:46:08] [PASSED] oob_was/14018913170
[18:46:08] [PASSED] oob_was/14018094691
[18:46:08] [PASSED] oob_was/18024947630
[18:46:08] [PASSED] oob_was/16022287689
[18:46:08] [PASSED] oob_was/13011645652
[18:46:08] [PASSED] oob_was/14022293748
[18:46:08] [PASSED] oob_was/22019794406
[18:46:08] [PASSED] oob_was/22019338487
[18:46:08] [PASSED] oob_was/16023588340
[18:46:08] [PASSED] oob_was/14019789679
[18:46:08] [PASSED] oob_was/14022866841
[18:46:08] [PASSED] oob_was/16021333562
[18:46:08] [PASSED] oob_was/14016712196
[18:46:08] [PASSED] oob_was/14015568240
[18:46:08] [PASSED] oob_was/18013179988
[18:46:08] [PASSED] oob_was/1508761755
[18:46:08] [PASSED] oob_was/16023105232
[18:46:08] [PASSED] oob_was/16026508708
[18:46:08] [PASSED] oob_was/14020001231
[18:46:08] [PASSED] oob_was/16023683509
[18:46:08] [PASSED] oob_was/14025515070
[18:46:08] [PASSED] oob_was/15015404425_disable
[18:46:08] [PASSED] oob_was/16026007364
[18:46:08] [PASSED] oob_was/14020316580
[18:46:08] [PASSED] oob_was/14025883347
[18:46:08] [PASSED] oob_was/16029380221
[18:46:08] [PASSED] oob_was/22022079272
[18:46:08] [PASSED] oob_was/16029897822
[18:46:08] [PASSED] oob_was/14027054324
[18:46:08] ============== [PASSED] xe_rtp_table_oob_test ==============
[18:46:08] ================ xe_rtp_table_dev_oob_test  ================
[18:46:08] [PASSED] device_oob_was/22010954014
[18:46:08] [PASSED] device_oob_was/15015404425
[18:46:08] [PASSED] device_oob_was/22019338487_display
[18:46:08] [PASSED] device_oob_was/14022085890
[18:46:08] [PASSED] device_oob_was/14026539277
[18:46:08] [PASSED] device_oob_was/14026633728
[18:46:08] [PASSED] device_oob_was/14026746987
[18:46:08] [PASSED] device_oob_was/14026779378
[18:46:08] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[18:46:08] ========== xe_rtp_table_missing_upper_bound_test  ==========
[18:46:08] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[18:46:08] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[18:46:08] [PASSED] register_whitelist/1806527549
[18:46:08] [PASSED] register_whitelist/allow_read_ctx_timestamp
[18:46:08] [PASSED] register_whitelist/allow_read_queue_timestamp
[18:46:08] [PASSED] register_whitelist/16014440446
[18:46:08] [PASSED] register_whitelist/16017236439
[18:46:08] [PASSED] register_whitelist/16020183090
[18:46:08] [PASSED] register_whitelist/14024997852
[18:46:08] [PASSED] register_whitelist/14024997852
[18:46:08] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[18:46:08] =============== [PASSED] xe_rtp_tables_test ================
[18:46:08] =================== xe_rtp (3 subtests) ====================
[18:46:08] =================== xe_rtp_rules_tests  ====================
[18:46:08] [PASSED] no
[18:46:08] [PASSED] yes
[18:46:08] [PASSED] no-and-no
[18:46:08] [PASSED] no-and-yes
[18:46:08] [PASSED] yes-and-no
[18:46:08] [PASSED] yes-and-yes
[18:46:08] [PASSED] no-or-no
[18:46:08] [PASSED] no-or-yes
[18:46:08] [PASSED] yes-or-no
[18:46:08] [PASSED] yes-or-yes
[18:46:08] [PASSED] no-yes-or-yes-no
[18:46:08] [PASSED] no-yes-or-yes-yes
[18:46:08] [PASSED] yes-yes-or-no-yes
[18:46:08] [PASSED] yes-yes-or-yes-yes
[18:46:08] [PASSED] no-no-or-yes-or-no
[18:46:08] [PASSED] or
[18:46:08] [PASSED] or-yes
[18:46:08] [PASSED] or-no
[18:46:08] [PASSED] yes-or
[18:46:08] [PASSED] no-or
[18:46:08] [PASSED] no-or-or-yes
[18:46:08] [PASSED] yes-or-or-no
[18:46:08] [PASSED] no-or-or-no
[18:46:08] [PASSED] missing-context-engine-class
[18:46:08] [PASSED] missing-context-engine-class-or-yes
[18:46:08] [PASSED] missing-context-engine-class-or-or-yes
[18:46:08] =============== [PASSED] xe_rtp_rules_tests ================
[18:46:08] =============== xe_rtp_process_to_sr_tests  ================
[18:46:08] [PASSED] coalesce-same-reg
[18:46:08] [PASSED] coalesce-same-reg-literal-and-func
[18:46:08] [PASSED] no-match-no-add
[18:46:08] [PASSED] two-regs-two-entries
[18:46:08] [PASSED] clr-one-set-other
[18:46:08] [PASSED] set-field
[18:46:08] [PASSED] conflict-duplicate
[18:46:08] [PASSED] conflict-not-disjoint
[18:46:08] [PASSED] conflict-not-disjoint-literal-and-func
[18:46:08] [PASSED] conflict-reg-type
[18:46:08] [PASSED] bad-mcr-reg-forced-to-regular
[18:46:08] [PASSED] bad-regular-reg-forced-to-mcr
[18:46:08] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[18:46:08] ================== xe_rtp_process_tests  ===================
[18:46:08] [PASSED] active1
[18:46:08] [PASSED] active2
[18:46:08] [PASSED] active-inactive
[18:46:08] [PASSED] inactive-active
[18:46:08] [PASSED] inactive-active-inactive
[18:46:08] [PASSED] inactive-inactive-inactive
[18:46:08] ============== [PASSED] xe_rtp_process_tests ===============
[18:46:08] ===================== [PASSED] xe_rtp ======================
[18:46:08] ==================== xe_wa (1 subtest) =====================
[18:46:08] ======================== xe_wa_gt  =========================
[18:46:08] [PASSED] TIGERLAKE B0
[18:46:08] [PASSED] DG1 A0
[18:46:08] [PASSED] DG1 B0
[18:46:08] [PASSED] ALDERLAKE_S A0
[18:46:08] [PASSED] ALDERLAKE_S B0
[18:46:08] [PASSED] ALDERLAKE_S C0
[18:46:08] [PASSED] ALDERLAKE_S D0
[18:46:08] [PASSED] ALDERLAKE_P A0
[18:46:08] [PASSED] ALDERLAKE_P B0
[18:46:08] [PASSED] ALDERLAKE_P C0
[18:46:08] [PASSED] ALDERLAKE_S RPLS D0
[18:46:08] [PASSED] ALDERLAKE_P RPLU E0
[18:46:08] [PASSED] DG2 G10 C0
[18:46:08] [PASSED] DG2 G11 B1
[18:46:08] [PASSED] DG2 G12 A1
[18:46:08] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:46:08] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:46:08] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[18:46:08] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[18:46:08] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[18:46:08] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[18:46:08] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[18:46:08] ==================== [PASSED] xe_wa_gt =====================
[18:46:08] ====================== [PASSED] xe_wa ======================
[18:46:08] ============================================================
[18:46:08] Testing complete. Ran 793 tests: passed: 765, skipped: 28
[18:46:08] Elapsed time: 36.190s total, 1.804s configuring, 33.670s building, 0.703s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[18:46:08] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:46:10] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:46:34] Starting KUnit Kernel (1/1)...
[18:46:34] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:46:34] ============= refcount_interrupt (4 subtests) ==============
[18:46:34] [PASSED] test_single_irq_change
[18:46:34] [PASSED] test_nested_irq_change
[18:46:34] [PASSED] test_multiple_irq_change
[18:46:34] [PASSED] test_irq_save
[18:46:34] =============== [PASSED] refcount_interrupt ================
[18:46:34] ============ drm_test_pick_cmdline (2 subtests) ============
[18:46:34] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[18:46:34] =============== drm_test_pick_cmdline_named  ===============
[18:46:34] [PASSED] NTSC
[18:46:34] [PASSED] NTSC-J
[18:46:34] [PASSED] PAL
[18:46:34] [PASSED] PAL-M
[18:46:34] =========== [PASSED] drm_test_pick_cmdline_named ===========
[18:46:34] ============== [PASSED] drm_test_pick_cmdline ==============
[18:46:34] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[18:46:34] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[18:46:34] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[18:46:34] =========== drm_validate_clone_mode (2 subtests) ===========
[18:46:34] ============== drm_test_check_in_clone_mode  ===============
[18:46:34] [PASSED] in_clone_mode
[18:46:34] [PASSED] not_in_clone_mode
[18:46:34] ========== [PASSED] drm_test_check_in_clone_mode ===========
[18:46:34] =============== drm_test_check_valid_clones  ===============
[18:46:34] [PASSED] not_in_clone_mode
[18:46:34] [PASSED] valid_clone
[18:46:34] [PASSED] invalid_clone
[18:46:34] =========== [PASSED] drm_test_check_valid_clones ===========
[18:46:34] ============= [PASSED] drm_validate_clone_mode =============
[18:46:34] ============= drm_validate_modeset (1 subtest) =============
[18:46:34] [PASSED] drm_test_check_connector_changed_modeset
[18:46:34] ============== [PASSED] drm_validate_modeset ===============
[18:46:34] ====== drm_test_bridge_get_current_state (1 subtest) =======
[18:46:34] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[18:46:34] ======== [PASSED] drm_test_bridge_get_current_state ========
[18:46:34] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[18:46:34] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[18:46:34] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[18:46:34] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[18:46:34] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[18:46:34] ============== drm_bridge_alloc (2 subtests) ===============
[18:46:34] [PASSED] drm_test_drm_bridge_alloc_basic
[18:46:34] [PASSED] drm_test_drm_bridge_alloc_get_put
[18:46:34] ================ [PASSED] drm_bridge_alloc =================
[18:46:34] ============= drm_bridge_bus_fmt (5 subtests) ==============
[18:46:34] [PASSED] drm_test_bridge_rgb_yuv_rgb
[18:46:34] [PASSED] drm_test_bridge_must_convert_to_yuv444
[18:46:34] [PASSED] drm_test_bridge_hdmi_auto_rgb
[18:46:34] [PASSED] drm_test_bridge_auto_first
[18:46:34] [PASSED] drm_test_bridge_rgb_yuv_no_path
[18:46:34] =============== [PASSED] drm_bridge_bus_fmt ================
[18:46:34] ============= drm_cmdline_parser (40 subtests) =============
[18:46:34] [PASSED] drm_test_cmdline_force_d_only
[18:46:34] [PASSED] drm_test_cmdline_force_D_only_dvi
[18:46:34] [PASSED] drm_test_cmdline_force_D_only_hdmi
[18:46:34] [PASSED] drm_test_cmdline_force_D_only_not_digital
[18:46:34] [PASSED] drm_test_cmdline_force_e_only
[18:46:34] [PASSED] drm_test_cmdline_res
[18:46:34] [PASSED] drm_test_cmdline_res_vesa
[18:46:34] [PASSED] drm_test_cmdline_res_vesa_rblank
[18:46:34] [PASSED] drm_test_cmdline_res_rblank
[18:46:34] [PASSED] drm_test_cmdline_res_bpp
[18:46:34] [PASSED] drm_test_cmdline_res_refresh
[18:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh
[18:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[18:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[18:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[18:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[18:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[18:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[18:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[18:46:34] [PASSED] drm_test_cmdline_res_margins_force_on
[18:46:34] [PASSED] drm_test_cmdline_res_vesa_margins
[18:46:34] [PASSED] drm_test_cmdline_name
[18:46:34] [PASSED] drm_test_cmdline_name_bpp
[18:46:34] [PASSED] drm_test_cmdline_name_option
[18:46:34] [PASSED] drm_test_cmdline_name_bpp_option
[18:46:34] [PASSED] drm_test_cmdline_rotate_0
[18:46:34] [PASSED] drm_test_cmdline_rotate_90
[18:46:34] [PASSED] drm_test_cmdline_rotate_180
[18:46:34] [PASSED] drm_test_cmdline_rotate_270
[18:46:34] [PASSED] drm_test_cmdline_hmirror
[18:46:34] [PASSED] drm_test_cmdline_vmirror
[18:46:34] [PASSED] drm_test_cmdline_margin_options
[18:46:34] [PASSED] drm_test_cmdline_multiple_options
[18:46:34] [PASSED] drm_test_cmdline_bpp_extra_and_option
[18:46:34] [PASSED] drm_test_cmdline_extra_and_option
[18:46:34] [PASSED] drm_test_cmdline_freestanding_options
[18:46:34] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[18:46:34] [PASSED] drm_test_cmdline_panel_orientation
[18:46:35] ================ drm_test_cmdline_invalid  =================
[18:46:35] [PASSED] margin_only
[18:46:35] [PASSED] interlace_only
[18:46:35] [PASSED] res_missing_x
[18:46:35] [PASSED] res_missing_y
[18:46:35] [PASSED] res_bad_y
[18:46:35] [PASSED] res_missing_y_bpp
[18:46:35] [PASSED] res_bad_bpp
[18:46:35] [PASSED] res_bad_refresh
[18:46:35] [PASSED] res_bpp_refresh_force_on_off
[18:46:35] [PASSED] res_invalid_mode
[18:46:35] [PASSED] res_bpp_wrong_place_mode
[18:46:35] [PASSED] name_bpp_refresh
[18:46:35] [PASSED] name_refresh
[18:46:35] [PASSED] name_refresh_wrong_mode
[18:46:35] [PASSED] name_refresh_invalid_mode
[18:46:35] [PASSED] rotate_multiple
[18:46:35] [PASSED] rotate_invalid_val
[18:46:35] [PASSED] rotate_truncated
[18:46:35] [PASSED] invalid_option
[18:46:35] [PASSED] invalid_tv_option
[18:46:35] [PASSED] truncated_tv_option
[18:46:35] ============ [PASSED] drm_test_cmdline_invalid =============
[18:46:35] =============== drm_test_cmdline_tv_options  ===============
[18:46:35] [PASSED] NTSC
[18:46:35] [PASSED] NTSC_443
[18:46:35] [PASSED] NTSC_J
[18:46:35] [PASSED] PAL
[18:46:35] [PASSED] PAL_M
[18:46:35] [PASSED] PAL_N
[18:46:35] [PASSED] SECAM
[18:46:35] [PASSED] MONO_525
[18:46:35] [PASSED] MONO_625
[18:46:35] =========== [PASSED] drm_test_cmdline_tv_options ===========
[18:46:35] =============== [PASSED] drm_cmdline_parser ================
[18:46:35] ========== drmm_connector_hdmi_init (20 subtests) ==========
[18:46:35] [PASSED] drm_test_connector_hdmi_init_valid
[18:46:35] [PASSED] drm_test_connector_hdmi_init_bpc_8
[18:46:35] [PASSED] drm_test_connector_hdmi_init_bpc_10
[18:46:35] [PASSED] drm_test_connector_hdmi_init_bpc_12
[18:46:35] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[18:46:35] [PASSED] drm_test_connector_hdmi_init_bpc_null
[18:46:35] [PASSED] drm_test_connector_hdmi_init_formats_empty
[18:46:35] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[18:46:35] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[18:46:35] [PASSED] supported_formats=0x9 yuv420_allowed=1
[18:46:35] [PASSED] supported_formats=0x9 yuv420_allowed=0
[18:46:35] [PASSED] supported_formats=0x5 yuv420_allowed=1
[18:46:35] [PASSED] supported_formats=0x5 yuv420_allowed=0
[18:46:35] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[18:46:35] [PASSED] drm_test_connector_hdmi_init_null_ddc
[18:46:35] [PASSED] drm_test_connector_hdmi_init_null_product
[18:46:35] [PASSED] drm_test_connector_hdmi_init_null_vendor
[18:46:35] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[18:46:35] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[18:46:35] [PASSED] drm_test_connector_hdmi_init_product_valid
[18:46:35] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[18:46:35] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[18:46:35] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[18:46:35] ========= drm_test_connector_hdmi_init_type_valid  =========
[18:46:35] [PASSED] HDMI-A
[18:46:35] [PASSED] HDMI-B
[18:46:35] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[18:46:35] ======== drm_test_connector_hdmi_init_type_invalid  ========
[18:46:35] [PASSED] Unknown
[18:46:35] [PASSED] VGA
[18:46:35] [PASSED] DVI-I
[18:46:35] [PASSED] DVI-D
[18:46:35] [PASSED] DVI-A
[18:46:35] [PASSED] Composite
[18:46:35] [PASSED] SVIDEO
[18:46:35] [PASSED] LVDS
[18:46:35] [PASSED] Component
[18:46:35] [PASSED] DIN
[18:46:35] [PASSED] DP
[18:46:35] [PASSED] TV
[18:46:35] [PASSED] eDP
[18:46:35] [PASSED] Virtual
[18:46:35] [PASSED] DSI
[18:46:35] [PASSED] DPI
[18:46:35] [PASSED] Writeback
[18:46:35] [PASSED] SPI
[18:46:35] [PASSED] USB
[18:46:35] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[18:46:35] ============ [PASSED] drmm_connector_hdmi_init =============
[18:46:35] ============= drmm_connector_init (3 subtests) =============
[18:46:35] [PASSED] drm_test_drmm_connector_init
[18:46:35] [PASSED] drm_test_drmm_connector_init_null_ddc
[18:46:35] ========= drm_test_drmm_connector_init_type_valid  =========
[18:46:35] [PASSED] Unknown
[18:46:35] [PASSED] VGA
[18:46:35] [PASSED] DVI-I
[18:46:35] [PASSED] DVI-D
[18:46:35] [PASSED] DVI-A
[18:46:35] [PASSED] Composite
[18:46:35] [PASSED] SVIDEO
[18:46:35] [PASSED] LVDS
[18:46:35] [PASSED] Component
[18:46:35] [PASSED] DIN
[18:46:35] [PASSED] DP
[18:46:35] [PASSED] HDMI-A
[18:46:35] [PASSED] HDMI-B
[18:46:35] [PASSED] TV
[18:46:35] [PASSED] eDP
[18:46:35] [PASSED] Virtual
[18:46:35] [PASSED] DSI
[18:46:35] [PASSED] DPI
[18:46:35] [PASSED] Writeback
[18:46:35] [PASSED] SPI
[18:46:35] [PASSED] USB
[18:46:35] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[18:46:35] =============== [PASSED] drmm_connector_init ===============
[18:46:35] ========= drm_connector_dynamic_init (6 subtests) ==========
[18:46:35] [PASSED] drm_test_drm_connector_dynamic_init
[18:46:35] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[18:46:35] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[18:46:35] [PASSED] drm_test_drm_connector_dynamic_init_properties
[18:46:35] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[18:46:35] [PASSED] Unknown
[18:46:35] [PASSED] VGA
[18:46:35] [PASSED] DVI-I
[18:46:35] [PASSED] DVI-D
[18:46:35] [PASSED] DVI-A
[18:46:35] [PASSED] Composite
[18:46:35] [PASSED] SVIDEO
[18:46:35] [PASSED] LVDS
[18:46:35] [PASSED] Component
[18:46:35] [PASSED] DIN
[18:46:35] [PASSED] DP
[18:46:35] [PASSED] HDMI-A
[18:46:35] [PASSED] HDMI-B
[18:46:35] [PASSED] TV
[18:46:35] [PASSED] eDP
[18:46:35] [PASSED] Virtual
[18:46:35] [PASSED] DSI
[18:46:35] [PASSED] DPI
[18:46:35] [PASSED] Writeback
[18:46:35] [PASSED] SPI
[18:46:35] [PASSED] USB
[18:46:35] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[18:46:35] ======== drm_test_drm_connector_dynamic_init_name  =========
[18:46:35] [PASSED] Unknown
[18:46:35] [PASSED] VGA
[18:46:35] [PASSED] DVI-I
[18:46:35] [PASSED] DVI-D
[18:46:35] [PASSED] DVI-A
[18:46:35] [PASSED] Composite
[18:46:35] [PASSED] SVIDEO
[18:46:35] [PASSED] LVDS
[18:46:35] [PASSED] Component
[18:46:35] [PASSED] DIN
[18:46:35] [PASSED] DP
[18:46:35] [PASSED] HDMI-A
[18:46:35] [PASSED] HDMI-B
[18:46:35] [PASSED] TV
[18:46:35] [PASSED] eDP
[18:46:35] [PASSED] Virtual
[18:46:35] [PASSED] DSI
[18:46:35] [PASSED] DPI
[18:46:35] [PASSED] Writeback
[18:46:35] [PASSED] SPI
[18:46:35] [PASSED] USB
[18:46:35] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[18:46:35] =========== [PASSED] drm_connector_dynamic_init ============
[18:46:35] ==== drm_connector_dynamic_register_early (4 subtests) =====
[18:46:35] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[18:46:35] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[18:46:35] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[18:46:35] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[18:46:35] ====== [PASSED] drm_connector_dynamic_register_early =======
[18:46:35] ======= drm_connector_dynamic_register (7 subtests) ========
[18:46:35] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[18:46:35] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[18:46:35] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[18:46:35] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[18:46:35] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[18:46:35] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[18:46:35] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[18:46:35] ========= [PASSED] drm_connector_dynamic_register ==========
[18:46:35] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[18:46:35] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[18:46:35] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[18:46:35] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[18:46:35] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[18:46:35] ========== drm_test_get_tv_mode_from_name_valid  ===========
[18:46:35] [PASSED] NTSC
[18:46:35] [PASSED] NTSC-443
[18:46:35] [PASSED] NTSC-J
[18:46:35] [PASSED] PAL
[18:46:35] [PASSED] PAL-M
[18:46:35] [PASSED] PAL-N
[18:46:35] [PASSED] SECAM
[18:46:35] [PASSED] Mono
[18:46:35] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[18:46:35] [PASSED] drm_test_get_tv_mode_from_name_truncated
[18:46:35] ============ [PASSED] drm_get_tv_mode_from_name ============
[18:46:35] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[18:46:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[18:46:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[18:46:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[18:46:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[18:46:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[18:46:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[18:46:35] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[18:46:35] [PASSED] VIC 96
[18:46:35] [PASSED] VIC 97
[18:46:35] [PASSED] VIC 101
[18:46:35] [PASSED] VIC 102
[18:46:35] [PASSED] VIC 106
[18:46:35] [PASSED] VIC 107
[18:46:35] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[18:46:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[18:46:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[18:46:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[18:46:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[18:46:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[18:46:35] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[18:46:35] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[18:46:35] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[18:46:35] [PASSED] Automatic
[18:46:35] [PASSED] Full
[18:46:35] [PASSED] Limited 16:235
[18:46:35] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[18:46:35] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[18:46:35] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[18:46:35] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[18:46:35] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[18:46:35] [PASSED] RGB
[18:46:35] [PASSED] YUV 4:2:0
[18:46:35] [PASSED] YUV 4:2:2
[18:46:35] [PASSED] YUV 4:4:4
[18:46:35] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[18:46:35] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[18:46:35] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[18:46:35] ============= drm_damage_helper (21 subtests) ==============
[18:46:35] [PASSED] drm_test_damage_iter_no_damage
[18:46:35] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[18:46:35] [PASSED] drm_test_damage_iter_no_damage_src_moved
[18:46:35] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[18:46:35] [PASSED] drm_test_damage_iter_no_damage_not_visible
[18:46:35] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[18:46:35] [PASSED] drm_test_damage_iter_no_damage_no_fb
[18:46:35] [PASSED] drm_test_damage_iter_simple_damage
[18:46:35] [PASSED] drm_test_damage_iter_single_damage
[18:46:35] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[18:46:35] [PASSED] drm_test_damage_iter_single_damage_outside_src
[18:46:35] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[18:46:35] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[18:46:35] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[18:46:35] [PASSED] drm_test_damage_iter_single_damage_src_moved
[18:46:35] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[18:46:35] [PASSED] drm_test_damage_iter_damage
[18:46:35] [PASSED] drm_test_damage_iter_damage_one_intersect
[18:46:35] [PASSED] drm_test_damage_iter_damage_one_outside
[18:46:35] [PASSED] drm_test_damage_iter_damage_src_moved
[18:46:35] [PASSED] drm_test_damage_iter_damage_not_visible
[18:46:35] ================ [PASSED] drm_damage_helper ================
[18:46:35] ============== drm_dp_mst_helper (3 subtests) ==============
[18:46:35] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[18:46:35] [PASSED] Clock 154000 BPP 30 DSC disabled
[18:46:35] [PASSED] Clock 234000 BPP 30 DSC disabled
[18:46:35] [PASSED] Clock 297000 BPP 24 DSC disabled
[18:46:35] [PASSED] Clock 332880 BPP 24 DSC enabled
[18:46:35] [PASSED] Clock 324540 BPP 24 DSC enabled
[18:46:35] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[18:46:35] ============== drm_test_dp_mst_calc_pbn_div  ===============
[18:46:35] [PASSED] Link rate 2000000 lane count 4
[18:46:35] [PASSED] Link rate 2000000 lane count 2
[18:46:35] [PASSED] Link rate 2000000 lane count 1
[18:46:35] [PASSED] Link rate 1350000 lane count 4
[18:46:35] [PASSED] Link rate 1350000 lane count 2
[18:46:35] [PASSED] Link rate 1350000 lane count 1
[18:46:35] [PASSED] Link rate 1000000 lane count 4
[18:46:35] [PASSED] Link rate 1000000 lane count 2
[18:46:35] [PASSED] Link rate 1000000 lane count 1
[18:46:35] [PASSED] Link rate 810000 lane count 4
[18:46:35] [PASSED] Link rate 810000 lane count 2
[18:46:35] [PASSED] Link rate 810000 lane count 1
[18:46:35] [PASSED] Link rate 540000 lane count 4
[18:46:35] [PASSED] Link rate 540000 lane count 2
[18:46:35] [PASSED] Link rate 540000 lane count 1
[18:46:35] [PASSED] Link rate 270000 lane count 4
[18:46:35] [PASSED] Link rate 270000 lane count 2
[18:46:35] [PASSED] Link rate 270000 lane count 1
[18:46:35] [PASSED] Link rate 162000 lane count 4
[18:46:35] [PASSED] Link rate 162000 lane count 2
[18:46:35] [PASSED] Link rate 162000 lane count 1
[18:46:35] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[18:46:35] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[18:46:35] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[18:46:35] [PASSED] DP_POWER_UP_PHY with port number
[18:46:35] [PASSED] DP_POWER_DOWN_PHY with port number
[18:46:35] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[18:46:35] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[18:46:35] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[18:46:35] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[18:46:35] [PASSED] DP_QUERY_PAYLOAD with port number
[18:46:35] [PASSED] DP_QUERY_PAYLOAD with VCPI
[18:46:35] [PASSED] DP_REMOTE_DPCD_READ with port number
[18:46:35] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[18:46:35] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[18:46:35] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[18:46:35] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[18:46:35] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[18:46:35] [PASSED] DP_REMOTE_I2C_READ with port number
[18:46:35] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[18:46:35] [PASSED] DP_REMOTE_I2C_READ with transactions array
[18:46:35] [PASSED] DP_REMOTE_I2C_WRITE with port number
[18:46:35] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[18:46:35] [PASSED] DP_REMOTE_I2C_WRITE with data array
[18:46:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[18:46:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[18:46:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[18:46:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[18:46:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[18:46:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[18:46:35] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[18:46:35] ================ [PASSED] drm_dp_mst_helper ================
[18:46:35] ================== drm_exec (7 subtests) ===================
[18:46:35] [PASSED] sanitycheck
[18:46:35] [PASSED] test_lock
[18:46:35] [PASSED] test_lock_unlock
[18:46:35] [PASSED] test_duplicates
[18:46:35] [PASSED] test_prepare
[18:46:35] [PASSED] test_prepare_array
[18:46:35] [PASSED] test_multiple_loops
[18:46:35] ==================== [PASSED] drm_exec =====================
[18:46:35] =========== drm_format_helper_test (17 subtests) ===========
[18:46:35] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[18:46:35] [PASSED] single_pixel_source_buffer
[18:46:35] [PASSED] single_pixel_clip_rectangle
[18:46:35] [PASSED] well_known_colors
[18:46:35] [PASSED] destination_pitch
[18:46:35] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[18:46:35] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[18:46:35] [PASSED] single_pixel_source_buffer
[18:46:35] [PASSED] single_pixel_clip_rectangle
[18:46:35] [PASSED] well_known_colors
[18:46:35] [PASSED] destination_pitch
[18:46:35] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[18:46:35] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[18:46:35] [PASSED] single_pixel_source_buffer
[18:46:35] [PASSED] single_pixel_clip_rectangle
[18:46:35] [PASSED] well_known_colors
[18:46:35] [PASSED] destination_pitch
[18:46:35] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[18:46:35] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[18:46:35] [PASSED] single_pixel_source_buffer
[18:46:35] [PASSED] single_pixel_clip_rectangle
[18:46:35] [PASSED] well_known_colors
[18:46:35] [PASSED] destination_pitch
[18:46:35] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[18:46:35] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[18:46:35] [PASSED] single_pixel_source_buffer
[18:46:35] [PASSED] single_pixel_clip_rectangle
[18:46:35] [PASSED] well_known_colors
[18:46:35] [PASSED] destination_pitch
[18:46:35] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[18:46:35] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[18:46:35] [PASSED] single_pixel_source_buffer
[18:46:35] [PASSED] single_pixel_clip_rectangle
[18:46:35] [PASSED] well_known_colors
[18:46:35] [PASSED] destination_pitch
[18:46:35] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[18:46:35] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[18:46:35] [PASSED] single_pixel_source_buffer
[18:46:35] [PASSED] single_pixel_clip_rectangle
[18:46:35] [PASSED] well_known_colors
[18:46:35] [PASSED] destination_pitch
[18:46:35] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[18:46:35] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[18:46:35] [PASSED] single_pixel_source_buffer
[18:46:35] [PASSED] single_pixel_clip_rectangle
[18:46:35] [PASSED] well_known_colors
[18:46:35] [PASSED] destination_pitch
[18:46:35] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[18:46:35] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[18:46:35] [PASSED] single_pixel_source_buffer
[18:46:35] [PASSED] single_pixel_clip_rectangle
[18:46:35] [PASSED] well_known_colors
[18:46:35] [PASSED] destination_pitch
[18:46:35] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[18:46:35] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[18:46:35] [PASSED] single_pixel_source_buffer
[18:46:35] [PASSED] single_pixel_clip_rectangle
[18:46:35] [PASSED] well_known_colors
[18:46:35] [PASSED] destination_pitch
[18:46:35] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[18:46:35] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[18:46:35] [PASSED] single_pixel_source_buffer
[18:46:35] [PASSED] single_pixel_clip_rectangle
[18:46:35] [PASSED] well_known_colors
[18:46:35] [PASSED] destination_pitch
[18:46:35] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[18:46:35] ============== drm_test_fb_xrgb8888_to_mono  ===============
[18:46:35] [PASSED] single_pixel_source_buffer
[18:46:35] [PASSED] single_pixel_clip_rectangle
[18:46:35] [PASSED] well_known_colors
[18:46:35] [PASSED] destination_pitch
[18:46:35] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[18:46:35] ==================== drm_test_fb_swab  =====================
[18:46:35] [PASSED] single_pixel_source_buffer
[18:46:35] [PASSED] single_pixel_clip_rectangle
[18:46:35] [PASSED] well_known_colors
[18:46:35] [PASSED] destination_pitch
[18:46:35] ================ [PASSED] drm_test_fb_swab =================
[18:46:35] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[18:46:35] [PASSED] single_pixel_source_buffer
[18:46:35] [PASSED] single_pixel_clip_rectangle
[18:46:35] [PASSED] well_known_colors
[18:46:35] [PASSED] destination_pitch
[18:46:35] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[18:46:35] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[18:46:35] [PASSED] single_pixel_source_buffer
[18:46:35] [PASSED] single_pixel_clip_rectangle
[18:46:35] [PASSED] well_known_colors
[18:46:35] [PASSED] destination_pitch
[18:46:35] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[18:46:35] ================= drm_test_fb_clip_offset  =================
[18:46:35] [PASSED] pass through
[18:46:35] [PASSED] horizontal offset
[18:46:35] [PASSED] vertical offset
[18:46:35] [PASSED] horizontal and vertical offset
[18:46:35] [PASSED] horizontal offset (custom pitch)
[18:46:35] [PASSED] vertical offset (custom pitch)
[18:46:35] [PASSED] horizontal and vertical offset (custom pitch)
[18:46:35] ============= [PASSED] drm_test_fb_clip_offset =============
[18:46:35] =================== drm_test_fb_memcpy  ====================
[18:46:35] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[18:46:35] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[18:46:35] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[18:46:35] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[18:46:35] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[18:46:35] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[18:46:35] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[18:46:35] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[18:46:35] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[18:46:35] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[18:46:35] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[18:46:35] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[18:46:35] =============== [PASSED] drm_test_fb_memcpy ================
[18:46:35] ============= [PASSED] drm_format_helper_test ==============
[18:46:35] ================= drm_format (18 subtests) =================
[18:46:35] [PASSED] drm_test_format_block_width_invalid
[18:46:35] [PASSED] drm_test_format_block_width_one_plane
[18:46:35] [PASSED] drm_test_format_block_width_two_plane
[18:46:35] [PASSED] drm_test_format_block_width_three_plane
[18:46:35] [PASSED] drm_test_format_block_width_tiled
[18:46:35] [PASSED] drm_test_format_block_height_invalid
[18:46:35] [PASSED] drm_test_format_block_height_one_plane
[18:46:35] [PASSED] drm_test_format_block_height_two_plane
[18:46:35] [PASSED] drm_test_format_block_height_three_plane
[18:46:35] [PASSED] drm_test_format_block_height_tiled
[18:46:35] [PASSED] drm_test_format_min_pitch_invalid
[18:46:35] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[18:46:35] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[18:46:35] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[18:46:35] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[18:46:35] [PASSED] drm_test_format_min_pitch_two_plane
[18:46:35] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[18:46:35] [PASSED] drm_test_format_min_pitch_tiled
[18:46:35] =================== [PASSED] drm_format ====================
[18:46:35] ============== drm_framebuffer (10 subtests) ===============
[18:46:35] ========== drm_test_framebuffer_check_src_coords  ==========
[18:46:35] [PASSED] Success: source fits into fb
[18:46:35] [PASSED] Fail: overflowing fb with x-axis coordinate
[18:46:35] [PASSED] Fail: overflowing fb with y-axis coordinate
[18:46:35] [PASSED] Fail: overflowing fb with source width
[18:46:35] [PASSED] Fail: overflowing fb with source height
[18:46:35] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[18:46:35] [PASSED] drm_test_framebuffer_cleanup
[18:46:35] =============== drm_test_framebuffer_create  ===============
[18:46:35] [PASSED] ABGR8888 normal sizes
[18:46:35] [PASSED] ABGR8888 max sizes
[18:46:35] [PASSED] ABGR8888 pitch greater than min required
[18:46:35] [PASSED] ABGR8888 pitch less than min required
[18:46:35] [PASSED] ABGR8888 Invalid width
[18:46:35] [PASSED] ABGR8888 Invalid buffer handle
[18:46:35] [PASSED] No pixel format
[18:46:35] [PASSED] ABGR8888 Width 0
[18:46:35] [PASSED] ABGR8888 Height 0
[18:46:35] [PASSED] ABGR8888 Out of bound height * pitch combination
[18:46:35] [PASSED] ABGR8888 Large buffer offset
[18:46:35] [PASSED] ABGR8888 Buffer offset for inexistent plane
[18:46:35] [PASSED] ABGR8888 Invalid flag
[18:46:35] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[18:46:35] [PASSED] ABGR8888 Valid buffer modifier
[18:46:35] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[18:46:35] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[18:46:35] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[18:46:35] [PASSED] NV12 Normal sizes
[18:46:35] [PASSED] NV12 Max sizes
[18:46:35] [PASSED] NV12 Invalid pitch
[18:46:35] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[18:46:35] [PASSED] NV12 different  modifier per-plane
[18:46:35] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[18:46:35] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[18:46:35] [PASSED] NV12 Modifier for inexistent plane
[18:46:35] [PASSED] NV12 Handle for inexistent plane
[18:46:35] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[18:46:35] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[18:46:35] [PASSED] YVU420 Normal sizes
[18:46:35] [PASSED] YVU420 Max sizes
[18:46:35] [PASSED] YVU420 Invalid pitch
[18:46:35] [PASSED] YVU420 Different pitches
[18:46:35] [PASSED] YVU420 Different buffer offsets/pitches
[18:46:35] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[18:46:35] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[18:46:35] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[18:46:35] [PASSED] YVU420 Valid modifier
[18:46:35] [PASSED] YVU420 Different modifiers per plane
[18:46:35] [PASSED] YVU420 Modifier for inexistent plane
[18:46:35] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[18:46:35] [PASSED] X0L2 Normal sizes
[18:46:35] [PASSED] X0L2 Max sizes
[18:46:35] [PASSED] X0L2 Invalid pitch
[18:46:35] [PASSED] X0L2 Pitch greater than minimum required
[18:46:35] [PASSED] X0L2 Handle for inexistent plane
[18:46:35] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[18:46:35] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[18:46:35] [PASSED] X0L2 Valid modifier
[18:46:35] [PASSED] X0L2 Modifier for inexistent plane
[18:46:35] =========== [PASSED] drm_test_framebuffer_create ===========
[18:46:35] [PASSED] drm_test_framebuffer_free
[18:46:35] [PASSED] drm_test_framebuffer_init
[18:46:35] [PASSED] drm_test_framebuffer_init_bad_format
[18:46:35] [PASSED] drm_test_framebuffer_init_dev_mismatch
[18:46:35] [PASSED] drm_test_framebuffer_lookup
[18:46:35] [PASSED] drm_test_framebuffer_lookup_inexistent
[18:46:35] [PASSED] drm_test_framebuffer_modifiers_not_supported
[18:46:35] ================= [PASSED] drm_framebuffer =================
[18:46:35] ================ drm_gem_shmem (8 subtests) ================
[18:46:35] [PASSED] drm_gem_shmem_test_obj_create
[18:46:35] [PASSED] drm_gem_shmem_test_obj_create_private
[18:46:35] [PASSED] drm_gem_shmem_test_pin_pages
[18:46:35] [PASSED] drm_gem_shmem_test_vmap
[18:46:35] [PASSED] drm_gem_shmem_test_get_sg_table
[18:46:35] [PASSED] drm_gem_shmem_test_get_pages_sgt
[18:46:35] [PASSED] drm_gem_shmem_test_madvise
[18:46:35] [PASSED] drm_gem_shmem_test_purge
[18:46:35] ================== [PASSED] drm_gem_shmem ==================
[18:46:35] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[18:46:35] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[18:46:35] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[18:46:35] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[18:46:35] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[18:46:35] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[18:46:35] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[18:46:35] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[18:46:35] [PASSED] Automatic
[18:46:35] [PASSED] Full
[18:46:35] [PASSED] Limited 16:235
[18:46:35] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[18:46:35] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[18:46:35] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[18:46:35] [PASSED] drm_test_check_disable_connector
[18:46:35] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[18:46:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[18:46:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[18:46:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[18:46:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[18:46:35] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[18:46:35] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[18:46:35] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[18:46:35] [PASSED] drm_test_check_output_bpc_dvi
[18:46:35] [PASSED] drm_test_check_output_bpc_format_vic_1
[18:46:35] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[18:46:35] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[18:46:35] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[18:46:35] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[18:46:35] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[18:46:35] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[18:46:35] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[18:46:35] ============ drm_test_check_hdmi_color_format  =============
[18:46:35] [PASSED] AUTO -> RGB
[18:46:35] [PASSED] YCBCR422 -> YUV422
[18:46:35] [PASSED] YCBCR420 -> YUV420
[18:46:35] [PASSED] YCBCR444 -> YUV444
[18:46:35] [PASSED] RGB -> RGB
[18:46:35] ======== [PASSED] drm_test_check_hdmi_color_format =========
[18:46:35] ======== drm_test_check_hdmi_color_format_420_only  ========
[18:46:35] [PASSED] RGB should fail
[18:46:35] [PASSED] YUV444 should fail
[18:46:35] [PASSED] YUV422 should fail
[18:46:35] [PASSED] YUV420 should work
[18:46:35] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[18:46:35] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[18:46:35] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[18:46:35] [PASSED] drm_test_check_broadcast_rgb_value
[18:46:35] [PASSED] drm_test_check_bpc_8_value
[18:46:35] [PASSED] drm_test_check_bpc_10_value
[18:46:35] [PASSED] drm_test_check_bpc_12_value
[18:46:35] [PASSED] drm_test_check_format_value
[18:46:35] [PASSED] drm_test_check_tmds_char_value
[18:46:35] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[18:46:35] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[18:46:35] [PASSED] drm_test_check_mode_valid
[18:46:35] [PASSED] drm_test_check_mode_valid_reject
[18:46:35] [PASSED] drm_test_check_mode_valid_reject_rate
[18:46:35] [PASSED] drm_test_check_mode_valid_reject_max_clock
[18:46:35] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[18:46:35] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[18:46:35] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[18:46:35] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[18:46:35] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[18:46:35] [PASSED] drm_test_check_infoframes
[18:46:35] [PASSED] drm_test_check_reject_avi_infoframe
[18:46:35] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[18:46:35] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[18:46:35] [PASSED] drm_test_check_reject_audio_infoframe
[18:46:35] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[18:46:35] ================= drm_managed (2 subtests) =================
[18:46:35] [PASSED] drm_test_managed_release_action
[18:46:35] [PASSED] drm_test_managed_run_action
[18:46:35] =================== [PASSED] drm_managed ===================
[18:46:35] =================== drm_mm (6 subtests) ====================
[18:46:35] [PASSED] drm_test_mm_init
[18:46:35] [PASSED] drm_test_mm_debug
[18:46:35] [PASSED] drm_test_mm_align32
[18:46:35] [PASSED] drm_test_mm_align64
[18:46:35] [PASSED] drm_test_mm_lowest
[18:46:35] [PASSED] drm_test_mm_highest
[18:46:35] ===================== [PASSED] drm_mm ======================
[18:46:35] ============= drm_modes_analog_tv (5 subtests) =============
[18:46:35] [PASSED] drm_test_modes_analog_tv_mono_576i
[18:46:35] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[18:46:35] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[18:46:35] [PASSED] drm_test_modes_analog_tv_pal_576i
[18:46:35] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[18:46:35] =============== [PASSED] drm_modes_analog_tv ===============
[18:46:35] ============== drm_plane_helper (2 subtests) ===============
[18:46:35] =============== drm_test_check_plane_state  ================
[18:46:35] [PASSED] clipping_simple
[18:46:35] [PASSED] clipping_rotate_reflect
[18:46:35] [PASSED] positioning_simple
[18:46:35] [PASSED] upscaling
[18:46:35] [PASSED] downscaling
[18:46:35] [PASSED] rounding1
[18:46:35] [PASSED] rounding2
[18:46:35] [PASSED] rounding3
[18:46:35] [PASSED] rounding4
[18:46:35] =========== [PASSED] drm_test_check_plane_state ============
[18:46:35] =========== drm_test_check_invalid_plane_state  ============
[18:46:35] [PASSED] positioning_invalid
[18:46:35] [PASSED] upscaling_invalid
[18:46:35] [PASSED] downscaling_invalid
[18:46:35] ======= [PASSED] drm_test_check_invalid_plane_state ========
[18:46:35] ================ [PASSED] drm_plane_helper =================
[18:46:35] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[18:46:35] ====== drm_test_connector_helper_tv_get_modes_check  =======
[18:46:35] [PASSED] None
[18:46:35] [PASSED] PAL
[18:46:35] [PASSED] NTSC
[18:46:35] [PASSED] Both, NTSC Default
[18:46:35] [PASSED] Both, PAL Default
[18:46:35] [PASSED] Both, NTSC Default, with PAL on command-line
[18:46:35] [PASSED] Both, PAL Default, with NTSC on command-line
[18:46:35] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[18:46:35] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[18:46:35] ================== drm_rect (9 subtests) ===================
[18:46:35] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[18:46:35] [PASSED] drm_test_rect_clip_scaled_not_clipped
[18:46:35] [PASSED] drm_test_rect_clip_scaled_clipped
[18:46:35] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[18:46:35] ================= drm_test_rect_intersect  =================
[18:46:35] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[18:46:35] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[18:46:35] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[18:46:35] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[18:46:35] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[18:46:35] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[18:46:35] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[18:46:35] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[18:46:35] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[18:46:35] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[18:46:35] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[18:46:35] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[18:46:35] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[18:46:35] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[18:46:35] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[18:46:35] ============= [PASSED] drm_test_rect_intersect =============
[18:46:35] ================ drm_test_rect_calc_hscale  ================
[18:46:35] [PASSED] normal use
[18:46:35] [PASSED] out of max range
[18:46:35] [PASSED] out of min range
[18:46:35] [PASSED] zero dst
[18:46:35] [PASSED] negative src
[18:46:35] [PASSED] negative dst
[18:46:35] ============ [PASSED] drm_test_rect_calc_hscale ============
[18:46:35] ================ drm_test_rect_calc_vscale  ================
[18:46:35] [PASSED] normal use
[18:46:35] [PASSED] out of max range
[18:46:35] [PASSED] out of min range
[18:46:35] [PASSED] zero dst
[18:46:35] [PASSED] negative src
[18:46:35] [PASSED] negative dst
[18:46:35] ============ [PASSED] drm_test_rect_calc_vscale ============
[18:46:35] ================== drm_test_rect_rotate  ===================
[18:46:35] [PASSED] reflect-x
[18:46:35] [PASSED] reflect-y
[18:46:35] [PASSED] rotate-0
[18:46:35] [PASSED] rotate-90
[18:46:35] [PASSED] rotate-180
[18:46:35] [PASSED] rotate-270
[18:46:35] ============== [PASSED] drm_test_rect_rotate ===============
[18:46:35] ================ drm_test_rect_rotate_inv  =================
[18:46:35] [PASSED] reflect-x
[18:46:35] [PASSED] reflect-y
[18:46:35] [PASSED] rotate-0
[18:46:35] [PASSED] rotate-90
[18:46:35] [PASSED] rotate-180
[18:46:35] [PASSED] rotate-270
[18:46:35] ============ [PASSED] drm_test_rect_rotate_inv =============
[18:46:35] ==================== [PASSED] drm_rect =====================
[18:46:35] ============ drm_sysfb_modeset_test (1 subtest) ============
[18:46:35] ============ drm_test_sysfb_build_fourcc_list  =============
[18:46:35] [PASSED] no native formats
[18:46:35] [PASSED] XRGB8888 as native format
[18:46:35] [PASSED] remove duplicates
[18:46:35] [PASSED] convert alpha formats
[18:46:35] [PASSED] random formats
[18:46:35] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[18:46:35] ============= [PASSED] drm_sysfb_modeset_test ==============
[18:46:35] ================== drm_fixp (2 subtests) ===================
[18:46:35] [PASSED] drm_test_int2fixp
[18:46:35] [PASSED] drm_test_sm2fixp
[18:46:35] ==================== [PASSED] drm_fixp =====================
[18:46:35] ============================================================
[18:46:35] Testing complete. Ran 641 tests: passed: 641
[18:46:35] Elapsed time: 26.790s total, 1.820s configuring, 24.805s building, 0.138s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[18:46:35] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:46:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:46:47] Starting KUnit Kernel (1/1)...
[18:46:47] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:46:47] ============= refcount_interrupt (4 subtests) ==============
[18:46:47] [PASSED] test_single_irq_change
[18:46:47] [PASSED] test_nested_irq_change
[18:46:47] [PASSED] test_multiple_irq_change
[18:46:47] [PASSED] test_irq_save
[18:46:47] =============== [PASSED] refcount_interrupt ================
[18:46:47] ================= ttm_device (5 subtests) ==================
[18:46:47] [PASSED] ttm_device_init_basic
[18:46:47] [PASSED] ttm_device_init_multiple
[18:46:47] [PASSED] ttm_device_fini_basic
[18:46:47] [PASSED] ttm_device_init_no_vma_man
[18:46:47] ================== ttm_device_init_pools  ==================
[18:46:47] [PASSED] No DMA allocations, no DMA32 required
[18:46:47] [PASSED] DMA allocations, DMA32 required
[18:46:47] [PASSED] No DMA allocations, DMA32 required
[18:46:47] [PASSED] DMA allocations, no DMA32 required
[18:46:47] ============== [PASSED] ttm_device_init_pools ==============
[18:46:47] =================== [PASSED] ttm_device ====================
[18:46:47] ================== ttm_pool (8 subtests) ===================
[18:46:47] ================== ttm_pool_alloc_basic  ===================
[18:46:47] [PASSED] One page
[18:46:47] [PASSED] More than one page
[18:46:47] [PASSED] Above the allocation limit
[18:46:47] [PASSED] One page, with coherent DMA mappings enabled
[18:46:47] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:46:47] ============== [PASSED] ttm_pool_alloc_basic ===============
[18:46:47] ============== ttm_pool_alloc_basic_dma_addr  ==============
[18:46:47] [PASSED] One page
[18:46:47] [PASSED] More than one page
[18:46:47] [PASSED] Above the allocation limit
[18:46:47] [PASSED] One page, with coherent DMA mappings enabled
[18:46:47] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:46:47] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[18:46:47] [PASSED] ttm_pool_alloc_order_caching_match
[18:46:47] [PASSED] ttm_pool_alloc_caching_mismatch
[18:46:47] [PASSED] ttm_pool_alloc_order_mismatch
[18:46:47] [PASSED] ttm_pool_free_dma_alloc
[18:46:47] [PASSED] ttm_pool_free_no_dma_alloc
[18:46:47] [PASSED] ttm_pool_fini_basic
[18:46:47] ==================== [PASSED] ttm_pool =====================
[18:46:47] ================ ttm_resource (8 subtests) =================
[18:46:47] ================= ttm_resource_init_basic  =================
[18:46:47] [PASSED] Init resource in TTM_PL_SYSTEM
[18:46:47] [PASSED] Init resource in TTM_PL_VRAM
[18:46:47] [PASSED] Init resource in a private placement
[18:46:47] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[18:46:47] ============= [PASSED] ttm_resource_init_basic =============
[18:46:47] [PASSED] ttm_resource_init_pinned
[18:46:47] [PASSED] ttm_resource_fini_basic
[18:46:47] [PASSED] ttm_resource_manager_init_basic
[18:46:47] [PASSED] ttm_resource_manager_usage_basic
[18:46:47] [PASSED] ttm_resource_manager_set_used_basic
[18:46:47] [PASSED] ttm_sys_man_alloc_basic
[18:46:47] [PASSED] ttm_sys_man_free_basic
[18:46:47] ================== [PASSED] ttm_resource ===================
[18:46:47] =================== ttm_tt (15 subtests) ===================
[18:46:47] ==================== ttm_tt_init_basic  ====================
[18:46:47] [PASSED] Page-aligned size
[18:46:47] [PASSED] Extra pages requested
[18:46:47] ================ [PASSED] ttm_tt_init_basic ================
[18:46:47] [PASSED] ttm_tt_init_misaligned
[18:46:47] [PASSED] ttm_tt_fini_basic
[18:46:47] [PASSED] ttm_tt_fini_sg
[18:46:47] [PASSED] ttm_tt_fini_shmem
[18:46:47] [PASSED] ttm_tt_create_basic
[18:46:47] [PASSED] ttm_tt_create_invalid_bo_type
[18:46:47] [PASSED] ttm_tt_create_ttm_exists
[18:46:47] [PASSED] ttm_tt_create_failed
[18:46:47] [PASSED] ttm_tt_destroy_basic
[18:46:47] [PASSED] ttm_tt_populate_null_ttm
[18:46:47] [PASSED] ttm_tt_populate_populated_ttm
[18:46:47] [PASSED] ttm_tt_unpopulate_basic
[18:46:47] [PASSED] ttm_tt_unpopulate_empty_ttm
[18:46:47] [PASSED] ttm_tt_swapin_basic
[18:46:47] ===================== [PASSED] ttm_tt ======================
[18:46:47] =================== ttm_bo (14 subtests) ===================
[18:46:47] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[18:46:47] [PASSED] Cannot be interrupted and sleeps
[18:46:47] [PASSED] Cannot be interrupted, locks straight away
[18:46:47] [PASSED] Can be interrupted, sleeps
[18:46:47] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[18:46:47] [PASSED] ttm_bo_reserve_locked_no_sleep
[18:46:47] [PASSED] ttm_bo_reserve_no_wait_ticket
[18:46:47] [PASSED] ttm_bo_reserve_double_resv
[18:46:47] [PASSED] ttm_bo_reserve_interrupted
[18:46:47] [PASSED] ttm_bo_reserve_deadlock
[18:46:47] [PASSED] ttm_bo_unreserve_basic
[18:46:47] [PASSED] ttm_bo_unreserve_pinned
[18:46:47] [PASSED] ttm_bo_unreserve_bulk
[18:46:47] [PASSED] ttm_bo_fini_basic
[18:46:47] [PASSED] ttm_bo_fini_shared_resv
[18:46:47] [PASSED] ttm_bo_pin_basic
[18:46:47] [PASSED] ttm_bo_pin_unpin_resource
[18:46:47] [PASSED] ttm_bo_multiple_pin_one_unpin
[18:46:47] ===================== [PASSED] ttm_bo ======================
[18:46:47] ============== ttm_bo_validate (22 subtests) ===============
[18:46:47] ============== ttm_bo_init_reserved_sys_man  ===============
[18:46:47] [PASSED] Buffer object for userspace
[18:46:47] [PASSED] Kernel buffer object
[18:46:47] [PASSED] Shared buffer object
[18:46:47] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[18:46:47] ============== ttm_bo_init_reserved_mock_man  ==============
[18:46:47] [PASSED] Buffer object for userspace
[18:46:47] [PASSED] Kernel buffer object
[18:46:47] [PASSED] Shared buffer object
[18:46:47] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[18:46:47] [PASSED] ttm_bo_init_reserved_resv
[18:46:47] ================== ttm_bo_validate_basic  ==================
[18:46:47] [PASSED] Buffer object for userspace
[18:46:47] [PASSED] Kernel buffer object
[18:46:47] [PASSED] Shared buffer object
[18:46:47] ============== [PASSED] ttm_bo_validate_basic ==============
[18:46:47] [PASSED] ttm_bo_validate_invalid_placement
[18:46:47] ============= ttm_bo_validate_same_placement  ==============
[18:46:47] [PASSED] System manager
[18:46:47] [PASSED] VRAM manager
[18:46:47] ========= [PASSED] ttm_bo_validate_same_placement ==========
[18:46:47] [PASSED] ttm_bo_validate_failed_alloc
[18:46:47] [PASSED] ttm_bo_validate_pinned
[18:46:47] [PASSED] ttm_bo_validate_busy_placement
[18:46:47] ================ ttm_bo_validate_multihop  =================
[18:46:47] [PASSED] Buffer object for userspace
[18:46:47] [PASSED] Kernel buffer object
[18:46:47] [PASSED] Shared buffer object
[18:46:47] ============ [PASSED] ttm_bo_validate_multihop =============
[18:46:47] ========== ttm_bo_validate_no_placement_signaled  ==========
[18:46:47] [PASSED] Buffer object in system domain, no page vector
[18:46:47] [PASSED] Buffer object in system domain with an existing page vector
[18:46:47] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[18:46:47] ======== ttm_bo_validate_no_placement_not_signaled  ========
[18:46:47] [PASSED] Buffer object for userspace
[18:46:47] [PASSED] Kernel buffer object
[18:46:47] [PASSED] Shared buffer object
[18:46:47] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[18:46:47] [PASSED] ttm_bo_validate_move_fence_signaled
[18:46:47] ========= ttm_bo_validate_move_fence_not_signaled  =========
[18:46:47] [PASSED] Waits for GPU
[18:46:47] [PASSED] Tries to lock straight away
[18:46:47] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[18:46:47] [PASSED] ttm_bo_validate_swapout
[18:46:47] [PASSED] ttm_bo_validate_happy_evict
[18:46:47] [PASSED] ttm_bo_validate_all_pinned_evict
[18:46:47] [PASSED] ttm_bo_validate_allowed_only_evict
[18:46:47] [PASSED] ttm_bo_validate_deleted_evict
[18:46:47] [PASSED] ttm_bo_validate_busy_domain_evict
[18:46:47] [PASSED] ttm_bo_validate_evict_gutting
[18:46:47] [PASSED] ttm_bo_validate_recrusive_evict
[18:46:47] ================= [PASSED] ttm_bo_validate =================
[18:46:47] ============================================================
[18:46:47] Testing complete. Ran 106 tests: passed: 106
[18:46:47] Elapsed time: 11.997s total, 1.794s configuring, 9.988s building, 0.179s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[18:46:47] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:46:49] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:46:57] Starting KUnit Kernel (1/1)...
[18:46:57] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:46:57] ============= refcount_interrupt (4 subtests) ==============
[18:46:57] [PASSED] test_single_irq_change
[18:46:57] [PASSED] test_nested_irq_change
[18:46:57] [PASSED] test_multiple_irq_change
[18:46:57] [PASSED] test_irq_save
[18:46:57] =============== [PASSED] refcount_interrupt ================
[18:46:57] =============== dma-buf-fence (12 subtests) ================
[18:46:57] [PASSED] test_sanitycheck
[18:46:57] [PASSED] test_signaling
[18:46:57] [PASSED] test_add_callback
[18:46:57] [PASSED] test_late_add_callback
[18:46:57] [PASSED] test_rm_callback
[18:46:57] [PASSED] test_late_rm_callback
[18:46:57] [PASSED] test_status
[18:46:57] [PASSED] test_error
[18:46:57] [PASSED] test_wait
[18:46:57] [PASSED] test_wait_timeout
[18:46:57] [PASSED] test_stub
[18:46:57] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[18:46:57] ================== [PASSED] dma-buf-fence ==================
[18:46:57] ============ dma-buf-fence-chain (11 subtests) =============
[18:46:57] [PASSED] test_sanitycheck
[18:46:57] [PASSED] test_find_seqno
[18:46:57] [PASSED] test_find_signaled
[18:46:57] [PASSED] test_find_out_of_order
[18:47:03] [PASSED] test_find_gap
[18:47:03] [PASSED] test_find_race
[18:47:03] [PASSED] test_signal_forward
[18:47:03] [PASSED] test_signal_backward
[18:47:03] [PASSED] test_wait_forward
[18:47:03] [PASSED] test_wait_backward
[18:47:03] [PASSED] test_wait_random
[18:47:03] =============== [PASSED] dma-buf-fence-chain ===============
[18:47:03] ============ dma-buf-fence-unwrap (10 subtests) ============
[18:47:03] [PASSED] test_sanitycheck
[18:47:03] [PASSED] test_unwrap_array
[18:47:03] [PASSED] test_unwrap_chain
[18:47:03] [PASSED] test_unwrap_chain_array
[18:47:03] [PASSED] test_unwrap_merge
[18:47:03] [PASSED] test_unwrap_merge_duplicate
[18:47:03] [PASSED] test_unwrap_merge_seqno
[18:47:03] [PASSED] test_unwrap_merge_order
[18:47:03] [PASSED] test_unwrap_merge_complex
[18:47:03] [PASSED] test_unwrap_merge_complex_seqno
[18:47:03] ============== [PASSED] dma-buf-fence-unwrap ===============
[18:47:03] ================ dma-buf-resv (5 subtests) =================
[18:47:03] [PASSED] test_sanitycheck
[18:47:03] ===================== test_signaling  ======================
[18:47:03] [PASSED] kernel
[18:47:03] [PASSED] write
[18:47:03] [PASSED] read
[18:47:03] [PASSED] bookkeep
[18:47:03] ================= [PASSED] test_signaling ==================
[18:47:03] ====================== test_for_each  ======================
[18:47:03] [PASSED] kernel
[18:47:03] [PASSED] write
[18:47:03] [PASSED] read
[18:47:03] [PASSED] bookkeep
[18:47:03] ================== [PASSED] test_for_each ==================
[18:47:03] ================= test_for_each_unlocked  ==================
[18:47:03] [PASSED] kernel
[18:47:03] [PASSED] write
[18:47:03] [PASSED] read
[18:47:03] [PASSED] bookkeep
[18:47:03] ============= [PASSED] test_for_each_unlocked ==============
[18:47:03] ===================== test_get_fences  =====================
[18:47:03] [PASSED] kernel
[18:47:03] [PASSED] write
[18:47:03] [PASSED] read
[18:47:03] [PASSED] bookkeep
[18:47:03] ================= [PASSED] test_get_fences =================
[18:47:03] ================== [PASSED] dma-buf-resv ===================
[18:47:03] ============================================================
[18:47:03] Testing complete. Ran 54 tests: passed: 53, skipped: 1
[18:47:03] Elapsed time: 15.822s total, 1.803s configuring, 8.697s building, 5.283s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe/hwmon: Update hwmon thermal mailbox handling (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 881 bytes --]

== Series Details ==

Series: drm/xe/hwmon: Update hwmon thermal mailbox handling (rev3)
URL   : https://patchwork.freedesktop.org/series/172689/
State : success

== Summary ==

CI Bug Log - changes from xe-5724-aeaac9b539af202c51c1d8419fa36261d864b390_BAT -> xe-pw-172689v3_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (15 -> 15)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5724-aeaac9b539af202c51c1d8419fa36261d864b390 -> xe-pw-172689v3

  IGT_9090: 9090
  xe-5724-aeaac9b539af202c51c1d8419fa36261d864b390: aeaac9b539af202c51c1d8419fa36261d864b390
  xe-pw-172689v3: 172689v3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/index.html

[-- Attachment #2: Type: text/html, Size: 1429 bytes --]

✓ Xe.CI.FULL: success for drm/xe/hwmon: Update hwmon thermal mailbox handling (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 32010 bytes --]

== Series Details ==

Series: drm/xe/hwmon: Update hwmon thermal mailbox handling (rev3)
URL   : https://patchwork.freedesktop.org/series/172689/
State : success

== Summary ==

CI Bug Log - changes from xe-5724-aeaac9b539af202c51c1d8419fa36261d864b390_FULL -> xe-pw-172689v3_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-172689v3_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@4-tiled-8bpp-rotate-90:
    - shard-lnl:          NOTRUN -> [SKIP][1] ([Intel XE#1407]) +2 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
    - shard-lnl:          NOTRUN -> [SKIP][2] ([Intel XE#1124]) +6 other tests skip
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-lnl:          NOTRUN -> [SKIP][3] ([Intel XE#1467] / [Intel XE#7367])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-lnl:          NOTRUN -> [SKIP][4] ([Intel XE#1428] / [Intel XE#7387])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_bw@connected-linear-tiling-2-displays-target-2560x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][5] ([Intel XE#7679]) +1 other test skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@kms_bw@connected-linear-tiling-2-displays-target-2560x1440p.html

  * igt@kms_bw@linear-tiling-2-displays-target-3840x2160p:
    - shard-lnl:          NOTRUN -> [SKIP][6] ([Intel XE#367])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_bw@linear-tiling-2-displays-target-3840x2160p.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][7] ([Intel XE#3432])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][8] ([Intel XE#2887]) +12 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs.html

  * igt@kms_chamelium_audio@dp-audio-after-suspend:
    - shard-lnl:          NOTRUN -> [SKIP][9] ([Intel XE#2252])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@kms_chamelium_audio@dp-audio-after-suspend.html

  * igt@kms_chamelium_color@ctm-0-75:
    - shard-lnl:          NOTRUN -> [SKIP][10] ([Intel XE#306] / [Intel XE#7358])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_chamelium_color@ctm-0-75.html

  * igt@kms_chamelium_color_pipeline@plane-ctm3x4-lut1d:
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#7358])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_chamelium_color_pipeline@plane-ctm3x4-lut1d.html

  * igt@kms_chamelium_edid@hdmi-edid-read:
    - shard-lnl:          NOTRUN -> [SKIP][12] ([Intel XE#373]) +4 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_chamelium_edid@hdmi-edid-read.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-lnl:          NOTRUN -> [SKIP][13] ([Intel XE#307] / [Intel XE#6974])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@suspend-resume:
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#7642]) +1 other test skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@kms_content_protection@suspend-resume.html

  * igt@kms_cursor_crc@cursor-offscreen-64x21:
    - shard-lnl:          NOTRUN -> [SKIP][15] ([Intel XE#1424]) +3 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_cursor_crc@cursor-offscreen-64x21.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-lnl:          NOTRUN -> [SKIP][16] ([Intel XE#2321] / [Intel XE#7355]) +3 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy:
    - shard-lnl:          NOTRUN -> [SKIP][17] ([Intel XE#309] / [Intel XE#7343]) +2 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html

  * igt@kms_dsc@dsc-with-output-formats-ultrajoiner:
    - shard-lnl:          NOTRUN -> [SKIP][18] ([Intel XE#8265]) +2 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_dsc@dsc-with-output-formats-ultrajoiner.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
    - shard-lnl:          NOTRUN -> [SKIP][19] ([Intel XE#4422] / [Intel XE#7442]) +1 other test skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html

  * igt@kms_feature_discovery@chamelium:
    - shard-lnl:          NOTRUN -> [SKIP][20] ([Intel XE#701] / [Intel XE#7359])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@kms_feature_discovery@chamelium.html

  * igt@kms_flip@2x-plain-flip-ts-check:
    - shard-lnl:          NOTRUN -> [SKIP][21] ([Intel XE#1421]) +5 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_flip@2x-plain-flip-ts-check.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-dp2:
    - shard-bmg:          [PASS][22] -> [FAIL][23] ([Intel XE#3321]) +1 other test fail
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5724-aeaac9b539af202c51c1d8419fa36261d864b390/shard-bmg-6/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-dp2.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-bmg-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-dp2.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
    - shard-lnl:          [PASS][24] -> [FAIL][25] ([Intel XE#301] / [Intel XE#3149])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5724-aeaac9b539af202c51c1d8419fa36261d864b390/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          NOTRUN -> [FAIL][26] ([Intel XE#301]) +1 other test fail
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-lnl:          NOTRUN -> [SKIP][27] ([Intel XE#7178] / [Intel XE#7349]) +1 other test skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling:
    - shard-lnl:          NOTRUN -> [SKIP][28] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html

  * igt@kms_force_connector_basic@prune-stale-modes:
    - shard-lnl:          NOTRUN -> [SKIP][29] ([Intel XE#352])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_force_connector_basic@prune-stale-modes.html

  * igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-pri-indfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][30] ([Intel XE#6312]) +8 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][31] ([Intel XE#7061] / [Intel XE#7356]) +4 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][32] ([Intel XE#6312] / [Intel XE#651]) +10 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][33] ([Intel XE#7865]) +20 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][34] ([Intel XE#656] / [Intel XE#7905]) +31 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-move:
    - shard-lnl:          NOTRUN -> [SKIP][35] ([Intel XE#7905]) +32 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@psrhdr-abgr161616f-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][36] ([Intel XE#7061]) +4 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@kms_frontbuffer_tracking@psrhdr-abgr161616f-draw-render.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-lnl:          NOTRUN -> [SKIP][37] ([Intel XE#1503])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier:
    - shard-lnl:          NOTRUN -> [SKIP][38] ([Intel XE#7283]) +2 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier.html

  * igt@kms_plane_multiple@2x-tiling-none:
    - shard-lnl:          NOTRUN -> [SKIP][39] ([Intel XE#4596] / [Intel XE#5854])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_plane_multiple@2x-tiling-none.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-c:
    - shard-lnl:          NOTRUN -> [SKIP][40] ([Intel XE#2763] / [Intel XE#6886]) +7 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-c.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-lnl:          NOTRUN -> [SKIP][41] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc3co-vpb-simulation@psr2-yuv420:
    - shard-lnl:          NOTRUN -> [SKIP][42] ([Intel XE#8396]) +1 other test skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@kms_pm_dc@dc3co-vpb-simulation@psr2-yuv420.html

  * igt@kms_pm_dc@deep-pkgc:
    - shard-lnl:          NOTRUN -> [FAIL][43] ([Intel XE#2029] / [Intel XE#7395])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_pm_dc@deep-pkgc.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-lnl:          NOTRUN -> [SKIP][44] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][45] ([Intel XE#4608])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#4608] / [Intel XE#7304])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
    - shard-lnl:          NOTRUN -> [SKIP][47] ([Intel XE#2893] / [Intel XE#7304]) +4 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr@fbc-pr-no-drrs:
    - shard-lnl:          NOTRUN -> [SKIP][48] ([Intel XE#1406]) +2 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@kms_psr@fbc-pr-no-drrs.html

  * igt@kms_psr@fbc-psr2-primary-blt:
    - shard-lnl:          NOTRUN -> [SKIP][49] ([Intel XE#1406] / [Intel XE#7345])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_psr@fbc-psr2-primary-blt.html

  * igt@kms_psr@fbc-psr2-primary-blt@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][50] ([Intel XE#1406] / [Intel XE#4609] / [Intel XE#7345])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_psr@fbc-psr2-primary-blt@edp-1.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-lnl:          NOTRUN -> [SKIP][51] ([Intel XE#362] / [Intel XE#5848])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@kms_tiled_display@basic-test-pattern.html

  * igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all:
    - shard-lnl:          NOTRUN -> [SKIP][52] ([Intel XE#1091] / [Intel XE#2849])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html

  * igt@xe_compute_preempt@compute-preempt-many-vram-evict:
    - shard-lnl:          NOTRUN -> [SKIP][53] ([Intel XE#5191] / [Intel XE#7316] / [Intel XE#7346]) +1 other test skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@xe_compute_preempt@compute-preempt-many-vram-evict.html

  * igt@xe_evict@evict-beng-large-external-cm:
    - shard-lnl:          NOTRUN -> [SKIP][54] ([Intel XE#6540] / [Intel XE#688]) +10 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@xe_evict@evict-beng-large-external-cm.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [PASS][55] -> [INCOMPLETE][56] ([Intel XE#6321] / [Intel XE#8355])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5724-aeaac9b539af202c51c1d8419fa36261d864b390/shard-bmg-6/igt@xe_evict@evict-mixed-many-threads-small.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-bmg-2/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_balancer@many-virtual-userptr-invalidate-race:
    - shard-lnl:          NOTRUN -> [SKIP][57] ([Intel XE#7482]) +13 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@xe_exec_balancer@many-virtual-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-no-exec-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][58] ([Intel XE#1392]) +3 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@xe_exec_basic@multigpu-no-exec-userptr.html

  * igt@xe_exec_fault_mode@twice-multi-queue-invalid-fault:
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#8374]) +7 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@xe_exec_fault_mode@twice-multi-queue-invalid-fault.html

  * igt@xe_exec_multi_queue@many-execs-preempt-mode-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][60] ([Intel XE#8364]) +21 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@xe_exec_multi_queue@many-execs-preempt-mode-userptr.html

  * igt@xe_exec_reset@cm-multi-queue-gt-reset:
    - shard-lnl:          NOTRUN -> [SKIP][61] ([Intel XE#8369]) +1 other test skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@xe_exec_reset@cm-multi-queue-gt-reset.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-single-vma:
    - shard-lnl:          NOTRUN -> [SKIP][62] ([Intel XE#6196])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-single-vma.html

  * igt@xe_exec_threads@threads-multi-queue-fd-basic:
    - shard-lnl:          NOTRUN -> [SKIP][63] ([Intel XE#8378]) +4 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@xe_exec_threads@threads-multi-queue-fd-basic.html

  * igt@xe_mmap@vram:
    - shard-lnl:          NOTRUN -> [SKIP][64] ([Intel XE#1416])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@xe_mmap@vram.html

  * igt@xe_multigpu_svm@mgpu-atomic-op-conflict:
    - shard-lnl:          NOTRUN -> [SKIP][65] ([Intel XE#6964]) +1 other test skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@xe_multigpu_svm@mgpu-atomic-op-conflict.html

  * igt@xe_noexec_ping_pong@basic:
    - shard-lnl:          NOTRUN -> [SKIP][66] ([Intel XE#6259] / [Intel XE#7324] / [Intel XE#7406])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@xe_noexec_ping_pong@basic.html

  * igt@xe_page_reclaim@pde-vs-pd:
    - shard-lnl:          NOTRUN -> [SKIP][67] ([Intel XE#7793]) +1 other test skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@xe_page_reclaim@pde-vs-pd.html

  * igt@xe_pat@pat-index-xelp:
    - shard-lnl:          NOTRUN -> [SKIP][68] ([Intel XE#7590] / [Intel XE#977])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pm@d3cold-basic-exec:
    - shard-lnl:          NOTRUN -> [SKIP][69] ([Intel XE#2284] / [Intel XE#366] / [Intel XE#7370])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@xe_pm@d3cold-basic-exec.html

  * igt@xe_pm@s3-mocs:
    - shard-lnl:          NOTRUN -> [SKIP][70] ([Intel XE#584] / [Intel XE#7369])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@xe_pm@s3-mocs.html

  * igt@xe_pm@vram-d3cold-threshold:
    - shard-lnl:          NOTRUN -> [SKIP][71] ([Intel XE#579] / [Intel XE#7329] / [Intel XE#7456])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@xe_pm@vram-d3cold-threshold.html

  * igt@xe_prefetch_fault@prefetch-fault:
    - shard-lnl:          NOTRUN -> [SKIP][72] ([Intel XE#7599])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@xe_prefetch_fault@prefetch-fault.html

  * igt@xe_query@multigpu-query-oa-units:
    - shard-lnl:          NOTRUN -> [SKIP][73] ([Intel XE#944])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@xe_query@multigpu-query-oa-units.html

  * igt@xe_sriov_auto_provisioning@fair-allocation:
    - shard-lnl:          NOTRUN -> [SKIP][74] ([Intel XE#4130] / [Intel XE#7366]) +1 other test skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@xe_sriov_auto_provisioning@fair-allocation.html

  * igt@xe_sriov_flr@flr-each-isolation:
    - shard-lnl:          NOTRUN -> [SKIP][75] ([Intel XE#3342])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@xe_sriov_flr@flr-each-isolation.html

  * igt@xe_sriov_vfio@bind-unbind-vfs:
    - shard-lnl:          NOTRUN -> [SKIP][76] ([Intel XE#7724])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-3/igt@xe_sriov_vfio@bind-unbind-vfs.html

  * igt@xe_sriov_vram@vf-access-after-resize-up:
    - shard-lnl:          NOTRUN -> [SKIP][77] ([Intel XE#6376] / [Intel XE#7330] / [Intel XE#7422]) +1 other test skip
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-5/igt@xe_sriov_vram@vf-access-after-resize-up.html

  * igt@xe_vm@overcommit-nonfault-vram-no-lr:
    - shard-lnl:          NOTRUN -> [SKIP][78] ([Intel XE#7892])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@xe_vm@overcommit-nonfault-vram-no-lr.html

  
#### Possible fixes ####

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp2:
    - shard-bmg:          [FAIL][79] ([Intel XE#3321]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5724-aeaac9b539af202c51c1d8419fa36261d864b390/shard-bmg-6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp2.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-bmg-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp2.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          [FAIL][81] ([Intel XE#301]) -> [PASS][82]
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5724-aeaac9b539af202c51c1d8419fa36261d864b390/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  
#### Warnings ####

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [FAIL][83] ([Intel XE#301]) -> [FAIL][84] ([Intel XE#301] / [Intel XE#3149])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5724-aeaac9b539af202c51c1d8419fa36261d864b390/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [FAIL][85] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][86] ([Intel XE#2426] / [Intel XE#5848])
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5724-aeaac9b539af202c51c1d8419fa36261d864b390/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern.html

  * igt@xe_wedged@basic-wedged:
    - shard-bmg:          [DMESG-WARN][87] ([Intel XE#8963]) -> [ABORT][88] ([Intel XE#8591] / [Intel XE#8963])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5724-aeaac9b539af202c51c1d8419fa36261d864b390/shard-bmg-5/igt@xe_wedged@basic-wedged.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/shard-bmg-4/igt@xe_wedged@basic-wedged.html

  
  [Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1416
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1428
  [Intel XE#1467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1467
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2029]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2029
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
  [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/352
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#5191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5191
  [Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
  [Intel XE#6196]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6196
  [Intel XE#6259]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6259
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#701]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/701
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7316
  [Intel XE#7324]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7324
  [Intel XE#7329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7329
  [Intel XE#7330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7330
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
  [Intel XE#7346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7346
  [Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7359]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7359
  [Intel XE#7366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7366
  [Intel XE#7367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7367
  [Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7387
  [Intel XE#7395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7395
  [Intel XE#7406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7406
  [Intel XE#7422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7422
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
  [Intel XE#7456]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7456
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7724
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7892]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7892
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8591
  [Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977


Build changes
-------------

  * Linux: xe-5724-aeaac9b539af202c51c1d8419fa36261d864b390 -> xe-pw-172689v3

  IGT_9090: 9090
  xe-5724-aeaac9b539af202c51c1d8419fa36261d864b390: aeaac9b539af202c51c1d8419fa36261d864b390
  xe-pw-172689v3: 172689v3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172689v3/index.html

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Re: [PATCH v3 0/5] drm/xe/hwmon: Update hwmon thermal mailbox handling

[Poosa, Karthik]

On 10-09-2026 23:57, Karthik Poosa wrote:
> This series adds CRI-specific temperature sensor handling to the Xe
> hwmon implementation.
>
> CRI platforms may report unavailable temperature sensors and support
> a variable number of VRAM temperature channels depending on platform
> configuration. This series adds the required sensor presence checks and
> uses platform-reported thermal configuration data to expose only valid
> temperature-related hwmon attributes.
>
> The series also corrects the telemetry group selection used for memory
> controller temperature reporting.
>
> v2:
>   - Address review comments from Sashiko, Badal and Raag.
>   - Enable IEEE 754 temperature decoding for MMIO temperature registers.
>    - Split sensor validity check into mailbox vs MMIO handling; add
>      is_temp_available() / is_temp_is_visible().
>   - Temporarily disable memory controller and PCIe temperatures on CRI.
>
> v3:
>    - Detect unavailable temperature sensors: rephrase a debug log.
>    - Use VRAM temperature sensor count from thermal config on CRI: address
>      review comments from sashiko-bot@kernel.org and Rodrigo.
>    - Decode CRI temperature registers as IEEE-754: reject temperatures that
>      overflow long on 32-bit systems.
>
> Karthik Poosa (5):
>    drm/xe/hwmon: Detect unavailable temperature sensors
>    drm/xe/hwmon: Use VRAM temperature sensor count from thermal config on
>      CRI
>    drm/xe/hwmon: Fix memory controller thermal data handling
>    drm/xe/hwmon: Decode CRI temperature registers as IEEE-754
>    drm/xe/hwmon: Disable memory controller and PCIe temperatures on CRI
>
>   drivers/gpu/drm/xe/xe_device_types.h |   4 +
>   drivers/gpu/drm/xe/xe_hwmon.c        | 322 ++++++++++++++++++++++-----
>   drivers/gpu/drm/xe/xe_pci.c          |   2 +
>   drivers/gpu/drm/xe/xe_pci_types.h    |   1 +
>   drivers/gpu/drm/xe/xe_pcode_api.h    |   1 +
>   5 files changed, 273 insertions(+), 57 deletions(-)

Next version of this patch series is at 
https://patchwork.freedesktop.org/series/174898/#rev2