From: franhsutw@gmail.com
To: "'Benjamin Fair'" <benjaminfair@google.com>
Cc: "'Joel Stanley'" <joel@jms.id.au>,
"'OpenBMC Maillist'" <openbmc@lists.ozlabs.org>
Subject: RE: [PATCH dev-5.1 v4 1/4] ARM: dts: nuvoton: Add Quanta GSJ BMC Device Tree.
Date: Fri, 31 May 2019 21:34:06 +0800 [thread overview]
Message-ID: <095301d517b5$9296e660$b7c4b320$@gmail.com> (raw)
In-Reply-To: <CADKL2t7N1dLHCjnrWD61KsdD1CmQm3AK2HhxoXvcVAqVG7rE_g@mail.gmail.com>
HI Benjamin,
Thanks for your comments, I had sent out the [PATCH dev-5.1 v5] for reviewing.
Fran
> -----Original Message-----
> From: Benjamin Fair <benjaminfair@google.com>
> Sent: Friday, May 31, 2019 2:16 AM
> To: Fran Hsu <franhsutw@gmail.com>
> Cc: Joel Stanley <joel@jms.id.au>; OpenBMC Maillist
> <openbmc@lists.ozlabs.org>
> Subject: Re: [PATCH dev-5.1 v4 1/4] ARM: dts: nuvoton: Add Quanta GSJ BMC
> Device Tree.
>
> Hi Fran,
>
> This is looking good. Just a few small changes.
>
> On Thu, May 16, 2019 at 4:14 AM Fran Hsu <franhsutw@gmail.com> wrote:
> >
> > Quanta GSJ BMC uses the Nuvoton NPCM730 soc.
> > Commit the Quanta GSJ device tree for Arm dts.
> > Also adds an entry of Quanta GSJ device tree file in Makefile.
> > This is the part-1 of nuvoton-npcm730-gsj.dts.
> >
> > Including features:
> > 1. Image partitions
> > 2. pwm fan controller
> > 3. usb device
> > 4. serial port
> > 5. fiu
> >
> > Tested:
> > Build Quanta GSJ image and load on the GSJ BMC module.
> > Ensure that BMC boots to console successful.
> >
> > Signed-off-by: Fran Hsu <franhsutw@gmail.com>
> > ---
> > arch/arm/boot/dts/Makefile | 3 +-
> > arch/arm/boot/dts/nuvoton-npcm730-gsj.dts | 413
> > ++++++++++++++++++++++
> > 2 files changed, 415 insertions(+), 1 deletion(-) create mode 100644
> > arch/arm/boot/dts/nuvoton-npcm730-gsj.dts
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 127616746486..f55eedcdfec9 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -321,7 +321,8 @@ dtb-$(CONFIG_ARCH_LPC32XX) += \
> > lpc3250-ea3250.dtb \
> > lpc3250-phy3250.dtb
> > dtb-$(CONFIG_ARCH_NPCM7XX) += \
> > - nuvoton-npcm750-evb.dtb
> > + nuvoton-npcm750-evb.dtb \
> > + nuvoton-npcm730-gsj.dtb
> > dtb-$(CONFIG_MACH_MESON6) += \
> > meson6-atv1200.dtb
> > dtb-$(CONFIG_MACH_MESON8) += \
> > diff --git a/arch/arm/boot/dts/nuvoton-npcm730-gsj.dts
> > b/arch/arm/boot/dts/nuvoton-npcm730-gsj.dts
> > new file mode 100644
> > index 000000000000..7cac83c6566b
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/nuvoton-npcm730-gsj.dts
> > @@ -0,0 +1,413 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +// Copyright (c) 2019 Quanta Computer lnc. Fran.Hsu@quantatw.com
> > +
> > +/dts-v1/;
> > +#include "nuvoton-npcm730.dtsi"
> > +#include "nuvoton-npcm730-gsj-gpio.dtsi"
>
> These include files don't exist yet. Make sure to order your patches so that the
> kernel can build at each commit.
>
> > +/ {
> > + model = "Quanta GSJ Board (Device Tree v11)";
> > + compatible = "nuvoton,npcm750";
> > +
> > + aliases {
> > + ethernet0 = &emc0;
> > + ethernet1 = &gmac0;
> > + serial3 = &serial3;
> > + udc9 = &udc9;
> > + i2c0 = &i2c0;
> > + i2c1 = &i2c1;
> > + i2c2 = &i2c2;
> > + i2c3 = &i2c3;
> > + i2c4 = &i2c4;
> > + i2c5 = &i2c5;
> > + i2c6 = &i2c6;
> > + i2c7 = &i2c7;
> > + i2c8 = &i2c8;
> > + i2c9 = &i2c9;
> > + i2c10 = &i2c10;
> > + i2c11 = &i2c11;
> > + i2c12 = &i2c12;
> > + i2c13 = &i2c13;
> > + i2c14 = &i2c14;
> > + i2c15 = &i2c15;
> > + fiu0 = &fiu0;
> > + };
> > +
> > + chosen {
> > + stdout-path = &serial3;
> > + };
> > +
> > + memory {
> > + reg = <0 0x40000000>;
> > + };
> > +
> > + ahb {
> > + gmac0: eth@f0802000 {
> > + phy-mode = "rgmii-id";
> > + status = "okay";
> > + };
> > +
> > + mc: memory-controller@f0824000 {
> > + compatible = "nuvoton,npcm7xx-sdram-edac";
> > + reg = <0xf0824000 0x1000>;
> > + interrupts = <GIC_SPI 25
> IRQ_TYPE_LEVEL_HIGH>;
> > + };
> > +
> > + emc0: eth@f0825000 {
> > + use-ncsi;
> > + status = "okay";
> > + };
> > +
> > + ehci1: usb@f0806000 {
> > + status = "okay";
> > + };
> > +
> > + ohci1: ohci@f0807000 {
> > + status = "okay";
> > + };
> > +
> > + udc9:udc@f0839000 {
> > + status = "okay";
> > + };
> > +
> > + aes:aes@f0858000 {
> > + status = "okay";
> > + };
> > +
> > + sha:sha@f085a000 {
> > + status = "okay";
> > + };
> > +
> > + fiu0: fiu@fb000000 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&spi0cs1_pins>;
> > + status = "okay";
> > + spi-nor@0 {
> > + compatible = "jedec,spi-nor";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + reg = <0>;
> > + spi-rx-bus-width = <2>;
> > + partitions@80000000 {
> > + compatible =
> "fixed-partitions";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + bmc@0{
> > + label = "bmc";
> > + reg = <0x000000
> 0x2000000>;
> > + };
> > + u-boot@0 {
> > + label = "u-boot";
> > + reg = <0x0000000
> 0x80000>;
> > + read-only;
> > + };
> > + u-boot-env@100000{
> > + label =
> "u-boot-env";
> > + reg =
> <0x00100000 0x40000>;
> > + };
> > + kernel@200000 {
> > + label = "kernel";
> > + reg = <0x0200000
> 0x600000>;
> > + };
> > + rofs@800000 {
> > + label = "rofs";
> > + reg = <0x800000
> 0x1400000>;
> > + };
> > + rwfs@1c00000 {
> > + label = "rwfs";
> > + reg = <0x1c00000
> 0x300000>;
> > + };
> > + reserved@1f00000 {
> > + label =
> "reserved";
> > + reg = <0x1f00000
> 0x100000>;
> > + };
> > + };
> > + };
> > + };
> > +
> > + pcimbox: pcimbox@f0848000 {
> > + status = "okay";
> > + };
> > +
> > + apb {
> > +
> > + watchdog1: watchdog@901C {
> > + status = "okay";
> > + };
> > +
> > + rng: rng@b000 {
> > + status = "okay";
> > + };
> > +
> > + serial0: serial@1000 {
> > + status = "okay";
> > + };
> > +
> > + serial1: serial@2000 {
> > + status = "okay";
> > + };
> > +
> > + serial2: serial@3000 {
> > + status = "okay";
> > + };
> > +
> > + serial3: serial@4000 {
> > + status = "okay";
> > + };
> > +
> > + adc: adc@c000 {
> > + status = "okay";
> > + };
> > + otp:otp@189000 {
> > + status = "okay";
> > + };
> > +
> > + i2c0: i2c@80000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "disabled";
> > + };
> > +
> > + i2c1: i2c@81000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "okay";
> > + lm75@5c {
> > + compatible =
> "maxim,max31725";
> > + reg = <0x5c>;
> > + status = "okay";
> > + };
> > + };
> > +
> > + i2c2: i2c@82000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "okay";
> > + lm75@5c {
> > + compatible =
> "maxim,max31725";
> > + reg = <0x5c>;
> > + status = "okay";
> > + };
> > + };
> > +
> > + i2c3: i2c@83000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "okay";
> > + lm75@5c {
> > + compatible =
> "maxim,max31725";
> > + reg = <0x5c>;
> > + status = "okay";
> > + };
> > + };
> > +
> > + i2c4: i2c@84000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "okay";
> > + lm75@5c {
> > + compatible =
> "maxim,max31725";
> > + reg = <0x5c>;
> > + status = "okay";
> > + };
> > + };
>
> Please be consistent with newlines between blocks as it makes it easier to
> read.
>
> > + i2c5: i2c@85000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "disabled";
> > + };
> > + i2c6: i2c@86000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "disabled";
> > + };
> > +
> > + i2c7: i2c@87000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "disabled";
> > + };
> > +
> > + i2c8: i2c@88000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "okay";
> > + };
> > +
> > + i2c9: i2c@89000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "okay";
> > + eeprom@55 {
> > + compatible =
> "atmel,24c64";
> > + reg = <0x55>;
> > + };
> > + };
> > +
> > + i2c10: i2c@8a000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "okay";
> > + eeprom@55 {
> > + compatible =
> "atmel,24c64";
> > + reg = <0x55>;
> > + };
> > + };
> > +
> > + i2c11: i2c@8b000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "okay";
> > +
> > + /* P12V Quarter Brick DC/DC Power
> Module Q54SH12050 @60 */
> > + power-brick@36 {
> > + compatible =
> "delta,dps800";
> > + reg = <0x36>;
> > + };
> > +
> > + hotswap@15 {
> > + compatible = "ti,lm5066i";
> > + reg = <0x15>;
> > + };
> > + };
> > +
> > + i2c12: i2c@8c000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "okay";
> > + ucd90160@6b {
> > + compatible = "ti,ucd90160";
> > + reg = <0x6b>;
> > + };
> > + };
> > +
> > + i2c13: i2c@8d000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "okay";
> > +
> > + ipmb@40000010 {
> > + compatible =
> "slave-mqueue";
> > + reg = <0x40000010>;
> > + status = "okay";
> > + };
> > + };
> > +
> > + i2c14: i2c@8e000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "okay";
> > +
> > + ipmb@40000012 {
> > + compatible =
> "slave-mqueue";
> > + reg = <0x40000012>;
> > + status = "okay";
> > + };
> > + };
> > +
> > + i2c15: i2c@8f000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + bus-frequency = <100000>;
> > + status = "okay";
> > +
> > + i2c-switch@75 {
> > + compatible =
> "nxp,pca9548";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x75>;
> > + i2c-mux-idle-disconnect;
> > +
> > + i2c_u20: i2c@0 {
> > + #address-cells =
> <1>;
> > + #size-cells = <0>;
> > + reg = <0>;
> > + };
> > +
> > + i2c_u21: i2c@1 {
> > + #address-cells =
> <1>;
> > + #size-cells = <0>;
> > + reg = <1>;
> > + };
> > +
> > + i2c_u22: i2c@2 {
> > + #address-cells =
> <1>;
> > + #size-cells = <0>;
> > + reg = <2>;
> > + };
> > +
> > + i2c_u23: i2c@3 {
> > + #address-cells =
> <1>;
> > + #size-cells = <0>;
> > + reg = <3>;
> > + };
> > +
> > + i2c_u24: i2c@4 {
> > + #address-cells =
> <1>;
> > + #size-cells = <0>;
> > + reg = <4>;
> > + };
> > +
> > + i2c_u25: i2c@5 {
> > + #address-cells =
> <1>;
> > + #size-cells = <0>;
> > + reg = <5>;
> > + };
> > +
> > + i2c_u26: i2c@6 {
> > + #address-cells =
> <1>;
> > + #size-cells = <0>;
> > + reg = <6>;
> > + };
> > +
> > + i2c_u27: i2c@7 {
> > + #address-cells =
> <1>;
> > + #size-cells = <0>;
> > + reg = <7>;
> > + };
> > + };
> > + };
> > +
> > + pwm_fan:pwm-fan-controller@103000 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pwm0_pins
> &pwm1_pins &pwm2_pins
> > + &fanin0_pins
> &fanin1_pins
> > + &fanin2_pins
> &fanin3_pins
> > + &fanin4_pins
> &fanin5_pins>;
> > + status = "okay";
> > + fan@0 {
> > + reg = <0x00>;
> > + fan-tach-ch = /bits/ 8 <0x00
> 0x01>;
> > + cooling-levels = <127 255>;
> > + };
> > + fan@1 {
> > + reg = <0x01>;
> > + fan-tach-ch = /bits/ 8 <0x02
> 0x03>;
> > + cooling-levels = /bits/ 8
> <127 255>;
> > + };
> > + fan@2 {
> > + reg = <0x02>;
> > + fan-tach-ch = /bits/ 8 <0x04
> 0x05>;
> > + cooling-levels = /bits/ 8
> <127 255>;
> > + };
> > + };
> > +
> > + };
> > + };
> > +
> > +
> > +};
> > --
> > 2.21.0
> >
prev parent reply other threads:[~2019-05-31 13:34 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-16 11:11 [PATCH dev-5.1 v4 1/4] ARM: dts: nuvoton: Add Quanta GSJ BMC Device Tree Fran Hsu
2019-05-16 11:11 ` [PATCH dev-5.1 v4 2/4] " Fran Hsu
2019-05-30 18:19 ` Benjamin Fair
2019-05-16 11:11 ` [PATCH dev-5.1 v4 3/4] ARM: dts: nuvoton: Add Quanta GSJ BMC pinctrl file Fran Hsu
2019-05-16 11:12 ` [PATCH dev-5.1 v4 4/4] ARM: dts: nuvoton: Add NPCM730 common device tree include file Fran Hsu
2019-05-30 18:15 ` [PATCH dev-5.1 v4 1/4] ARM: dts: nuvoton: Add Quanta GSJ BMC Device Tree Benjamin Fair
2019-05-31 13:34 ` franhsutw [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='095301d517b5$9296e660$b7c4b320$@gmail.com' \
--to=franhsutw@gmail.com \
--cc=benjaminfair@google.com \
--cc=joel@jms.id.au \
--cc=openbmc@lists.ozlabs.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.