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From: "Christian König" <ckoenig.leichtzumerken@gmail.com>
To: Samuel Zhang <guoqing.zhang@amd.com>, amd-gfx@lists.freedesktop.org
Cc: victor.zhao@amd.com, haijun.chang@amd.com, emily.deng@amd.com
Subject: Re: [PATCH 6/6] drm/amdgpu: fix fence fallback timer expired error
Date: Wed, 16 Apr 2025 15:54:39 +0200	[thread overview]
Message-ID: <0ca1a883-4ddd-4bc5-8d58-9865a6d497b5@gmail.com> (raw)
In-Reply-To: <20250414104655.336497-7-guoqing.zhang@amd.com>

Am 14.04.25 um 12:46 schrieb Samuel Zhang:
> IH is not working after switching a new gpu index for the first time.
> IH handler function need to be re-registered with kernel after switching
> to new gpu index.

Why?

Christian.

>
> Signed-off-by: Samuel Zhang <guoqing.zhang@amd.com>
> Change-Id: Idece1c8fce24032fd08f5a8b6ac23793c51e56dd
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c |  7 +++++--
>  drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h |  1 +
>  drivers/gpu/drm/amd/amdgpu/vega20_ih.c  | 18 ++++++++++++++++--
>  3 files changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> index 19ce4da285e8..2292245a0c5d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> @@ -326,7 +326,7 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
>  	return r;
>  }
>  
> -void amdgpu_irq_fini_hw(struct amdgpu_device *adev)
> +void amdgpu_irq_uninstall(struct amdgpu_device *adev)
>  {
>  	if (adev->irq.installed) {
>  		free_irq(adev->irq.irq, adev_to_drm(adev));
> @@ -334,7 +334,10 @@ void amdgpu_irq_fini_hw(struct amdgpu_device *adev)
>  		if (adev->irq.msi_enabled)
>  			pci_free_irq_vectors(adev->pdev);
>  	}
> -
> +}
> +void amdgpu_irq_fini_hw(struct amdgpu_device *adev)
> +{
> +	amdgpu_irq_uninstall(adev);
>  	amdgpu_ih_ring_fini(adev, &adev->irq.ih_soft);
>  	amdgpu_ih_ring_fini(adev, &adev->irq.ih);
>  	amdgpu_ih_ring_fini(adev, &adev->irq.ih1);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
> index 04c0b4fa17a4..c6e6681b4f71 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
> @@ -123,6 +123,7 @@ extern const int node_id_to_phys_map[NODEID_MAX];
>  void amdgpu_irq_disable_all(struct amdgpu_device *adev);
>  
>  int amdgpu_irq_init(struct amdgpu_device *adev);
> +void amdgpu_irq_uninstall(struct amdgpu_device *adev);
>  void amdgpu_irq_fini_sw(struct amdgpu_device *adev);
>  void amdgpu_irq_fini_hw(struct amdgpu_device *adev);
>  int amdgpu_irq_add_id(struct amdgpu_device *adev,
> diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
> index faa0dd75dd6d..ef996505e4dc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
> @@ -643,12 +643,26 @@ static int vega20_ih_hw_fini(struct amdgpu_ip_block *ip_block)
>  
>  static int vega20_ih_suspend(struct amdgpu_ip_block *ip_block)
>  {
> -	return vega20_ih_hw_fini(ip_block);
> +	struct amdgpu_device *adev = ip_block->adev;
> +	int r = 0;
> +
> +	r = vega20_ih_hw_fini(ip_block);
> +	amdgpu_irq_uninstall(adev);
> +	return r;
>  }
>  
>  static int vega20_ih_resume(struct amdgpu_ip_block *ip_block)
>  {
> -	return vega20_ih_hw_init(ip_block);
> +	struct amdgpu_device *adev = ip_block->adev;
> +	int r = 0;
> +
> +	r = amdgpu_irq_init(adev);
> +	if (r) {
> +		dev_err(adev->dev, "amdgpu_irq_init failed in %s, %d\n", __func__, r);
> +		return r;
> +	}
> +	r = vega20_ih_hw_init(ip_block);
> +	return r;
>  }
>  
>  static bool vega20_ih_is_idle(struct amdgpu_ip_block *ip_block)


  reply	other threads:[~2025-04-16 13:54 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-14 10:46 [PATCH 0/6] enable switching to new gpu index for hibernate on SRIOV Samuel Zhang
2025-04-14 10:46 ` [PATCH 1/6] drm/amdgpu: update XGMI physical node id and GMC configs on resume Samuel Zhang
2025-04-16 13:40   ` Christian König
2025-04-14 10:46 ` [PATCH 2/6] drm/amdgpu: update cached GPU addresses for PSP and ucode Samuel Zhang
2025-04-14 10:46 ` [PATCH 3/6] drm/amdgpu: update cached GPU addresses for SMU Samuel Zhang
2025-04-14 10:46 ` [PATCH 4/6] drm/amdgpu: enable pdb0 for hibernation on SRIOV Samuel Zhang
2025-04-16 13:52   ` Christian König
2025-04-18  6:26     ` Zhang, GuoQing (Sam)
2025-04-22 10:38       ` Zhang, GuoQing (Sam)
2025-04-23  6:39         ` Liu, Monk
2025-04-23  7:25     ` Zhang, GuoQing (Sam)
2025-04-24  3:38       ` Zhang, GuoQing (Sam)
2025-04-28 10:13         ` Zhang, Owen(SRDC)
2025-04-28 11:29         ` Christian König
2025-04-30 10:30           ` Zhang, GuoQing (Sam)
2025-04-14 10:46 ` [PATCH 5/6] drm/amdgpu: fix sdma ring test fail when resume from hibernation Samuel Zhang
2025-04-16 13:53   ` Christian König
2025-04-14 10:46 ` [PATCH 6/6] drm/amdgpu: fix fence fallback timer expired error Samuel Zhang
2025-04-16 13:54   ` Christian König [this message]
2025-04-23  6:58     ` Zhang, GuoQing (Sam)
2025-04-24  3:38       ` Zhang, GuoQing (Sam)
2025-04-28 10:12         ` Zhang, Owen(SRDC)
2025-04-28 12:24         ` Christian König
2025-04-29  2:43           ` Chang, HaiJun
2025-05-08  6:53             ` Zhang, GuoQing (Sam)
2025-05-08 10:22               ` Zhang, GuoQing (Sam)
2025-04-16 10:42 ` [PATCH 0/6] enable switching to new gpu index for hibernate on SRIOV Zhang, GuoQing (Sam)

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