All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Christian König" <christian.koenig@amd.com>
To: "Zhang, GuoQing (Sam)" <GuoQing.Zhang@amd.com>,
	"Christian König" <ckoenig.leichtzumerken@gmail.com>,
	"amd-gfx@lists.freedesktop.org" <amd-gfx@lists.freedesktop.org>,
	"Deucher, Alexander" <Alexander.Deucher@amd.com>
Cc: "Zhao, Victor" <Victor.Zhao@amd.com>,
	"Chang, HaiJun" <HaiJun.Chang@amd.com>,
	"Deng, Emily" <Emily.Deng@amd.com>,
	"Zhang, Owen(SRDC)" <Owen.Zhang2@amd.com>
Subject: Re: [PATCH 4/6] drm/amdgpu: enable pdb0 for hibernation on SRIOV
Date: Mon, 28 Apr 2025 13:29:53 +0200	[thread overview]
Message-ID: <bb36cfc2-fbbc-4128-9ebf-dd574c61d950@amd.com> (raw)
In-Reply-To: <DM4PR12MB59373CD6217D0B56CBFA09D1E5852@DM4PR12MB5937.namprd12.prod.outlook.com>

On 4/24/25 05:38, Zhang, GuoQing (Sam) wrote:
> Hi Christian,
> 
> Thank you for the review and the feedback.I will update the patch according to 
> your feedback.
> 
> Please see my 2 inline comments below.

Please make sure to always CC my work mail address, otherwise I will only take a look the next time I work through the mailing lists.
> 
>> > index d90e9daf5a50..83a3444c69d9 100644
> 
>> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> 
>> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> 
>> > @@ -287,8 +287,14 @@ int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
> 
>> >                goto error_unpin;
> 
>> >        }
> 
>> >  
> 
>> > -     if (gpu_addr)
> 
>> > +     if (gpu_addr) {
> 
>> >                *gpu_addr = amdgpu_bo_gpu_offset(*bo_ptr);
> 
>> > +             if (!adev->gmc.xgmi.connected_to_cpu && adev->gmc.enable_pdb0) {
> 
>> > +                     if ((*bo_ptr)->tbo.resource->mem_type == TTM_PL_VRAM) {
> 
>> > +                             *gpu_addr -= amdgpu_ttm_domain_start(adev, TTM_PL_VRAM);
> 
>> > +                     }
> 
>> > +             }
> 
>> > +     }
> 
>> 
> 
>> Please NAK to that approach here. The GPU offset should still point into the mapped VRAM.
> 
> This change is to change to the default GPU address from FB aperture type to 
> pdb0 type in this centralized place so that I don’t need to change every 
> callsite of amdgpu_bo_create_reserved().
> 
> Could you suggest a better approach if this approach is not acceptable?


The whole code is completely superflous. When PDB0 is used the vram_start is adjusted and you don't need to do anything here.

See function amdgpu_gmc_sysvm_location(). You probably need to adjust that to have a static setup instead of using the XGMI node infos.


>> > @@ -1719,6 +1723,14 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
> 
>> >  {
> 
>> >        u64 base = adev->mmhub.funcs->get_fb_location(adev);
> 
>> >  
> 
>> > +     if (adev->gmc.xgmi.connected_to_cpu || adev->gmc.enable_pdb0) {
> 
>> > +             adev->gmc.vmid0_page_table_depth = 1;
> 
>> > +             adev->gmc.vmid0_page_table_block_size = 12;
> 
>> > +     } else {
> 
>> > +             adev->gmc.vmid0_page_table_depth = 0;
> 
>> > +             adev->gmc.vmid0_page_table_block_size = 0;
> 
>> > +     }
> 
>> > +
> 
>> 
> 
>> What is the justification to moving that stuff around?
> 
> vmid0_page_table_block_size is used in new code in amdgpu_gmc_sysvm_location(). 
> See the call sequence below.
> 
> gmc_v9_0_sw_init
> 
> - gmc_v9_0_mc_init
> 
>                  - gmc_v9_0_vram_gtt_location,
> 
>                                  - vmid0_page_table_block_size = 12, **new 
> location**
> 
>                                  - amdgpu_gmc_sysvm_location
> 
>                                                  - use 
> **vmid0_page_table_block_size**
> 
> - gmc_v9_0_gart_init,
> 
>                  - assign vmid0_page_table_block_size, **old location**


That is noteven remotely corect.

See the code in gmc_v9_0_vram_gtt_location(). You use amdgpu_gmc_sysvm_location() when PDB0 is allocted and you use gmc_v9_0_vram_gtt_location() when it isn't.

But adjusting this function here doesn't make any sense at all.

Regards,
Christian.


  parent reply	other threads:[~2025-04-28 11:30 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-14 10:46 [PATCH 0/6] enable switching to new gpu index for hibernate on SRIOV Samuel Zhang
2025-04-14 10:46 ` [PATCH 1/6] drm/amdgpu: update XGMI physical node id and GMC configs on resume Samuel Zhang
2025-04-16 13:40   ` Christian König
2025-04-14 10:46 ` [PATCH 2/6] drm/amdgpu: update cached GPU addresses for PSP and ucode Samuel Zhang
2025-04-14 10:46 ` [PATCH 3/6] drm/amdgpu: update cached GPU addresses for SMU Samuel Zhang
2025-04-14 10:46 ` [PATCH 4/6] drm/amdgpu: enable pdb0 for hibernation on SRIOV Samuel Zhang
2025-04-16 13:52   ` Christian König
2025-04-18  6:26     ` Zhang, GuoQing (Sam)
2025-04-22 10:38       ` Zhang, GuoQing (Sam)
2025-04-23  6:39         ` Liu, Monk
2025-04-23  7:25     ` Zhang, GuoQing (Sam)
2025-04-24  3:38       ` Zhang, GuoQing (Sam)
2025-04-28 10:13         ` Zhang, Owen(SRDC)
2025-04-28 11:29         ` Christian König [this message]
2025-04-30 10:30           ` Zhang, GuoQing (Sam)
2025-04-14 10:46 ` [PATCH 5/6] drm/amdgpu: fix sdma ring test fail when resume from hibernation Samuel Zhang
2025-04-16 13:53   ` Christian König
2025-04-14 10:46 ` [PATCH 6/6] drm/amdgpu: fix fence fallback timer expired error Samuel Zhang
2025-04-16 13:54   ` Christian König
2025-04-23  6:58     ` Zhang, GuoQing (Sam)
2025-04-24  3:38       ` Zhang, GuoQing (Sam)
2025-04-28 10:12         ` Zhang, Owen(SRDC)
2025-04-28 12:24         ` Christian König
2025-04-29  2:43           ` Chang, HaiJun
2025-05-08  6:53             ` Zhang, GuoQing (Sam)
2025-05-08 10:22               ` Zhang, GuoQing (Sam)
2025-04-16 10:42 ` [PATCH 0/6] enable switching to new gpu index for hibernate on SRIOV Zhang, GuoQing (Sam)

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=bb36cfc2-fbbc-4128-9ebf-dd574c61d950@amd.com \
    --to=christian.koenig@amd.com \
    --cc=Alexander.Deucher@amd.com \
    --cc=Emily.Deng@amd.com \
    --cc=GuoQing.Zhang@amd.com \
    --cc=HaiJun.Chang@amd.com \
    --cc=Owen.Zhang2@amd.com \
    --cc=Victor.Zhao@amd.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=ckoenig.leichtzumerken@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.