All of lore.kernel.org
 help / color / mirror / Atom feed
From: Shiju Jose <shiju.jose@huawei.com>
To: Jonathan Cameron <jonathan.cameron@huawei.com>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
	"linux-cxl@vger.kernel.org" <linux-cxl@vger.kernel.org>,
	"mchehab@kernel.org" <mchehab@kernel.org>,
	"dave.jiang@intel.com" <dave.jiang@intel.com>,
	"dan.j.williams@intel.com" <dan.j.williams@intel.com>,
	"alison.schofield@intel.com" <alison.schofield@intel.com>,
	"nifan.cxl@gmail.com" <nifan.cxl@gmail.com>,
	"vishal.l.verma@intel.com" <vishal.l.verma@intel.com>,
	"ira.weiny@intel.com" <ira.weiny@intel.com>,
	"dave@stgolabs.net" <dave@stgolabs.net>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Linuxarm <linuxarm@huawei.com>,
	tanxiaofei <tanxiaofei@huawei.com>,
	"Zengtao (B)" <prime.zeng@hisilicon.com>
Subject: RE: [PATCH 13/13] rasdaemon: ras-mc-ctl: Update logging of CXL memory module data to align with CXL spec rev 3.1
Date: Fri, 22 Nov 2024 10:41:14 +0000	[thread overview]
Message-ID: <0fbde50ced8a478aaa4aabd04cb7cb8a@huawei.com> (raw)
In-Reply-To: <20241121153848.0000079a@huawei.com>

Hi Jonathan,

>-----Original Message-----
>From: Jonathan Cameron <jonathan.cameron@huawei.com>
>Sent: 21 November 2024 15:39
>To: Shiju Jose <shiju.jose@huawei.com>
>Cc: linux-edac@vger.kernel.org; linux-cxl@vger.kernel.org;
>mchehab@kernel.org; dave.jiang@intel.com; dan.j.williams@intel.com;
>alison.schofield@intel.com; nifan.cxl@gmail.com; vishal.l.verma@intel.com;
>ira.weiny@intel.com; dave@stgolabs.net; linux-kernel@vger.kernel.org;
>Linuxarm <linuxarm@huawei.com>; tanxiaofei <tanxiaofei@huawei.com>;
>Zengtao (B) <prime.zeng@hisilicon.com>
>Subject: Re: [PATCH 13/13] rasdaemon: ras-mc-ctl: Update logging of CXL
>memory module data to align with CXL spec rev 3.1
>
>On Wed, 20 Nov 2024 09:59:23 +0000
><shiju.jose@huawei.com> wrote:
>
>> From: Shiju Jose <shiju.jose@huawei.com>
>>
>> CXL spec 3.1 section 8.2.9.2.1.3 Table 8-47, Memory Module Event
>> Record has updated with following new fields and new info for Device
>> Event Type and Device Health Information fields.
>> 1. Validity Flags
>> 2. Component Identifier
>> 3. Device Event Sub-Type
>>
>> This update modifies ras-mc-ctl to parse and log CXL memory module
>> event data stored in the RAS SQLite database table, reflecting the
>> specification changes introduced in revision 3.1.
>>
>> Example output,
>>
>> ./util/ras-mc-ctl --errors
>> ...
>> CXL memory module events:
>> 1 2024-11-20 00:22:33 +0000 error: memdev=mem0, host=0000:0f:00.0,
>> serial=0x3, \ log=Fatal,
>> hdr_uuid=fe927475-dd59-4339-a586-79bab113b774, hdr_flags=0x1, , \
>> hdr_handle=0x1, hdr_related_handle=0x0, hdr_timestamp=1970-01-01
>> 00:04:38 +0000, \ hdr_length=128, hdr_maint_op_class=0,
>> hdr_maint_op_sub_class=1, \
>> event_type: Temperature Change, event_sub_type: Unsupported Config
>> Data, \
>> health_status: 'MAINTENANCE_NEEDED' , 'REPLACEMENT_NEEDED' , \
>> media_status: All Data Loss in Event of Power Loss, life_used=8, \
>> dirty_shutdown_cnt=33, cor_vol_err_cnt=25, cor_per_err_cnt=45, \
>> device_temp=3, add_status=3 \
>> component_id:02 74 c5 08 9a 1a 0b fc d2 7e 2f 31 9b 3c 81 4d \
>> pldm_entity_id:00 00 00 00 00 00 pldm_resource_id:fc d2 7e 2f ...
>>
>> Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
>Feels like there is a lot of duplication in here, but you aren't really making it any
>worse and maybe it is hard to reduce it.
>
ras-mc-ctl is a tool(script), used offline, to read, decode and print  the error event's data stored
by rasdaemon into the SQLite data base. Thus logging here is similar to those done in the rasdaemon.

>Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Thanks,
Shiju

      reply	other threads:[~2024-11-22 10:41 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-20  9:59 [PATCH 00/13] rasdaemon: cxl: Update CXL event logging and recording to CXL spec rev 3.1 shiju.jose
2024-11-20  9:59 ` [PATCH 01/13] rasdaemon: cxl: Fix logging of memory event type of DRAM trace event shiju.jose
2024-11-21 15:11   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 02/13] rasdaemon: cxl: Fix mismatch in region field's name with kernel " shiju.jose
2024-11-21 15:12   ` Jonathan Cameron
2024-11-22 10:26     ` Shiju Jose
2024-11-20  9:59 ` [PATCH 03/13] rasdaemon: cxl: Add automatic indexing for storing CXL fields in SQLite database shiju.jose
2024-11-21 15:17   ` Jonathan Cameron
2024-11-22 10:31     ` Shiju Jose
2024-11-20  9:59 ` [PATCH 04/13] rasdaemon: cxl: Update common event to CXL spec rev 3.1 shiju.jose
2024-11-21 15:19   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 05/13] rasdaemon: cxl: Add Component Identifier formatting for " shiju.jose
2024-11-21 15:20   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 06/13] rasdaemon: cxl: Update CXL general media event to " shiju.jose
2024-11-21 15:27   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 07/13] rasdaemon: cxl: Update CXL DRAM " shiju.jose
2024-11-21 15:29   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 08/13] rasdaemon: cxl: Update memory module " shiju.jose
2024-11-21 15:32   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 09/13] rasdaemon: ras-mc-ctl: Fix logging of memory event type in CXL DRAM error table shiju.jose
2024-11-21 15:33   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 10/13] rasdaemon: ras-mc-ctl: Update logging of common event data to align with CXL spec rev 3.1 shiju.jose
2024-11-21 15:35   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 11/13] rasdaemon: ras-mc-ctl: Update logging of CXL general media " shiju.jose
2024-11-21 15:36   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 12/13] rasdaemon: ras-mc-ctl: Update logging of CXL DRAM " shiju.jose
2024-11-21 15:37   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 13/13] rasdaemon: ras-mc-ctl: Update logging of CXL memory module " shiju.jose
2024-11-21 15:38   ` Jonathan Cameron
2024-11-22 10:41     ` Shiju Jose [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=0fbde50ced8a478aaa4aabd04cb7cb8a@huawei.com \
    --to=shiju.jose@huawei.com \
    --cc=alison.schofield@intel.com \
    --cc=dan.j.williams@intel.com \
    --cc=dave.jiang@intel.com \
    --cc=dave@stgolabs.net \
    --cc=ira.weiny@intel.com \
    --cc=jonathan.cameron@huawei.com \
    --cc=linux-cxl@vger.kernel.org \
    --cc=linux-edac@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linuxarm@huawei.com \
    --cc=mchehab@kernel.org \
    --cc=nifan.cxl@gmail.com \
    --cc=prime.zeng@hisilicon.com \
    --cc=tanxiaofei@huawei.com \
    --cc=vishal.l.verma@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.