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From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: <shiju.jose@huawei.com>
Cc: <linux-edac@vger.kernel.org>, <linux-cxl@vger.kernel.org>,
	<mchehab@kernel.org>, <dave.jiang@intel.com>,
	<dan.j.williams@intel.com>, <alison.schofield@intel.com>,
	<nifan.cxl@gmail.com>, <vishal.l.verma@intel.com>,
	<ira.weiny@intel.com>, <dave@stgolabs.net>,
	<linux-kernel@vger.kernel.org>, <linuxarm@huawei.com>,
	<tanxiaofei@huawei.com>, <prime.zeng@hisilicon.com>
Subject: Re: [PATCH 06/13] rasdaemon: cxl: Update CXL general media event to CXL spec rev 3.1
Date: Thu, 21 Nov 2024 15:27:24 +0000	[thread overview]
Message-ID: <20241121152724.0000281e@huawei.com> (raw)
In-Reply-To: <20241120095923.1891-7-shiju.jose@huawei.com>

On Wed, 20 Nov 2024 09:59:16 +0000
<shiju.jose@huawei.com> wrote:

> From: Shiju Jose <shiju.jose@huawei.com>
> 
> CXL spec rev 3.1 section 8.2.9.2.1.1 Table 8-45, General Media Event
> Record has updated with following new fields and new types for Memory
> Event Type and Transaction Type fields.
> 1. Advanced Programmable Corrected Memory Error Threshold Event Flags
> 2. Corrected Memory Error Count at Event
> 3. Memory Event Sub-Type
> 
> The format of component identifier has changed (CXL spec 3.1 section
> 8.2.9.2.1 Table 8-44).
> 
> Update the parsing, logging and recording of general media event for
> the above spec changes.
> 
> Example rasdaemon log for CXL general media event,
> 
> cxl_general_media 2024-11-20 00:00:49 +0000 memdev:mem1 host:0000:0f:00.0 \
> serial:0x3 log type:Fatal hdr_uuid:fbcd0a77-c260-417f-85a9-088b1621eba6 \
> hdr_handle:0x1 hdr_related_handle:0x0 hdr_timestamp:1970-01-01 00:00:49 +0000 \
> hdr_length:128 hdr_maint_op_class:2 hdr_maint_op_sub_class:4 dpa:0x30d40 \
> dpa_flags:descriptor:'UNCORRECTABLE EVENT' 'THRESHOLD EVENT' 'POISON LIST OVERFLOW' \
> memory_event_type:TE State Violation memory_event_sub_type:Media Link Command \
> Training Error transaction_type:Host Inject Poison hpa:0xffffffffffffffff \
> region: region_uuid:00000000-0000-0000-0000-000000000000 channel:3 rank:33 \
> device:5 comp_id:03 74 c5 08 9a 1a 0b fc d2 7e 2f 31 9b 3c 81 4d \
> comp_id_pldm_valid_flags:'PLDM Entity ID' 'Resource ID' \
> PLDM Entity ID:74 c5 08 9a 1a 0b Resource ID:fc d2 7e 2f \
> Advanced Programmable CME threshold Event Flags:'Corrected Memory Errors in \
> Multiple Media Components' 'Exceeded Programmable Threshold' \
> Corrected Memory Error Count:0x78
> 
> Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
LGTM
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

  reply	other threads:[~2024-11-21 15:27 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-20  9:59 [PATCH 00/13] rasdaemon: cxl: Update CXL event logging and recording to CXL spec rev 3.1 shiju.jose
2024-11-20  9:59 ` [PATCH 01/13] rasdaemon: cxl: Fix logging of memory event type of DRAM trace event shiju.jose
2024-11-21 15:11   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 02/13] rasdaemon: cxl: Fix mismatch in region field's name with kernel " shiju.jose
2024-11-21 15:12   ` Jonathan Cameron
2024-11-22 10:26     ` Shiju Jose
2024-11-20  9:59 ` [PATCH 03/13] rasdaemon: cxl: Add automatic indexing for storing CXL fields in SQLite database shiju.jose
2024-11-21 15:17   ` Jonathan Cameron
2024-11-22 10:31     ` Shiju Jose
2024-11-20  9:59 ` [PATCH 04/13] rasdaemon: cxl: Update common event to CXL spec rev 3.1 shiju.jose
2024-11-21 15:19   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 05/13] rasdaemon: cxl: Add Component Identifier formatting for " shiju.jose
2024-11-21 15:20   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 06/13] rasdaemon: cxl: Update CXL general media event to " shiju.jose
2024-11-21 15:27   ` Jonathan Cameron [this message]
2024-11-20  9:59 ` [PATCH 07/13] rasdaemon: cxl: Update CXL DRAM " shiju.jose
2024-11-21 15:29   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 08/13] rasdaemon: cxl: Update memory module " shiju.jose
2024-11-21 15:32   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 09/13] rasdaemon: ras-mc-ctl: Fix logging of memory event type in CXL DRAM error table shiju.jose
2024-11-21 15:33   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 10/13] rasdaemon: ras-mc-ctl: Update logging of common event data to align with CXL spec rev 3.1 shiju.jose
2024-11-21 15:35   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 11/13] rasdaemon: ras-mc-ctl: Update logging of CXL general media " shiju.jose
2024-11-21 15:36   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 12/13] rasdaemon: ras-mc-ctl: Update logging of CXL DRAM " shiju.jose
2024-11-21 15:37   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 13/13] rasdaemon: ras-mc-ctl: Update logging of CXL memory module " shiju.jose
2024-11-21 15:38   ` Jonathan Cameron
2024-11-22 10:41     ` Shiju Jose

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