From: Robert Love <rml@tech9.net>
To: Bulent Abali <abali@us.ibm.com>
Cc: linux-kernel@vger.kernel.org
Subject: Re: Pentium SSE prefetcht0 instruction... How do you make it work
Date: 27 Sep 2001 15:54:24 -0400 [thread overview]
Message-ID: <1001620509.4649.23.camel@phantasy> (raw)
In-Reply-To: <OF3A810D97.1605796C-ON85256AD4.0065EDD2@pok.ibm.com>
In-Reply-To: <OF3A810D97.1605796C-ON85256AD4.0065EDD2@pok.ibm.com>
On Thu, 2001-09-27 at 14:40, Bulent Abali wrote:
> //This should prefetch an L2 line at addr (hence L3 line prefetch)
> inline void L3_prefetch (char * addr)
> {
> asm volatile("prefetcht1 %0" :: "m" (addr));
> }
There are prefetch instructions already in the kernel.
See include/linux/prefetch.h
and linux/include/asm-i386/processor.h
--
Robert M. Love
rml at ufl.edu
rml at tech9.net
next prev parent reply other threads:[~2001-09-27 19:55 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-09-27 18:40 Pentium SSE prefetcht0 instruction... How do you make it work Bulent Abali
2001-09-27 18:43 ` Tony Hagale
2001-09-27 19:55 ` Robert Love
2001-09-27 19:54 ` Robert Love [this message]
-- strict thread matches above, loose matches on Subject: below --
2001-09-27 20:09 Bulent Abali
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