ide prd table size

[Gerald Champagne <gerald.champagne@esstech.com>]

I have a question about the calculation of the PRD_ENTRIES constant used
in the ide code  The documentation for the size of PRD_ENTRIES says
this:
-----------------------------
/*
Our Physical Region Descriptor (PRD) table should be large enough to
handle the biggest I/O request we are likely to see.  Since requests can
have no more than 256 sectors, and since the typical blocksize is two or
more sectors, we could get by with a limit of 128 entries here for the
usual worst case.  Most requests seem to include some contiguous blocks,
further reducing the number of table entries required.

As it turns out though, we must allocate a full 4KB page for this, so
the two PRD tables (ide0 & ide1) will each get half of that, allowing
each to have about 256 entries (8 bytes each) from this.
*/
#define PRD_BYTES	8
#define PRD_ENTRIES	(PAGE_SIZE / (2 * PRD_BYTES))
-----------------------------


This looks a little outdated, but I'm interested in the second
paragraph.  I don't see where multiple interfaces are sharing the same
page.  The documentation here and for pci_alloc_consistent says that
blocks are allocated in full pages.  This implies that the unused
portion is wasted.

So...

- Is the code wasting half of the page, and should PRD_ENTRIES be
redefined to be larger?

- Am I misunderstanding the documentation, and is the other half of the
page used somewhere else?

- Am I misunderstanding the code, and do multiple interfaces share the
page?

- Should this be modified to use the pci_pool interface as defined in
DMA-mapping.txt?

Thanks!

Gerald