From: Marcin Dalecki <dalecki@evision.ag>
To: Gerald Champagne <gerald.champagne@esstech.com>
Cc: linux-kernel@vger.kernel.org
Subject: Re: ide prd table size
Date: Sun, 04 Aug 2002 01:32:04 +0200 [thread overview]
Message-ID: <3D4C67F4.20807@evision.ag> (raw)
In-Reply-To: 1028309451.29024.659.camel@localhost.localdomain
Użytkownik Gerald Champagne napisał:
> I have a question about the calculation of the PRD_ENTRIES constant used
> in the ide code The documentation for the size of PRD_ENTRIES says
> this:
> -----------------------------
> /*
> Our Physical Region Descriptor (PRD) table should be large enough to
> handle the biggest I/O request we are likely to see. Since requests can
> have no more than 256 sectors, and since the typical blocksize is two or
> more sectors, we could get by with a limit of 128 entries here for the
> usual worst case. Most requests seem to include some contiguous blocks,
> further reducing the number of table entries required.
>
> As it turns out though, we must allocate a full 4KB page for this, so
> the two PRD tables (ide0 & ide1) will each get half of that, allowing
> each to have about 256 entries (8 bytes each) from this.
> */
> #define PRD_BYTES 8
> #define PRD_ENTRIES (PAGE_SIZE / (2 * PRD_BYTES))
> -----------------------------
>
>
> This looks a little outdated, but I'm interested in the second
> paragraph. I don't see where multiple interfaces are sharing the same
> page. The documentation here and for pci_alloc_consistent says that
> blocks are allocated in full pages. This implies that the unused
> portion is wasted.
>
> So...
>
> - Is the code wasting half of the page, and should PRD_ENTRIES be
> redefined to be larger?
>
> - Am I misunderstanding the documentation, and is the other half of the
> page used somewhere else?
>
> - Am I misunderstanding the code, and do multiple interfaces share the
> page?
>
> - Should this be modified to use the pci_pool interface as defined in
> DMA-mapping.txt?
>
> Thanks!
Well the documentation is a bit inadequate.
The reality is a bit more complicated and reveals if you look at the
actual usage pattern:
1. Two drives on a channel share them.
2. primary and secondary channel are tightly coupled by the
host controller hardware (in esp the PIIX) and have to
be allocated in one go.
3. Some host controllers don't like it if you really use the last entry.
4. trm380 can deal with much more then anybody else.
next prev parent reply other threads:[~2002-08-06 12:47 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-08-02 17:30 ide prd table size Gerald Champagne
2002-08-03 23:32 ` Marcin Dalecki [this message]
2002-08-06 16:27 ` Gerald Champagne
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