From: "Michael Chan" <mchan@broadcom.com>
To: "David S. Miller" <davem@davemloft.net>
Cc: netdev@oss.sgi.com
Subject: Re: Locking model for NAPI drivers
Date: Wed, 01 Jun 2005 14:34:10 -0700 [thread overview]
Message-ID: <1117661650.4310.62.camel@rh4> (raw)
In-Reply-To: <20050601.152134.120445266.davem@davemloft.net>
On Wed, 2005-06-01 at 15:21 -0700, David S. Miller wrote:
> From: "Michael Chan" <mchan@broadcom.com>
> Date: Wed, 01 Jun 2005 13:33:39 -0700
>
> > I suppose we can enable interrupts in tg3_irq_quiesce() after setting
> > the SYNC bit.
>
> Since the caller shuts down NAPI ->poll(), after setting the SYNC bit
> we can just check the MAILBOX register, and if a '1' is there just
> return. Does one need to mask out the upper bits of the regiser in
> order to avoid seeing the IRQ tag in such a comparison?
>
No, just check for the value 1 since that's the value we use to disable
interrupts. The value read back will always be 1 if 1 was previously
written to it.
next prev parent reply other threads:[~2005-06-01 21:34 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-05-31 22:48 Locking model for NAPI drivers David S. Miller
2005-06-01 6:28 ` Andi Kleen
2005-06-01 8:42 ` Herbert Xu
2005-06-01 8:16 ` Greg Banks
2005-06-01 20:33 ` Michael Chan
2005-06-01 22:21 ` David S. Miller
2005-06-01 21:34 ` Michael Chan [this message]
2005-06-02 19:56 ` Michael Chan
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