Re: Platform bus/ppc sys model...

[Kumar Gala <kumar.gala@freescale.com>]

> My intention was to give a device tree structure to the kernel at boot
> time via a (pseudo?) pointer in bd_info or similar. Then you would only
>  need to recompile a little bootloader (which is needed for setting up
> the FPGA anyway) with this structure for every specific card. You could
> even be shrewd enough to have a single kernel image but several
> structures to launch several processors on the same chip. Does it sound
> like a sane solution?

I think this is reasonable.  The best device tree would be a flattened 
OF tree since we are trying to move the world in that direction.  Jon 
Masters around?

> Otherwise, I'm a bit unsure as to whether a system with a gigantic list
> of devices in ???_devices.c is the right way to go. In the Xilinx case,
> not only is a list of possible IP:s needed, but also the usual standard
>  circuits which can be connected from outside to the chip. Wouldn't it 
> be
> more realistic to have knowledge of the compiled in drivers somehow?

Your needs are a bit different than the initial purpose of ppc_sys.  
The reason the device list works well for us today is that it replaced 
duplication between every variant of 85xx.

I'm not that familiar with exactly what information you would need to 
have access to in the Xilinx case.  I would think if you information 
compiled into drivers some of this might all be moot.  Part of the 
whole device model is to have drivers that are agnostic of the system 
they are in.

- kumar