* STGI #UD exception
@ 2007-06-20 2:45 mythbuster
2007-06-21 17:46 ` Anthony Liguori
0 siblings, 1 reply; 2+ messages in thread
From: mythbuster @ 2007-06-20 2:45 UTC (permalink / raw)
To: xen-devel
Hello all,
AMD manual states about STGI instruction:
"This instruction generates a #UD exception is SVM is not enabled."
However, if I execute in ring-0 the STGI instruction in my system with
EFER.SVME == 0, I receive a #GP exception instead of a #UD exception.
In other test, I just set the SVME bit to 1 and now I receive a #UD
exception!
Is the manual wrong?
P.S.: My CPU obviously has the SVM extensions (AMD X2 4600+ AM2)
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^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: STGI #UD exception
2007-06-20 2:45 STGI #UD exception mythbuster
@ 2007-06-21 17:46 ` Anthony Liguori
0 siblings, 0 replies; 2+ messages in thread
From: Anthony Liguori @ 2007-06-21 17:46 UTC (permalink / raw)
To: mythbuster; +Cc: xen-devel
mythbuster wrote:
> Hello all,
>
> AMD manual states about STGI instruction:
>
> "This instruction generates a #UD exception is SVM is not enabled."
>
> However, if I execute in ring-0 the STGI instruction in my system with
> EFER.SVME == 0, I receive a #GP exception instead of a #UD exception.
> In other test, I just set the SVME bit to 1 and now I receive a #UD
> exception!
So SVM doesn't work at all? Have you checked to see if it's disabled in
your BIOS?
Regards,
Anthony Liguori
> Is the manual wrong?
>
> P.S.: My CPU obviously has the SVM extensions (AMD X2 4600+ AM2)
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