From: Thomas Gleixner <tglx@linutronix.de>
To: Vitaly Wool <vwool@ru.mvista.com>
Cc: Alexander Belyakov <alexander.belyakov@intel.com>,
"Kutergin, Timofey" <timofey.kutergin@intel.com>,
"Korolev, Alexey" <alexey.korolev@intel.com>,
linux-mtd@lists.infradead.org,
"Artem B. Bityutskiy" <dedekind@yandex.ru>,
Nicolas Pitre <nico@cam.org>
Subject: Re: [PATCH/RFC] MTD: Striping layer core
Date: Mon, 03 Apr 2006 08:21:12 +0200 [thread overview]
Message-ID: <1144045272.5344.352.camel@localhost.localdomain> (raw)
In-Reply-To: <4430BD5B.70404@ru.mvista.com>
On Mon, 2006-04-03 at 10:14 +0400, Vitaly Wool wrote:
> Given that some modern NAND controllers have the ability to generate
> interrupt when they're done, I would think about complete redesign of
> the MTD NAND layer. I'd like to see the fully asynchronous base model
> here (i. e. mtd->send_write_cmd/send_read_cmd or something similar) and
> synchronous interface on top of that, just like, say, the current SPI
> core works.
> This would allow to be more flexible in waiting for completion and also
> would IMO make striping implementation for NAND more straightforward.
> Does that make sense?
In general yes, but it does not solve the problem, where you have _ONE_
shared line for ready/busy -> interrupt for all chips connected to the
hardware controller, nor does it solve the general serialization
requirements to access the controller.
tglx
next prev parent reply other threads:[~2006-04-03 6:21 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-03-30 7:57 [PATCH/RFC] MTD: Striping layer core Belyakov, Alexander
2006-03-30 9:06 ` Vitaly Wool
2006-03-30 11:50 ` Artem B. Bityutskiy
2006-03-30 12:15 ` Vitaly Wool
2006-03-30 15:24 ` Alexander Belyakov
2006-03-30 15:39 ` Artem B. Bityutskiy
2006-03-31 7:06 ` Alexander Belyakov
2006-03-31 8:02 ` Artem B. Bityutskiy
2006-03-31 8:05 ` Artem B. Bityutskiy
2006-03-31 8:17 ` Alexander Belyakov
2006-03-31 8:38 ` Artem B. Bityutskiy
2006-03-31 8:55 ` Artem B. Bityutskiy
2006-03-31 16:59 ` Nicolas Pitre
2006-04-02 11:22 ` Artem B. Bityutskiy
2006-03-31 9:27 ` Jörn Engel
2006-03-31 9:36 ` Artem B. Bityutskiy
2006-03-31 9:40 ` Jörn Engel
2006-03-31 10:00 ` Artem B. Bityutskiy
2006-03-31 10:06 ` Artem B. Bityutskiy
2006-03-31 10:07 ` Jörn Engel
2006-03-31 10:18 ` Artem B. Bityutskiy
2006-03-31 11:40 ` Jörn Engel
2006-03-31 11:47 ` Artem B. Bityutskiy
2006-03-31 11:56 ` Jörn Engel
2006-03-31 12:06 ` Artem B. Bityutskiy
2006-03-31 11:55 ` Artem B. Bityutskiy
2006-03-31 11:59 ` Jörn Engel
2006-03-31 12:11 ` Artem B. Bityutskiy
2006-03-31 12:20 ` Jörn Engel
2006-03-31 12:28 ` Artem B. Bityutskiy
2006-03-31 12:57 ` Jörn Engel
2006-03-31 13:08 ` Artem B. Bityutskiy
2006-03-31 17:22 ` Nicolas Pitre
2006-04-03 13:06 ` Jörn Engel
2006-04-03 13:18 ` Jörn Engel
2006-04-04 1:39 ` Josh Boyer
2006-04-04 1:41 ` Josh Boyer
2006-03-31 17:19 ` Nicolas Pitre
2006-04-02 12:34 ` Artem B. Bityutskiy
2006-03-31 17:14 ` Nicolas Pitre
2006-04-02 12:11 ` Artem B. Bityutskiy
2006-03-31 17:06 ` Nicolas Pitre
2006-03-31 16:49 ` Nicolas Pitre
2006-04-02 10:51 ` Artem B. Bityutskiy
2006-04-03 4:06 ` Vitaly Wool
2006-04-03 6:04 ` Thomas Gleixner
2006-04-03 6:14 ` Vitaly Wool
2006-04-03 6:21 ` Thomas Gleixner [this message]
2006-04-03 6:59 ` Artem B. Bityutskiy
2006-04-03 7:20 ` Alexander Belyakov
2006-04-03 13:44 ` Nicolas Pitre
2006-03-30 10:35 ` Artem B. Bityutskiy
2006-03-30 15:38 ` Alexander Belyakov
2006-03-30 16:32 ` Nicolas Pitre
2006-03-30 16:38 ` Artem B. Bityutskiy
2006-03-30 16:56 ` Jared Hulbert
2006-03-30 17:03 ` Artem B. Bityutskiy
2006-03-31 7:19 ` Alexander Belyakov
2006-03-30 12:11 ` Jörn Engel
2006-03-31 6:52 ` Alexander Belyakov
2006-03-31 7:57 ` Artem B. Bityutskiy
2006-03-31 8:11 ` Alexander Belyakov
2006-03-31 8:31 ` Artem B. Bityutskiy
2006-03-31 8:35 ` Alexander Belyakov
2006-03-31 8:47 ` Jörn Engel
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