From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Magnus Damm <magnus.damm@gmail.com>,
linux-clk <linux-clk@vger.kernel.org>,
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>,
Gaku Inami <gaku.inami.xw@bp.renesas.com>,
Michael Turquette <mturquette@baylibre.com>,
SH-Linux <linux-sh@vger.kernel.org>,
Stephen Boyd <sboyd@codeaurora.org>,
"Simon Horman [Horms]" <horms@verge.net.au>
Subject: Re: [PATCH v5 02/05] clk: shmobile: Add Renesas R-Car Gen3 CPG support
Date: Tue, 01 Sep 2015 14:51:07 +0300 [thread overview]
Message-ID: <11729470.IAXP0ll3OY@avalon> (raw)
In-Reply-To: <CAMuHMdWkBPhPJP5WUkDv+1psiZ9iFQv65t9QB5+qq=+Kn7L0mA@mail.gmail.com>
On Tuesday 01 September 2015 13:36:28 Geert Uytterhoeven wrote:
> On Tue, Sep 1, 2015 at 12:59 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
> >>> +/*
> >>> + * MD EXTAL PLL0 PLL1 PLL2 PLL3
> >>> PLL4
> >>> + * 14 13 19 17 (MHz) *1 *1 *1
> >>> + *-------------------------------------------------------------------
> >>> + * 0 0 0 0 16.66 x 1 x180/2 x192/2 x144/2 x192
> >>> x144
> >>> + * 0 0 0 1 16.66 x 1 x180/2 x192/2 x144/2 x128
> >>> x144
> >>> + * 0 0 1 0 Prohibited setting
> >>> + * 0 0 1 1 16.66 x 1 x180/2 x192/2 x144/2 x192
> >>> x144
> >>> + * 0 1 0 0 20 x 1 x150/2 x156/2 x120/2 x156
> >>> x120
> >>> + * 0 1 0 1 20 x 1 x150/2 x156/2 x120/2 x106
> >>> x120
> >>> + * 0 1 1 0 Prohibited setting
> >>> + * 0 1 1 1 20 x 1 x150/2 x156/2 x120/2 x156
> >>> x120
> >>> + * 1 0 0 0 25 x 1 x120/2 x128/2 x96/2 x128
> >>> x96
> >>> + * 1 0 0 1 25 x 1 x120/2 x128/2 x96/2 x84
> >>> x96
> >>> + * 1 0 1 0 Prohibited setting
> >>> + * 1 0 1 1 25 x 1 x120/2 x128/2 x96/2 x128
> >>> x96
> >>> + * 1 1 0 0 33.33 / 2 x180/2 x192/2 x144/2 x192
> >>> x144
> >>> + * 1 1 0 1 33.33 / 2 x180/2 x192/2 x144/2 x128
> >>> x144
> >>> + * 1 1 1 0 Prohibited setting
> >>> + * 1 1 1 1 33.33 / 2 x180/2 x192/2 x144/2 x192
> >>> x144
> >>> + *
> >>> + * *1 : datasheet indicates VCO output (PLLx = VCO/2)
> >>
> >> As explained in a separate e-mail there's a few clocks on R8A7795 that
> >> derive directly from PLL1 VCO. I thus wonder whether we shouldn't expose
> >> the PLL1 clock as the VCO output and create VCO/2 using a fixed factor
> >> clock in DT.
> >
> > Do you think that would reduce complexity or simplify the code? If so
> > I think we should do it. Otherwise I think it makes sense to simply
> > follow the data sheet.
>
> It would avoid having to apply a multiplier of two to the RPC clock.
And it would match the hardware clock tree topology. Applying a multiplier to
the RPC clock is a hack I can live with though, so I'll let you decide which
option is best, but in general matching the hardware seems a good idea to me.
--
Regards,
Laurent Pinchart
WARNING: multiple messages have this Message-ID (diff)
From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Magnus Damm <magnus.damm@gmail.com>,
linux-clk <linux-clk@vger.kernel.org>,
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>,
Gaku Inami <gaku.inami.xw@bp.renesas.com>,
Michael Turquette <mturquette@baylibre.com>,
SH-Linux <linux-sh@vger.kernel.org>,
Stephen Boyd <sboyd@codeaurora.org>,
"Simon Horman [Horms]" <horms@verge.net.au>
Subject: Re: [PATCH v5 02/05] clk: shmobile: Add Renesas R-Car Gen3 CPG support
Date: Tue, 01 Sep 2015 11:51:07 +0000 [thread overview]
Message-ID: <11729470.IAXP0ll3OY@avalon> (raw)
In-Reply-To: <CAMuHMdWkBPhPJP5WUkDv+1psiZ9iFQv65t9QB5+qq=+Kn7L0mA@mail.gmail.com>
On Tuesday 01 September 2015 13:36:28 Geert Uytterhoeven wrote:
> On Tue, Sep 1, 2015 at 12:59 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
> >>> +/*
> >>> + * MD EXTAL PLL0 PLL1 PLL2 PLL3
> >>> PLL4
> >>> + * 14 13 19 17 (MHz) *1 *1 *1
> >>> + *-------------------------------------------------------------------
> >>> + * 0 0 0 0 16.66 x 1 x180/2 x192/2 x144/2 x192
> >>> x144
> >>> + * 0 0 0 1 16.66 x 1 x180/2 x192/2 x144/2 x128
> >>> x144
> >>> + * 0 0 1 0 Prohibited setting
> >>> + * 0 0 1 1 16.66 x 1 x180/2 x192/2 x144/2 x192
> >>> x144
> >>> + * 0 1 0 0 20 x 1 x150/2 x156/2 x120/2 x156
> >>> x120
> >>> + * 0 1 0 1 20 x 1 x150/2 x156/2 x120/2 x106
> >>> x120
> >>> + * 0 1 1 0 Prohibited setting
> >>> + * 0 1 1 1 20 x 1 x150/2 x156/2 x120/2 x156
> >>> x120
> >>> + * 1 0 0 0 25 x 1 x120/2 x128/2 x96/2 x128
> >>> x96
> >>> + * 1 0 0 1 25 x 1 x120/2 x128/2 x96/2 x84
> >>> x96
> >>> + * 1 0 1 0 Prohibited setting
> >>> + * 1 0 1 1 25 x 1 x120/2 x128/2 x96/2 x128
> >>> x96
> >>> + * 1 1 0 0 33.33 / 2 x180/2 x192/2 x144/2 x192
> >>> x144
> >>> + * 1 1 0 1 33.33 / 2 x180/2 x192/2 x144/2 x128
> >>> x144
> >>> + * 1 1 1 0 Prohibited setting
> >>> + * 1 1 1 1 33.33 / 2 x180/2 x192/2 x144/2 x192
> >>> x144
> >>> + *
> >>> + * *1 : datasheet indicates VCO output (PLLx = VCO/2)
> >>
> >> As explained in a separate e-mail there's a few clocks on R8A7795 that
> >> derive directly from PLL1 VCO. I thus wonder whether we shouldn't expose
> >> the PLL1 clock as the VCO output and create VCO/2 using a fixed factor
> >> clock in DT.
> >
> > Do you think that would reduce complexity or simplify the code? If so
> > I think we should do it. Otherwise I think it makes sense to simply
> > follow the data sheet.
>
> It would avoid having to apply a multiplier of two to the RPC clock.
And it would match the hardware clock tree topology. Applying a multiplier to
the RPC clock is a hack I can live with though, so I'll let you decide which
option is best, but in general matching the hardware seems a good idea to me.
--
Regards,
Laurent Pinchart
next prev parent reply other threads:[~2015-09-01 11:51 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-31 12:48 [PATCH v5 00/05] Renesas R-Car Gen3 CPG support V5 Magnus Damm
2015-08-31 12:48 ` Magnus Damm
2015-08-31 12:48 ` [PATCH v5 01/05] clk: shmobile: Rework CONFIG_ARCH_SHMOBILE_MULTI Magnus Damm
2015-08-31 12:48 ` Magnus Damm
2015-08-31 12:49 ` [PATCH v5 02/05] clk: shmobile: Add Renesas R-Car Gen3 CPG support Magnus Damm
2015-08-31 12:49 ` Magnus Damm
2015-09-01 6:00 ` Laurent Pinchart
2015-09-01 6:00 ` Laurent Pinchart
2015-09-01 10:59 ` Magnus Damm
2015-09-01 10:59 ` Magnus Damm
2015-09-01 11:36 ` Geert Uytterhoeven
2015-09-01 11:36 ` Geert Uytterhoeven
2015-09-01 11:51 ` Laurent Pinchart [this message]
2015-09-01 11:51 ` Laurent Pinchart
2015-09-01 12:30 ` Laurent Pinchart
2015-09-01 12:30 ` Laurent Pinchart
2015-09-02 2:27 ` Magnus Damm
2015-09-02 2:27 ` Magnus Damm
2015-09-02 5:21 ` Laurent Pinchart
2015-09-02 5:21 ` Laurent Pinchart
2015-09-02 8:24 ` Magnus Damm
2015-09-02 8:24 ` Magnus Damm
2015-09-01 14:23 ` Geert Uytterhoeven
2015-09-01 14:23 ` Geert Uytterhoeven
2015-08-31 12:49 ` [PATCH v5 03/05] clk: shmobile: rcar-gen3: Add CPG/MSTP Clock Domain support Magnus Damm
2015-08-31 12:49 ` Magnus Damm
2015-08-31 12:49 ` [PATCH v5 04/05] clk: shmobile: Add r8a7795 SoC to MSTP bindings Magnus Damm
2015-08-31 12:49 ` Magnus Damm
2015-09-01 6:02 ` Laurent Pinchart
2015-09-01 6:02 ` Laurent Pinchart
2015-08-31 12:49 ` [PATCH v5 05/05] clk: shmobile: Make MSTP clock-output-names optional Magnus Damm
2015-08-31 12:49 ` Magnus Damm
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