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From: "Michael Chan" <mchan@broadcom.com>
To: "David Miller" <davem@davemloft.net>
Cc: "netdev" <netdev@vger.kernel.org>
Subject: [PATCH v2 12/16][BNX2]: Add indirect spinlock.
Date: Thu, 03 May 2007 00:30:48 -0700	[thread overview]
Message-ID: <1178177448.4909.75.camel@dell> (raw)
In-Reply-To: <1178068303.4820.35.camel@dell>

[BNX2]: Add indirect spinlock.

The indirect register access method will be used by more than one
caller in BH context (NAPI poll and timer), so a spinlock is required.

Signed-off-by: Michael Chan <mchan@broadcom.com>

diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index ab58909..cb74f12 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -234,21 +234,29 @@ static inline u32 bnx2_tx_avail(struct bnx2 *bp)
 static u32
 bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset)
 {
+	u32 val;
+
+	spin_lock_bh(&bp->indirect_lock);
 	REG_WR(bp, BNX2_PCICFG_REG_WINDOW_ADDRESS, offset);
-	return (REG_RD(bp, BNX2_PCICFG_REG_WINDOW));
+	val = REG_RD(bp, BNX2_PCICFG_REG_WINDOW);
+	spin_unlock_bh(&bp->indirect_lock);
+	return val;
 }
 
 static void
 bnx2_reg_wr_ind(struct bnx2 *bp, u32 offset, u32 val)
 {
+	spin_lock_bh(&bp->indirect_lock);
 	REG_WR(bp, BNX2_PCICFG_REG_WINDOW_ADDRESS, offset);
 	REG_WR(bp, BNX2_PCICFG_REG_WINDOW, val);
+	spin_unlock_bh(&bp->indirect_lock);
 }
 
 static void
 bnx2_ctx_wr(struct bnx2 *bp, u32 cid_addr, u32 offset, u32 val)
 {
 	offset += cid_addr;
+	spin_lock_bh(&bp->indirect_lock);
 	if (CHIP_NUM(bp) == CHIP_NUM_5709) {
 		int i;
 
@@ -266,6 +274,7 @@ bnx2_ctx_wr(struct bnx2 *bp, u32 cid_addr, u32 offset, u32 val)
 		REG_WR(bp, BNX2_CTX_DATA_ADR, offset);
 		REG_WR(bp, BNX2_CTX_DATA, val);
 	}
+	spin_unlock_bh(&bp->indirect_lock);
 }
 
 static int
@@ -6039,6 +6048,7 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
 	bp->pdev = pdev;
 
 	spin_lock_init(&bp->phy_lock);
+	spin_lock_init(&bp->indirect_lock);
 	INIT_WORK(&bp->reset_task, bnx2_reset_task);
 
 	dev->base_addr = dev->mem_start = pci_resource_start(pdev, 0);
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index 124bd03..ba175a8 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -6522,6 +6522,7 @@ struct bnx2 {
 
 	/* Used to synchronize phy accesses. */
 	spinlock_t		phy_lock;
+	spinlock_t		indirect_lock;
 
 	u32			phy_flags;
 #define PHY_SERDES_FLAG			1



  parent reply	other threads:[~2007-05-03  6:43 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-05-02  1:11 [PATCH 0/20][BNX2]: Bug fixes and more 5709 suppot Michael Chan
2007-05-02  7:10 ` Jeff Garzik
2007-05-02  7:14   ` David Miller
2007-05-03  7:25 ` [ETHTOOL]: Add 2.5G bit definitions Michael Chan
2007-05-03 11:11   ` Jeff Garzik
2007-05-03 20:07     ` David Miller
2007-05-03 20:17   ` David Miller
2007-05-03  7:27 ` [PATCH] ethtool: Add 2.5G support Michael Chan
2007-05-03 11:11   ` Jeff Garzik
2007-05-11 20:46   ` Jeff Garzik
2007-05-03  7:27 ` [PATCH v2 0/16][BNX2]: Bug fixes and more 5709 suppot Michael Chan
2007-05-03  7:28 ` [PATCH v2 1/16][BNX2]: Block MII access when ifdown Michael Chan
2007-05-03 20:18   ` David Miller
2007-05-03  7:28 ` [PATCH v2 2/16][BNX2]: Fix register and memory test on 5709 Michael Chan
2007-05-03 20:18   ` David Miller
2007-05-03  7:28 ` [PATCH v2 3/16][BNX2]: Add 40-bit DMA workaround for 5708 Michael Chan
2007-05-03 20:19   ` David Miller
2007-05-03  7:29 ` [PATCH v2 4/16][BNX2]: Fix race conditions when calling register_netdev() Michael Chan
2007-05-03 20:20   ` David Miller
2007-05-03  7:29 ` [PATCH v2 5/16][BNX2]: Save PCI state during suspend Michael Chan
2007-05-03 20:20   ` David Miller
2007-05-03  7:29 ` [PATCH v2 6/16][BNX2]: Update 5708 firmware Michael Chan
2007-05-03 20:21   ` David Miller
2007-05-03  7:29 ` [PATCH v2 8/16][BNX2]: Add ipv6 TSO and checksum for 5709 Michael Chan
2007-05-03 20:22   ` David Miller
2007-05-03  7:30 ` [PATCH v2 9/16][BNX2]: Put MII register offsets in the bnx2 struct Michael Chan
2007-05-03 20:23   ` David Miller
2007-05-03  7:30 ` [PATCH v2 10/16][BNX2]: Re-structure the 2.5G Serdes code Michael Chan
2007-05-03 20:23   ` David Miller
2007-05-03  7:30 ` [PATCH v2 11/16][BNX2]: Add support for 5709 Serdes Michael Chan
2007-05-03 20:23   ` David Miller
2007-05-03  7:30 ` Michael Chan [this message]
2007-05-03 20:24   ` [PATCH v2 12/16][BNX2]: Add indirect spinlock David Miller
2007-05-03  7:31 ` [PATCH v2 13/16][BNX2]: Restructure PHY event handling Michael Chan
2007-05-03 20:24   ` David Miller
2007-05-03  7:31 ` [PATCH v2 14/16][BNX2]: Add 1-shot MSI handler for 5709 Michael Chan
2007-05-03 20:24   ` David Miller
2007-05-03  7:31 ` [PATCH v2 15/16][BNX2]: Print bus information for PCIE devices Michael Chan
2007-05-03 20:25   ` David Miller
2007-05-03  7:32 ` [PATCH v2 16/16][BNX2]: Update version and reldate Michael Chan
2007-05-03 12:40   ` Jeff Garzik
2007-05-03 20:25   ` David Miller
     [not found] ` <1178177565.4909.80.camel@dell>
2007-05-03 20:21   ` [PATCH v2 7/16][BNX2]: Update 5709 firmware David Miller

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