[PATCH] kvm-userspace: kvm_sync_icache for more architectures

[PATCH] kvm-userspace: kvm_sync_icache for more architectures

[Christian Ehrhardt]

Subject: [PATCH] kvm-userspace: kvm_sync_icache for more architectures
From: Christian Ehrhardt <ehrhardt-23VcF4HTsmIX0ybBhKVfKdBPR1lH4CV8@public.gmane.org>

A ia64 patch introduced kvm_sync_icache within a ifdef __ia64__, but the concept
of split caches is not bound to ia64 and we would like to implement it for ppc too.
The call to kvm_synch_icache is now indirectly dependent to USE_KVM since normal 
qemu should not need that flush and the function naming kvm_* suggests that it
should be only used if USE_KVM is set.

Signed-off-by: Christian Ehrhardt <ehrhardt-23VcF4HTsmIX0ybBhKVfKdBPR1lH4CV8@public.gmane.org>

---
 exec.c            |    2 +-
 target-ia64/cpu.h |    3 +++
 target-ppc/cpu.h  |    8 ++++++++
 3 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/qemu/exec.c b/qemu/exec.c
index cf14fdd..5b5bd77 100644
--- a/qemu/exec.c
+++ b/qemu/exec.c
@@ -2600,7 +2600,7 @@ void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
                     phys_ram_dirty[addr1 >> TARGET_PAGE_BITS] |=
                         (0xff & ~CODE_DIRTY_FLAG);
                 }
-#ifdef __ia64__
+#ifdef defined(KVM_SPLIT_CACHE)
 		kvm_sync_icache((unsigned long)ptr, l);
 #endif
             }
diff --git a/qemu/target-ia64/cpu.h b/qemu/target-ia64/cpu.h
index 7349e94..0210be9 100644
--- a/qemu/target-ia64/cpu.h
+++ b/qemu/target-ia64/cpu.h
@@ -73,9 +73,12 @@ CPUState *cpu_ia64_init(void);
 
 #include "cpu-all.h"
 
+#ifdef USE_KVM
 /* IA64 has seperate I/D cache, with coherence maintained by DMA controller.
  * So to emulate right behavior that guest OS is assumed, we need to flush
  * I/D cache here.
  */
+#define KVM_SPLIT_CACHE
 void kvm_sync_icache(unsigned long address, int len);
+#endif /* USE_KVM */
 #endif
diff --git a/qemu/target-ppc/cpu.h b/qemu/target-ppc/cpu.h
index c4ae414..5ddf6e2 100644
--- a/qemu/target-ppc/cpu.h
+++ b/qemu/target-ppc/cpu.h
@@ -1179,4 +1179,12 @@ enum {
 
 /*****************************************************************************/
 
+#ifdef USE_KVM
+/* ppc has a seperate I/D cache, emulate the right behavior that the guest OS
+ * is assuming, therefore we need to flush I/D cache here.
+ * FIXME Implemented as noop here until qemu-kvm-ppc code is submitted.
+ */
+#define KVM_SPLIT_CACHE
+#define kvm_sync_icache(address, len)	do { } while (0)
+#endif /* USE_KVM */
 #endif /* !defined (__CPU_PPC_H__) */

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