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From: Liam Girdwood <lrg@slimlogic.co.uk>
To: Richard Zhao <linuxzsc@gmail.com>
Cc: alsa-devel@alsa-project.org
Subject: Re: ASOC: For SND_SOC_DAIFMT_IB_IF what is invert	baseed on?
Date: Sun, 26 Oct 2008 16:05:26 +0000	[thread overview]
Message-ID: <1225037126.28382.85.camel@dell-desktop.example.com> (raw)
In-Reply-To: <4e090d470810250931k5e44a4cck3ad0186a2c47ec03@mail.gmail.com>

On Sun, 2008-10-26 at 00:31 +0800, Richard Zhao wrote:
> Hi,
> 
> include/sound/soc.h
> /*
>  * DAI hardware signal inversions
>  */
> #define SND_SOC_DAIFMT_NB_NF            (0 << 8)        /* normal bclk + frm */
> #define SND_SOC_DAIFMT_NB_IF            (1 << 8)        /* normal bclk
> + inv frm */
> #define SND_SOC_DAIFMT_IB_NF            (2 << 8)        /* invert bclk
> + nor frm */
> #define SND_SOC_DAIFMT_IB_IF            (3 << 8)        /* invert bclk + frm */
> 
> What are frame cock and bit clock invert based on? I2S, PCM or some
> else bus protocols? Or just high level voltage or low level voltage?
> 

Generic logic levels (high/low voltage) that can apply to I2S and PCM
DAI's.

Liam

  reply	other threads:[~2008-10-26 16:05 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-10-25 16:31 ASOC: For SND_SOC_DAIFMT_IB_IF what is invert baseed on? Richard Zhao
2008-10-26 16:05 ` Liam Girdwood [this message]
2008-10-27  3:00   ` Richard Zhao
2008-10-27 10:46     ` Liam Girdwood
2008-10-27 11:26       ` Liam Girdwood
2008-10-27 13:24       ` Richard Zhao
2008-10-27 13:47         ` Liam Girdwood

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