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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Hollis Blanchard <hollisb@us.ibm.com>
Cc: linuxppc-dev@ozlabs.org, yanok@emcraft.com,
	kvm-ppc@vger.kernel.org, dwg@au1.ibm.com
Subject: Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more
Date: Wed, 12 Nov 2008 20:44:56 +0000	[thread overview]
Message-ID: <1226522696.7154.28.camel@pasglop> (raw)
In-Reply-To: <1226502685.19156.2.camel@localhost.localdomain>

On Wed, 2008-11-12 at 09:11 -0600, Hollis Blanchard wrote:
> Forget pages. The errata is about the last 256 bytes of physical
> memory.
> 
> > I still find it a bit tricky to have memory nodes not aligned on
> nice
> > fat big boundaries tho.
> 
> I don't know what you're referring to. The patch I sent doesn't touch
> memory nodes, so they are indeed still aligned on nice fat big
> boundaries.

My last comment was about the approach of modifying the memory node.

> I don't think this is overengineering at all. We can't touch the last
> 256 bytes, so we mark it reserved, and then we won't. Altering memory
> nodes is far more complicated and error-prone.

But your approach is going to be painful for kexec which will have to
duplicate that logic.

Again, why can't we just stick something in the kernel code that
reserves the last page ? It could be in prom.c or it could be called by
affected 4xx platforms by the platform code, whatever, but the reserve
map isn't really meant for that and will not be passed over from kernel
to kernel by kexec.

Ben.


WARNING: multiple messages have this Message-ID (diff)
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Hollis Blanchard <hollisb@us.ibm.com>
Cc: linuxppc-dev@ozlabs.org, yanok@emcraft.com,
	kvm-ppc@vger.kernel.org, dwg@au1.ibm.com
Subject: Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way
Date: Thu, 13 Nov 2008 07:44:56 +1100	[thread overview]
Message-ID: <1226522696.7154.28.camel@pasglop> (raw)
In-Reply-To: <1226502685.19156.2.camel@localhost.localdomain>

On Wed, 2008-11-12 at 09:11 -0600, Hollis Blanchard wrote:
> Forget pages. The errata is about the last 256 bytes of physical
> memory.
> 
> > I still find it a bit tricky to have memory nodes not aligned on
> nice
> > fat big boundaries tho.
> 
> I don't know what you're referring to. The patch I sent doesn't touch
> memory nodes, so they are indeed still aligned on nice fat big
> boundaries.

My last comment was about the approach of modifying the memory node.

> I don't think this is overengineering at all. We can't touch the last
> 256 bytes, so we mark it reserved, and then we won't. Altering memory
> nodes is far more complicated and error-prone.

But your approach is going to be painful for kexec which will have to
duplicate that logic.

Again, why can't we just stick something in the kernel code that
reserves the last page ? It could be in prom.c or it could be called by
affected 4xx platforms by the platform code, whatever, but the reserve
map isn't really meant for that and will not be passed over from kernel
to kernel by kexec.

Ben.

  reply	other threads:[~2008-11-12 20:44 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-11-12  0:06 [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way Hollis Blanchard
2008-11-12  0:09 ` [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more David Gibson
2008-11-12  0:09   ` [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way David Gibson
2008-11-12  4:37 ` [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more Benjamin Herrenschmidt
2008-11-12  4:37   ` [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way Benjamin Herrenschmidt
2008-11-12 11:31   ` [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more Josh Boyer
2008-11-12 11:31     ` [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way Josh Boyer
2008-11-12 11:52     ` [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more Benjamin Herrenschmidt
2008-11-12 11:52       ` [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way Benjamin Herrenschmidt
2008-11-12 15:11       ` [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more Hollis Blanchard
2008-11-12 15:11         ` [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way Hollis Blanchard
2008-11-12 20:44         ` Benjamin Herrenschmidt [this message]
2008-11-12 20:44           ` Benjamin Herrenschmidt
2008-11-12 20:53           ` [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more Josh Boyer
2008-11-12 20:53             ` [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way Josh Boyer
2008-11-13 19:54           ` [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more Hollis Blanchard
2008-11-13 19:54             ` [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way Hollis Blanchard

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