Re: Bug in linux omap clock framework?

[Tomi Valkeinen <tomi.valkeinen@nokia.com>]

On Sat, 2008-12-06 at 16:51 -0700, ext Paul Walmsley wrote:
> Hi Tomi,
> 
> nice test case.
> 
> On Fri, 5 Dec 2008, Tomi.Valkeinen@nokia.com wrote:
> 
> > I have had strange clk_enable() crashes with DSS2, and now I managed to
> > isolate it. With the included patch, on OMAP3 SDP board, with default
> > kernel config, I always get the crash below. In this example case it
> > happens at specific time on boot, but with DSS2 it happens randomly at
> > runtime, when I enable the DSS clocks.
> 
> Looks like there's some problem with the DSS driver's usage of 
> dss_tv_fclk.  Enabling dss_tv_fclk before entering your test code's 
> while-loop makes the problem go away here.  Patch below.
> 
> As an aside, your test patch does not actually disable dss1_fclk, since it 
> is already enabled by the time the while-loop starts.  So you might also 
> want to add a clk_disable(c2) before your while-loop starts, when you 
> test.
> 
> Based on the traceback that you sent, I'd conjecture that probably some 
> part of the DSS subsystem is generating an interrupt via DSS_IRQ; but then 
> dss_iclk ends up disabled, and the MPU INTC is not able to communicate 
> with the DSS, and the INTC wedges.  (The aborting access is to 0xd8200098, 
> the INTCPS_PENDING_IRQ0 register, rather than a DSS register.)  Probably 
> some IRQs need to be masked before disabling the dss_iclk.

It doesn't seem to be DSS related, the same crash happens also with
cam_ick and sgx_ick.

 Tomi