From: Philipp Zabel <philipp.zabel@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: Samuel Ortiz <sameo@linux.intel.com>,
Philipp Zabel <philipp.zabel@gmail.com>
Subject: [PATCH 1/7] MFD: ASIC3: add asic3_set_register common operation
Date: Fri, 5 Jun 2009 18:31:01 +0200 [thread overview]
Message-ID: <1244219467-32136-2-git-send-email-philipp.zabel@gmail.com> (raw)
In-Reply-To: <1244219467-32136-1-git-send-email-philipp.zabel@gmail.com>
Used to configure single bits of the SDHWCTRL_SDCONF and EXTCF_RESET/SELECT
registers needed for DS1WM, MMC/SDIO and PCMCIA functionality.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
---
drivers/mfd/asic3.c | 15 +++++++++++++++
include/linux/mfd/asic3.h | 10 +++++-----
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c
index 9e48545..ad3c591 100644
--- a/drivers/mfd/asic3.c
+++ b/drivers/mfd/asic3.c
@@ -52,6 +52,21 @@ static inline u32 asic3_read_register(struct asic3 *asic,
(reg >> asic->bus_shift));
}
+void asic3_set_register(struct asic3 *asic, u32 reg, u32 bits, bool set)
+{
+ unsigned long flags;
+ u32 val;
+
+ spin_lock_irqsave(&asic->lock, flags);
+ val = asic3_read_register(asic, reg);
+ if (set)
+ val |= bits;
+ else
+ val &= ~bits;
+ asic3_write_register(asic, reg, val);
+ spin_unlock_irqrestore(&asic->lock, flags);
+}
+
/* IRQs */
#define MAX_ASIC_ISR_LOOPS 20
#define ASIC3_GPIO_BASE_INCR \
diff --git a/include/linux/mfd/asic3.h b/include/linux/mfd/asic3.h
index 322cd6d..6b427ec 100644
--- a/include/linux/mfd/asic3.h
+++ b/include/linux/mfd/asic3.h
@@ -227,8 +227,8 @@ struct asic3_platform_data {
/* Basic control of the SD ASIC */
-#define ASIC3_SDHWCTRL_Base 0x0E00
-#define ASIC3_SDHWCTRL_SDConf 0x00
+#define ASIC3_SDHWCTRL_BASE 0x0E00
+#define ASIC3_SDHWCTRL_SDCONF 0x00
#define ASIC3_SDHWCTRL_SUSPEND (1 << 0) /* 1=suspend all SD operations */
#define ASIC3_SDHWCTRL_CLKSEL (1 << 1) /* 1=SDICK, 0=HCLK */
@@ -242,10 +242,10 @@ struct asic3_platform_data {
/* SD card power supply ctrl 1=enable */
#define ASIC3_SDHWCTRL_SDPWR (1 << 6)
-#define ASIC3_EXTCF_Base 0x1100
+#define ASIC3_EXTCF_BASE 0x1100
-#define ASIC3_EXTCF_Select 0x00
-#define ASIC3_EXTCF_Reset 0x04
+#define ASIC3_EXTCF_SELECT 0x00
+#define ASIC3_EXTCF_RESET 0x04
#define ASIC3_EXTCF_SMOD0 (1 << 0) /* slot number of mode 0 */
#define ASIC3_EXTCF_SMOD1 (1 << 1) /* slot number of mode 1 */
--
1.6.3.1
next prev parent reply other threads:[~2009-06-05 16:31 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-06-05 16:31 [PATCH 0/7] ASIC3 updates (v2) Philipp Zabel
2009-06-05 16:31 ` Philipp Zabel [this message]
2009-06-05 16:31 ` [PATCH 2/7] MFD: ASIC3: add clock handling for MFD cells Philipp Zabel
2009-06-05 16:31 ` [PATCH 3/7] MFD: ASIC3: add ASIC3 IRQ numbers Philipp Zabel
2009-06-05 16:31 ` [PATCH 4/7] MFD: ASIC3: use resource_size macro instead of local variable Philipp Zabel
2009-06-05 16:31 ` [PATCH 5/7] MFD: ASIC3: remove SD/SDIO controller register definitions Philipp Zabel
2009-06-05 16:31 ` [PATCH 6/7] MFD: ASIC3: enable DS1WM cell Philipp Zabel
2009-06-12 22:40 ` pHilipp Zabel
2009-06-05 16:31 ` [PATCH 7/7] MFD: ASIC3: enable SD/SDIO cell Philipp Zabel
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