* [PATCH v6 1/2] dt-bindings: arm: rockchip: Add Orange Pi 5b enum to Orange Pi 5 entry
@ 2024-10-15 19:28 ` Cenk Uluisik
0 siblings, 0 replies; 12+ messages in thread
From: Cenk Uluisik @ 2024-10-15 19:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Chris Morgan, Dragan Simic, Jonas Karlman, Andy Yan, Tim Lunn,
Jagan Teki, Michael Riesch, Jimmy Hon, Cenk Uluisik, Jing Luo,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
This extends the Xunlong Orange Pi 5 device tree binding with an enum for
the Orange Pi 5b, which is implemented before the device tree.
How does this board differ from the original Orange Pi 5?
- the Orange Pi 5 has a M.2 NVMe M-key PCI 2.0x1
slot (hooked to combphy0_ps) whereas the Orange Pi 5b uses combphy0_ps
for the WiFi.
- The Orange Pi 5 with the M.2 socket has a regulator defined hooked to
"GPIO0_C5" (i.e. PCIE_PWREN_H) whereas the Orange Pi 5B has GPIO0_C5
hooked to BT_WAKE_HOST.
- builtin eMMC storage
- no SPI NOR flash (u-boot, preboot etc. initiates
from within the eMMC
storage)
- ap6275p Wifi module (like the Orange Pi 5 Plus)
- builtin BlueTooth module
Signed-off-by: Cenk Uluisik <cenk.uluisik@googlemail.com>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 687823e58c22..62bb6587da8f 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -1051,7 +1051,9 @@ properties:
- description: Xunlong Orange Pi 5
items:
- - const: xunlong,orangepi-5
+ - enum:
+ - xunlong,orangepi-5
+ - xunlong,orangepi-5b
- const: rockchip,rk3588s
- description: Zkmagic A95X Z2
--
2.46.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v6 2/2] arm64: dts: rockchip: Add rk3588-orangepi-5b device tree and refactor
2024-10-15 19:28 ` Cenk Uluisik
@ 2024-10-15 19:28 ` Cenk Uluisik
-1 siblings, 0 replies; 12+ messages in thread
From: Cenk Uluisik @ 2024-10-15 19:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Chris Morgan, Jonas Karlman, Andy Yan, Tim Lunn, Jagan Teki,
Dragan Simic, Michael Riesch, Jimmy Hon, Jing Luo, Cenk Uluisik,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Implements a slightly modified rk3588s-orangepi-5b.dts from the vendor.
Unfortunately the &wireless_bluetooth and &wireless_wlan are not
implemented yet.
Bigger parts of the rk3588s-orangepi-5.dts file were moved into a new
rk3588s-orangepi-5.dtsi file, so that both device trees from the
orangepi-5 and 5b include from it and avoid including from the .dts.
This changes the Orange Pi 5's sdmmc alias to be mmc1, breaking existing
users if they used the /dev/mmc0 device file, so it's consistent with all
the other rk3588 DTS, which, is also the new default that rockchip wants
to use.
https://github.com/orangepi-xunlong/linux-orangepi/commit/
bce92d16b230b8e93c2831fb7768839fd7bbab04
Therefore add the sdhc alias to be mmc0 on the rk3588s-orangepi-5b.dts.
The "enable-active-low" warning is addressed here:
https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git/
commit/?h=v6.12-armsoc/dtsfixes&id=f4d29bebaa6118c1e51e8f1c21ce2b34f43e1479
The "leds-gpio" warning was already there because the DTS checking script
might not like the ID, which is probably avoidable by renaming it, but this
will be addressed in a seperate issue.
How does this board differ from the original Orange Pi 5?
- the Orange Pi 5 has a M.2 NVMe M-key PCI 2.0x1
slot (hooked to combphy0_ps) whereas the Orange Pi 5b uses combphy0_ps
for the WiFi.
- The Orange Pi 5 with the M.2 socket has a regulator defined hooked to
"GPIO0_C5" (i.e. PCIE_PWREN_H) whereas the Orange Pi 5B has GPIO0_C5
hooked to BT_WAKE_HOST.
- builtin eMMC storage
- no SPI NOR flash (u-boot, preboot etc. initiates
from within the eMMC
storage)
- ap6275p Wifi module (like the Orange Pi 5 Plus)
- builtin BlueTooth module
Signed-off-by: Cenk Uluisik <cenk.uluisik@googlemail.com>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3588s-orangepi-5.dts | 798 +-----------------
...orangepi-5.dts => rk3588s-orangepi-5.dtsi} | 36 +-
.../boot/dts/rockchip/rk3588s-orangepi-5b.dts | 18 +
4 files changed, 64 insertions(+), 789 deletions(-)
rewrite arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts (95%)
copy arch/arm64/boot/dts/rockchip/{rk3588s-orangepi-5.dts => rk3588s-orangepi-5.dtsi} (96%)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5b.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 09423070c992..45249ce15175 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -154,3 +154,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-odroid-m2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5b.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
dissimilarity index 95%
index feea6b20a6bf..9c0d1348281b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
@@ -1,766 +1,32 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/usb/pd.h>
-#include "rk3588s.dtsi"
-
-/ {
- model = "Xunlong Orange Pi 5";
- compatible = "xunlong,orangepi-5", "rockchip,rk3588s";
-
- aliases {
- ethernet0 = &gmac1;
- mmc0 = &sdmmc;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 1>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <100>;
-
- button-recovery {
- label = "Recovery";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <1800>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&leds_gpio>;
-
- led-1 {
- gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
- label = "status_led";
- linux,default-trigger = "heartbeat";
- };
- };
-
- vbus_typec: vbus-typec-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&typec5v_pwren>;
- regulator-name = "vbus_typec";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
- compatible = "regulator-fixed";
- enable-active-low;
- gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>;
- regulator-name = "vcc_3v3_sd_s0";
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_3v3_s3>;
- };
-
- vcc3v3_pcie20: vcc3v3-pcie20-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
- regulator-name = "vcc3v3_pcie20";
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- startup-delay-us = <50000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy0_ps {
- status = "okay";
-};
-
-&combphy2_psu {
- status = "okay";
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_b3 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&gmac1 {
- clock_in_out = "output";
- phy-handle = <&rgmii_phy1>;
- phy-mode = "rgmii-rxid";
- pinctrl-0 = <&gmac1_miim
- &gmac1_tx_bus2
- &gmac1_rx_bus2
- &gmac1_rgmii_clk
- &gmac1_rgmii_bus>;
- pinctrl-names = "default";
- tx_delay = <0x42>;
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu_s0>;
- status = "okay";
-};
-
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0m2_xfer>;
- status = "okay";
-
- vdd_cpu_big0_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big0_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big1_s0: regulator@43 {
- compatible = "rockchip,rk8603", "rockchip,rk8602";
- reg = <0x43>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big1_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c2 {
- status = "okay";
-
- vdd_npu_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_npu_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c6 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c6m3_xfer>;
- status = "okay";
-
- usbc0: usb-typec@22 {
- compatible = "fcs,fusb302";
- reg = <0x22>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&usbc0_int>;
- vbus-supply = <&vbus_typec>;
- status = "okay";
-
- usb_con: connector {
- compatible = "usb-c-connector";
- label = "USB-C";
- data-role = "dual";
- op-sink-microwatt = <1000000>;
- power-role = "dual";
- sink-pdos =
- <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
- source-pdos =
- <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
- try-power-role = "source";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- usbc0_hs: endpoint {
- remote-endpoint = <&usb_host0_xhci_drd_sw>;
- };
- };
-
- port@1 {
- reg = <1>;
- usbc0_ss: endpoint {
- remote-endpoint = <&usbdp_phy0_typec_ss>;
- };
- };
-
- port@2 {
- reg = <2>;
- usbc0_sbu: endpoint {
- remote-endpoint = <&usbdp_phy0_typec_sbu>;
- };
- };
- };
- };
- };
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
- wakeup-source;
- };
-};
-
-&mdio1 {
- rgmii_phy1: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x1>;
- reset-assert-us = <20000>;
- reset-deassert-us = <100000>;
- reset-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
- };
-};
-
-&pcie2x1l2 {
- reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie20>;
- status = "okay";
-};
-
-&pinctrl {
- gpio-func {
- leds_gpio: leds-gpio {
- rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb-typec {
- usbc0_int: usbc0-int {
- rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- typec5v_pwren: typec5v-pwren {
- rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&saradc {
- vref-supply = <&avcc_1v8_s0>;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-sd-highspeed;
- disable-wp;
- max-frequency = <150000000>;
- no-mmc;
- no-sdio;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3_sd_s0>;
- vqmmc-supply = <&vccio_sd_s0>;
- status = "okay";
-};
-
-&sfc {
- pinctrl-names = "default";
- pinctrl-0 = <&fspim0_pins>;
- status = "okay";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0x0>;
- spi-max-frequency = <100000000>;
- spi-rx-bus-width = <4>;
- spi-tx-bus-width = <1>;
- };
-};
-
-&spi2 {
- status = "okay";
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- num-cs = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
-
- pmic@0 {
- compatible = "rockchip,rk806";
- reg = <0x0>;
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
- spi-max-frequency = <1000000>;
- system-power-controller;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
- vcc13-supply = <&vcc_1v1_nldo_s3>;
- vcc14-supply = <&vcc_1v1_nldo_s3>;
- vcca-supply = <&vcc5v0_sys>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl1";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_gpu_s0: dcdc-reg1 {
- regulator-name = "vdd_gpu_s0";
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-enable-ramp-delay = <400>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: dcdc-reg2 {
- regulator-name = "vdd_cpu_lit_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-name = "vdd_log_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: dcdc-reg4 {
- regulator-name = "vdd_vdenc_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg5 {
- regulator-name = "vdd_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- vcc_1v1_nldo_s3: vdd2_ddr_s3: dcdc-reg6 {
- regulator-name = "vdd2_ddr_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1100000>;
- regulator-min-microvolt = <1100000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-name = "vdd_2v0_pldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vcc_3v3_s3: dcdc-reg8 {
- regulator-name = "vcc_3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-name = "vddq_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: dcdc-reg10 {
- regulator-name = "vcc_1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avcc_1v8_s0: pldo-reg1 {
- regulator-name = "avcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s0: pldo-reg2 {
- regulator-name = "vcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avdd_1v2_s0: pldo-reg3 {
- regulator-name = "avdd_1v2_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s0: pldo-reg4 {
- regulator-name = "vcc_3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-name = "vccio_sd_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- pldo6_s3: pldo-reg6 {
- regulator-name = "pldo6_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-name = "vdd_0v75_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_ddr_pll_s0: nldo-reg2 {
- regulator-name = "vdd_ddr_pll_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- avdd_0v75_s0: nldo-reg3 {
- regulator-name = "avdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v85_s0: nldo-reg4 {
- regulator-name = "vdd_0v85_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v75_s0: nldo-reg5 {
- regulator-name = "vdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&tsadc {
- status = "okay";
-};
-
-&u2phy0 {
- status = "okay";
-};
-
-&u2phy0_otg {
- status = "okay";
-};
-
-&u2phy2 {
- status = "okay";
-};
-
-&u2phy2_host {
- status = "okay";
-};
-
-&u2phy3 {
- status = "okay";
-};
-
-&u2phy3_host {
- status = "okay";
-};
-
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
-
-&usbdp_phy0 {
- mode-switch;
- orientation-switch;
- sbu1-dc-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
- sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
- status = "okay";
-
- port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- usbdp_phy0_typec_ss: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&usbc0_ss>;
- };
-
- usbdp_phy0_typec_sbu: endpoint@1 {
- reg = <1>;
- remote-endpoint = <&usbc0_sbu>;
- };
- };
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host0_xhci {
- dr_mode = "otg";
- usb-role-switch;
- status = "okay";
-
- port {
- usb_host0_xhci_drd_sw: endpoint {
- remote-endpoint = <&usbc0_hs>;
- };
- };
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usb_host2_xhci {
- status = "okay";
-};
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3588s-orangepi-5.dtsi"
+
+/ {
+ model = "Xunlong Orange Pi 5";
+ compatible = "xunlong,orangepi-5", "rockchip,rk3588s";
+
+ vcc3v3_pcie20: vcc3v3-pcie20-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+ regulator-name = "vcc3v3_pcie20";
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ startup-delay-us = <50000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&pcie2x1l2 {
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie20>;
+ status = "okay";
+};
+
+&sfc {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi
similarity index 96%
copy from arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
copy to arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi
index feea6b20a6bf..6436703a94f4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi
@@ -10,12 +10,9 @@
#include "rk3588s.dtsi"
/ {
- model = "Xunlong Orange Pi 5";
- compatible = "xunlong,orangepi-5", "rockchip,rk3588s";
-
aliases {
ethernet0 = &gmac1;
- mmc0 = &sdmmc;
+ mmc1 = &sdmmc;
};
chosen {
@@ -79,18 +76,6 @@ vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_s3>;
};
-
- vcc3v3_pcie20: vcc3v3-pcie20-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
- regulator-name = "vcc3v3_pcie20";
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- startup-delay-us = <50000>;
- vin-supply = <&vcc5v0_sys>;
- };
};
&combphy0_ps {
@@ -291,12 +276,6 @@ rgmii_phy1: ethernet-phy@1 {
};
};
-&pcie2x1l2 {
- reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie20>;
- status = "okay";
-};
-
&pinctrl {
gpio-func {
leds_gpio: leds-gpio {
@@ -326,6 +305,17 @@ &saradc {
status = "okay";
};
+&sdhci {
+ bus-width = <8>;
+ no-sdio;
+ no-sd;
+ non-removable;
+ max-frequency = <200000000>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ status = "disabled";
+};
+
&sdmmc {
bus-width = <4>;
cap-sd-highspeed;
@@ -342,7 +332,7 @@ &sdmmc {
&sfc {
pinctrl-names = "default";
pinctrl-0 = <&fspim0_pins>;
- status = "okay";
+ status = "disabled";
flash@0 {
compatible = "jedec,spi-nor";
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5b.dts
new file mode 100644
index 000000000000..158cc27c444c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5b.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3588s-orangepi-5.dtsi"
+
+/ {
+ model = "Xunlong Orange Pi 5B";
+ compatible = "xunlong,orangepi-5b", "rockchip,rk3588s";
+
+ aliases {
+ mmc0 = &sdhci;
+ };
+};
+
+&sdhci {
+ status = "okay";
+};
--
2.46.1
_______________________________________________
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Linux-rockchip@lists.infradead.org
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^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v6 2/2] arm64: dts: rockchip: Add rk3588-orangepi-5b device tree and refactor
@ 2024-10-15 19:28 ` Cenk Uluisik
0 siblings, 0 replies; 12+ messages in thread
From: Cenk Uluisik @ 2024-10-15 19:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Chris Morgan, Jonas Karlman, Andy Yan, Tim Lunn, Jagan Teki,
Dragan Simic, Michael Riesch, Jimmy Hon, Jing Luo, Cenk Uluisik,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Implements a slightly modified rk3588s-orangepi-5b.dts from the vendor.
Unfortunately the &wireless_bluetooth and &wireless_wlan are not
implemented yet.
Bigger parts of the rk3588s-orangepi-5.dts file were moved into a new
rk3588s-orangepi-5.dtsi file, so that both device trees from the
orangepi-5 and 5b include from it and avoid including from the .dts.
This changes the Orange Pi 5's sdmmc alias to be mmc1, breaking existing
users if they used the /dev/mmc0 device file, so it's consistent with all
the other rk3588 DTS, which, is also the new default that rockchip wants
to use.
https://github.com/orangepi-xunlong/linux-orangepi/commit/
bce92d16b230b8e93c2831fb7768839fd7bbab04
Therefore add the sdhc alias to be mmc0 on the rk3588s-orangepi-5b.dts.
The "enable-active-low" warning is addressed here:
https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git/
commit/?h=v6.12-armsoc/dtsfixes&id=f4d29bebaa6118c1e51e8f1c21ce2b34f43e1479
The "leds-gpio" warning was already there because the DTS checking script
might not like the ID, which is probably avoidable by renaming it, but this
will be addressed in a seperate issue.
How does this board differ from the original Orange Pi 5?
- the Orange Pi 5 has a M.2 NVMe M-key PCI 2.0x1
slot (hooked to combphy0_ps) whereas the Orange Pi 5b uses combphy0_ps
for the WiFi.
- The Orange Pi 5 with the M.2 socket has a regulator defined hooked to
"GPIO0_C5" (i.e. PCIE_PWREN_H) whereas the Orange Pi 5B has GPIO0_C5
hooked to BT_WAKE_HOST.
- builtin eMMC storage
- no SPI NOR flash (u-boot, preboot etc. initiates
from within the eMMC
storage)
- ap6275p Wifi module (like the Orange Pi 5 Plus)
- builtin BlueTooth module
Signed-off-by: Cenk Uluisik <cenk.uluisik@googlemail.com>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3588s-orangepi-5.dts | 798 +-----------------
...orangepi-5.dts => rk3588s-orangepi-5.dtsi} | 36 +-
.../boot/dts/rockchip/rk3588s-orangepi-5b.dts | 18 +
4 files changed, 64 insertions(+), 789 deletions(-)
rewrite arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts (95%)
copy arch/arm64/boot/dts/rockchip/{rk3588s-orangepi-5.dts => rk3588s-orangepi-5.dtsi} (96%)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5b.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 09423070c992..45249ce15175 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -154,3 +154,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-odroid-m2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5b.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
dissimilarity index 95%
index feea6b20a6bf..9c0d1348281b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
@@ -1,766 +1,32 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/usb/pd.h>
-#include "rk3588s.dtsi"
-
-/ {
- model = "Xunlong Orange Pi 5";
- compatible = "xunlong,orangepi-5", "rockchip,rk3588s";
-
- aliases {
- ethernet0 = &gmac1;
- mmc0 = &sdmmc;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 1>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <100>;
-
- button-recovery {
- label = "Recovery";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <1800>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&leds_gpio>;
-
- led-1 {
- gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
- label = "status_led";
- linux,default-trigger = "heartbeat";
- };
- };
-
- vbus_typec: vbus-typec-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&typec5v_pwren>;
- regulator-name = "vbus_typec";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
- compatible = "regulator-fixed";
- enable-active-low;
- gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>;
- regulator-name = "vcc_3v3_sd_s0";
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_3v3_s3>;
- };
-
- vcc3v3_pcie20: vcc3v3-pcie20-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
- regulator-name = "vcc3v3_pcie20";
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- startup-delay-us = <50000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy0_ps {
- status = "okay";
-};
-
-&combphy2_psu {
- status = "okay";
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_b3 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&gmac1 {
- clock_in_out = "output";
- phy-handle = <&rgmii_phy1>;
- phy-mode = "rgmii-rxid";
- pinctrl-0 = <&gmac1_miim
- &gmac1_tx_bus2
- &gmac1_rx_bus2
- &gmac1_rgmii_clk
- &gmac1_rgmii_bus>;
- pinctrl-names = "default";
- tx_delay = <0x42>;
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu_s0>;
- status = "okay";
-};
-
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0m2_xfer>;
- status = "okay";
-
- vdd_cpu_big0_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big0_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big1_s0: regulator@43 {
- compatible = "rockchip,rk8603", "rockchip,rk8602";
- reg = <0x43>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big1_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c2 {
- status = "okay";
-
- vdd_npu_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_npu_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c6 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c6m3_xfer>;
- status = "okay";
-
- usbc0: usb-typec@22 {
- compatible = "fcs,fusb302";
- reg = <0x22>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&usbc0_int>;
- vbus-supply = <&vbus_typec>;
- status = "okay";
-
- usb_con: connector {
- compatible = "usb-c-connector";
- label = "USB-C";
- data-role = "dual";
- op-sink-microwatt = <1000000>;
- power-role = "dual";
- sink-pdos =
- <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
- source-pdos =
- <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
- try-power-role = "source";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- usbc0_hs: endpoint {
- remote-endpoint = <&usb_host0_xhci_drd_sw>;
- };
- };
-
- port@1 {
- reg = <1>;
- usbc0_ss: endpoint {
- remote-endpoint = <&usbdp_phy0_typec_ss>;
- };
- };
-
- port@2 {
- reg = <2>;
- usbc0_sbu: endpoint {
- remote-endpoint = <&usbdp_phy0_typec_sbu>;
- };
- };
- };
- };
- };
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
- wakeup-source;
- };
-};
-
-&mdio1 {
- rgmii_phy1: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x1>;
- reset-assert-us = <20000>;
- reset-deassert-us = <100000>;
- reset-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
- };
-};
-
-&pcie2x1l2 {
- reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie20>;
- status = "okay";
-};
-
-&pinctrl {
- gpio-func {
- leds_gpio: leds-gpio {
- rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb-typec {
- usbc0_int: usbc0-int {
- rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- typec5v_pwren: typec5v-pwren {
- rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&saradc {
- vref-supply = <&avcc_1v8_s0>;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-sd-highspeed;
- disable-wp;
- max-frequency = <150000000>;
- no-mmc;
- no-sdio;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3_sd_s0>;
- vqmmc-supply = <&vccio_sd_s0>;
- status = "okay";
-};
-
-&sfc {
- pinctrl-names = "default";
- pinctrl-0 = <&fspim0_pins>;
- status = "okay";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0x0>;
- spi-max-frequency = <100000000>;
- spi-rx-bus-width = <4>;
- spi-tx-bus-width = <1>;
- };
-};
-
-&spi2 {
- status = "okay";
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- num-cs = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
-
- pmic@0 {
- compatible = "rockchip,rk806";
- reg = <0x0>;
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
- spi-max-frequency = <1000000>;
- system-power-controller;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
- vcc13-supply = <&vcc_1v1_nldo_s3>;
- vcc14-supply = <&vcc_1v1_nldo_s3>;
- vcca-supply = <&vcc5v0_sys>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl1";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_gpu_s0: dcdc-reg1 {
- regulator-name = "vdd_gpu_s0";
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-enable-ramp-delay = <400>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: dcdc-reg2 {
- regulator-name = "vdd_cpu_lit_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-name = "vdd_log_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: dcdc-reg4 {
- regulator-name = "vdd_vdenc_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg5 {
- regulator-name = "vdd_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- vcc_1v1_nldo_s3: vdd2_ddr_s3: dcdc-reg6 {
- regulator-name = "vdd2_ddr_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1100000>;
- regulator-min-microvolt = <1100000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-name = "vdd_2v0_pldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vcc_3v3_s3: dcdc-reg8 {
- regulator-name = "vcc_3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-name = "vddq_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: dcdc-reg10 {
- regulator-name = "vcc_1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avcc_1v8_s0: pldo-reg1 {
- regulator-name = "avcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s0: pldo-reg2 {
- regulator-name = "vcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avdd_1v2_s0: pldo-reg3 {
- regulator-name = "avdd_1v2_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s0: pldo-reg4 {
- regulator-name = "vcc_3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-name = "vccio_sd_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- pldo6_s3: pldo-reg6 {
- regulator-name = "pldo6_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-name = "vdd_0v75_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_ddr_pll_s0: nldo-reg2 {
- regulator-name = "vdd_ddr_pll_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- avdd_0v75_s0: nldo-reg3 {
- regulator-name = "avdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v85_s0: nldo-reg4 {
- regulator-name = "vdd_0v85_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v75_s0: nldo-reg5 {
- regulator-name = "vdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&tsadc {
- status = "okay";
-};
-
-&u2phy0 {
- status = "okay";
-};
-
-&u2phy0_otg {
- status = "okay";
-};
-
-&u2phy2 {
- status = "okay";
-};
-
-&u2phy2_host {
- status = "okay";
-};
-
-&u2phy3 {
- status = "okay";
-};
-
-&u2phy3_host {
- status = "okay";
-};
-
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
-
-&usbdp_phy0 {
- mode-switch;
- orientation-switch;
- sbu1-dc-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
- sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
- status = "okay";
-
- port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- usbdp_phy0_typec_ss: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&usbc0_ss>;
- };
-
- usbdp_phy0_typec_sbu: endpoint@1 {
- reg = <1>;
- remote-endpoint = <&usbc0_sbu>;
- };
- };
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host0_xhci {
- dr_mode = "otg";
- usb-role-switch;
- status = "okay";
-
- port {
- usb_host0_xhci_drd_sw: endpoint {
- remote-endpoint = <&usbc0_hs>;
- };
- };
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usb_host2_xhci {
- status = "okay";
-};
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3588s-orangepi-5.dtsi"
+
+/ {
+ model = "Xunlong Orange Pi 5";
+ compatible = "xunlong,orangepi-5", "rockchip,rk3588s";
+
+ vcc3v3_pcie20: vcc3v3-pcie20-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+ regulator-name = "vcc3v3_pcie20";
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ startup-delay-us = <50000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&pcie2x1l2 {
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie20>;
+ status = "okay";
+};
+
+&sfc {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi
similarity index 96%
copy from arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
copy to arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi
index feea6b20a6bf..6436703a94f4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi
@@ -10,12 +10,9 @@
#include "rk3588s.dtsi"
/ {
- model = "Xunlong Orange Pi 5";
- compatible = "xunlong,orangepi-5", "rockchip,rk3588s";
-
aliases {
ethernet0 = &gmac1;
- mmc0 = &sdmmc;
+ mmc1 = &sdmmc;
};
chosen {
@@ -79,18 +76,6 @@ vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_s3>;
};
-
- vcc3v3_pcie20: vcc3v3-pcie20-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
- regulator-name = "vcc3v3_pcie20";
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- startup-delay-us = <50000>;
- vin-supply = <&vcc5v0_sys>;
- };
};
&combphy0_ps {
@@ -291,12 +276,6 @@ rgmii_phy1: ethernet-phy@1 {
};
};
-&pcie2x1l2 {
- reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie20>;
- status = "okay";
-};
-
&pinctrl {
gpio-func {
leds_gpio: leds-gpio {
@@ -326,6 +305,17 @@ &saradc {
status = "okay";
};
+&sdhci {
+ bus-width = <8>;
+ no-sdio;
+ no-sd;
+ non-removable;
+ max-frequency = <200000000>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ status = "disabled";
+};
+
&sdmmc {
bus-width = <4>;
cap-sd-highspeed;
@@ -342,7 +332,7 @@ &sdmmc {
&sfc {
pinctrl-names = "default";
pinctrl-0 = <&fspim0_pins>;
- status = "okay";
+ status = "disabled";
flash@0 {
compatible = "jedec,spi-nor";
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5b.dts
new file mode 100644
index 000000000000..158cc27c444c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5b.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3588s-orangepi-5.dtsi"
+
+/ {
+ model = "Xunlong Orange Pi 5B";
+ compatible = "xunlong,orangepi-5b", "rockchip,rk3588s";
+
+ aliases {
+ mmc0 = &sdhci;
+ };
+};
+
+&sdhci {
+ status = "okay";
+};
--
2.46.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v6 2/2] arm64: dts: rockchip: Add rk3588-orangepi-5b device tree and refactor
2024-10-15 19:28 ` Cenk Uluisik
@ 2024-10-16 0:41 ` Jimmy Hon
-1 siblings, 0 replies; 12+ messages in thread
From: Jimmy Hon @ 2024-10-16 0:41 UTC (permalink / raw)
To: Cenk Uluisik
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Chris Morgan, Jonas Karlman, Andy Yan, Tim Lunn, Jagan Teki,
Dragan Simic, Michael Riesch, Jing Luo, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +
> +/dts-v1/;
> +
> +#include "rk3588s-orangepi-5.dtsi"
> +
> +/ {
> + model = "Xunlong Orange Pi 5";
> + compatible = "xunlong,orangepi-5", "rockchip,rk3588s";
> +
> + vcc3v3_pcie20: vcc3v3-pcie20-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
> + regulator-name = "vcc3v3_pcie20";
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + startup-delay-us = <50000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +};
> +
> +&pcie2x1l2 {
> + reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc3v3_pcie20>;
> + status = "okay";
> +};
> +
> +&sfc {
> + status = "okay";
> +};
Regression tested on the original Orange Pi 5. Still works after the refactor.
The microsd card is accessible from /dev/mmcblk1 just like the
vendor's 6.1 kernel.
NVMe works
SFC works
Tested-by: Jimmy Hon <honyuenkwun@gmail.com>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v6 2/2] arm64: dts: rockchip: Add rk3588-orangepi-5b device tree and refactor
@ 2024-10-16 0:41 ` Jimmy Hon
0 siblings, 0 replies; 12+ messages in thread
From: Jimmy Hon @ 2024-10-16 0:41 UTC (permalink / raw)
To: Cenk Uluisik
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Chris Morgan, Jonas Karlman, Andy Yan, Tim Lunn, Jagan Teki,
Dragan Simic, Michael Riesch, Jing Luo, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +
> +/dts-v1/;
> +
> +#include "rk3588s-orangepi-5.dtsi"
> +
> +/ {
> + model = "Xunlong Orange Pi 5";
> + compatible = "xunlong,orangepi-5", "rockchip,rk3588s";
> +
> + vcc3v3_pcie20: vcc3v3-pcie20-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
> + regulator-name = "vcc3v3_pcie20";
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + startup-delay-us = <50000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +};
> +
> +&pcie2x1l2 {
> + reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc3v3_pcie20>;
> + status = "okay";
> +};
> +
> +&sfc {
> + status = "okay";
> +};
Regression tested on the original Orange Pi 5. Still works after the refactor.
The microsd card is accessible from /dev/mmcblk1 just like the
vendor's 6.1 kernel.
NVMe works
SFC works
Tested-by: Jimmy Hon <honyuenkwun@gmail.com>
^ permalink raw reply [flat|nested] 12+ messages in thread
[parent not found: <CAAWLpRtOcxc7=EAw6NPtkwqCNJ0LRE50StjZ4h4ra7wvhsyeaA@mail.gmail.com>]
* Re: [PATCH v6 2/2] arm64: dts: rockchip: Add rk3588-orangepi-5b device tree and refactor
[not found] ` <CAAWLpRtOcxc7=EAw6NPtkwqCNJ0LRE50StjZ4h4ra7wvhsyeaA@mail.gmail.com>
@ 2024-10-16 1:09 ` Dragan Simic
0 siblings, 0 replies; 12+ messages in thread
From: Dragan Simic @ 2024-10-16 1:09 UTC (permalink / raw)
To: Cenk Uluisik
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Chris Morgan, Jonas Karlman, Andy Yan, Tim Lunn, Jagan Teki,
Michael Riesch, Jimmy Hon, Jing Luo, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel
Hello Cenk,
On 2024-10-15 21:33, Cenk Uluisik wrote:
> I accidently didnt save the Patch Version on the first email, it's the
> same patch but with fixed versioning. It was an accident, sorry.
As I suggested already, it's always a good idea to send patches
to your own email address first, before sending them to the ML(s),
to check the patches one last time and make sure everything looks
good. That's the way I do it, FWIW.
> Am Di., 15. Okt. 2024 um 21:29 Uhr schrieb Cenk Uluisik
> <cenk.uluisik@googlemail.com>:
>
>> Implements a slightly modified rk3588s-orangepi-5b.dts from the
>> vendor.
>> Unfortunately the &wireless_bluetooth and &wireless_wlan are not
>> implemented yet.
>>
>> Bigger parts of the rk3588s-orangepi-5.dts file were moved into a
>> new
>> rk3588s-orangepi-5.dtsi file, so that both device trees from the
>> orangepi-5 and 5b include from it and avoid including from the .dts.
>>
>> This changes the Orange Pi 5's sdmmc alias to be mmc1, breaking
>> existing
>> users if they used the /dev/mmc0 device file, so it's consistent
>> with all
>> the other rk3588 DTS, which, is also the new default that rockchip
>> wants
>> to use.
>> https://github.com/orangepi-xunlong/linux-orangepi/commit/
>> bce92d16b230b8e93c2831fb7768839fd7bbab04
>> Therefore add the sdhc alias to be mmc0 on the
>> rk3588s-orangepi-5b.dts.
>>
>> The "enable-active-low" warning is addressed here:
>>
> https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git/
>>
> commit/?h=v6.12-armsoc/dtsfixes&id=f4d29bebaa6118c1e51e8f1c21ce2b34f43e1479
>> The "leds-gpio" warning was already there because the DTS checking
>> script
>> might not like the ID, which is probably avoidable by renaming it,
>> but this
>> will be addressed in a seperate issue.
>>
>> How does this board differ from the original Orange Pi 5?
>> - the Orange Pi 5 has a M.2 NVMe M-key PCI 2.0x1
>> slot (hooked to combphy0_ps) whereas the Orange Pi 5b uses
>> combphy0_ps
>> for the WiFi.
>> - The Orange Pi 5 with the M.2 socket has a regulator defined
>> hooked to
>> "GPIO0_C5" (i.e. PCIE_PWREN_H) whereas the Orange Pi 5B has
>> GPIO0_C5
>> hooked to BT_WAKE_HOST.
>> - builtin eMMC storage
>> - no SPI NOR flash (u-boot, preboot etc. initiates
>> from within the eMMC
>> storage)
>> - ap6275p Wifi module (like the Orange Pi 5 Plus)
>> - builtin BlueTooth module
>>
>> Signed-off-by: Cenk Uluisik <cenk.uluisik@googlemail.com>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v6 2/2] arm64: dts: rockchip: Add rk3588-orangepi-5b device tree and refactor
@ 2024-10-16 1:09 ` Dragan Simic
0 siblings, 0 replies; 12+ messages in thread
From: Dragan Simic @ 2024-10-16 1:09 UTC (permalink / raw)
To: Cenk Uluisik
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Chris Morgan, Jonas Karlman, Andy Yan, Tim Lunn, Jagan Teki,
Michael Riesch, Jimmy Hon, Jing Luo, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel
Hello Cenk,
On 2024-10-15 21:33, Cenk Uluisik wrote:
> I accidently didnt save the Patch Version on the first email, it's the
> same patch but with fixed versioning. It was an accident, sorry.
As I suggested already, it's always a good idea to send patches
to your own email address first, before sending them to the ML(s),
to check the patches one last time and make sure everything looks
good. That's the way I do it, FWIW.
> Am Di., 15. Okt. 2024 um 21:29 Uhr schrieb Cenk Uluisik
> <cenk.uluisik@googlemail.com>:
>
>> Implements a slightly modified rk3588s-orangepi-5b.dts from the
>> vendor.
>> Unfortunately the &wireless_bluetooth and &wireless_wlan are not
>> implemented yet.
>>
>> Bigger parts of the rk3588s-orangepi-5.dts file were moved into a
>> new
>> rk3588s-orangepi-5.dtsi file, so that both device trees from the
>> orangepi-5 and 5b include from it and avoid including from the .dts.
>>
>> This changes the Orange Pi 5's sdmmc alias to be mmc1, breaking
>> existing
>> users if they used the /dev/mmc0 device file, so it's consistent
>> with all
>> the other rk3588 DTS, which, is also the new default that rockchip
>> wants
>> to use.
>> https://github.com/orangepi-xunlong/linux-orangepi/commit/
>> bce92d16b230b8e93c2831fb7768839fd7bbab04
>> Therefore add the sdhc alias to be mmc0 on the
>> rk3588s-orangepi-5b.dts.
>>
>> The "enable-active-low" warning is addressed here:
>>
> https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git/
>>
> commit/?h=v6.12-armsoc/dtsfixes&id=f4d29bebaa6118c1e51e8f1c21ce2b34f43e1479
>> The "leds-gpio" warning was already there because the DTS checking
>> script
>> might not like the ID, which is probably avoidable by renaming it,
>> but this
>> will be addressed in a seperate issue.
>>
>> How does this board differ from the original Orange Pi 5?
>> - the Orange Pi 5 has a M.2 NVMe M-key PCI 2.0x1
>> slot (hooked to combphy0_ps) whereas the Orange Pi 5b uses
>> combphy0_ps
>> for the WiFi.
>> - The Orange Pi 5 with the M.2 socket has a regulator defined
>> hooked to
>> "GPIO0_C5" (i.e. PCIE_PWREN_H) whereas the Orange Pi 5B has
>> GPIO0_C5
>> hooked to BT_WAKE_HOST.
>> - builtin eMMC storage
>> - no SPI NOR flash (u-boot, preboot etc. initiates
>> from within the eMMC
>> storage)
>> - ap6275p Wifi module (like the Orange Pi 5 Plus)
>> - builtin BlueTooth module
>>
>> Signed-off-by: Cenk Uluisik <cenk.uluisik@googlemail.com>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v6 1/2] dt-bindings: arm: rockchip: Add Orange Pi 5b enum to Orange Pi 5 entry
2024-10-15 19:28 ` Cenk Uluisik
@ 2024-10-15 20:37 ` Rob Herring
-1 siblings, 0 replies; 12+ messages in thread
From: Rob Herring @ 2024-10-15 20:37 UTC (permalink / raw)
To: Cenk Uluisik
Cc: Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Chris Morgan,
Dragan Simic, Jonas Karlman, Andy Yan, Tim Lunn, Jagan Teki,
Michael Riesch, Jimmy Hon, Jing Luo, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel
On Tue, Oct 15, 2024 at 09:28:35PM +0200, Cenk Uluisik wrote:
> This extends the Xunlong Orange Pi 5 device tree binding with an enum for
> the Orange Pi 5b, which is implemented before the device tree.
>
> How does this board differ from the original Orange Pi 5?
> - the Orange Pi 5 has a M.2 NVMe M-key PCI 2.0x1
> slot (hooked to combphy0_ps) whereas the Orange Pi 5b uses combphy0_ps
> for the WiFi.
> - The Orange Pi 5 with the M.2 socket has a regulator defined hooked to
> "GPIO0_C5" (i.e. PCIE_PWREN_H) whereas the Orange Pi 5B has GPIO0_C5
> hooked to BT_WAKE_HOST.
> - builtin eMMC storage
> - no SPI NOR flash (u-boot, preboot etc. initiates
> from within the eMMC
> storage)
> - ap6275p Wifi module (like the Orange Pi 5 Plus)
> - builtin BlueTooth module
>
> Signed-off-by: Cenk Uluisik <cenk.uluisik@googlemail.com>
> ---
> Documentation/devicetree/bindings/arm/rockchip.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Well, still kind of too fast because I just acked v5. Before you send
v7, read the process for adding tags.
You should also read the part on adding change log to your patches.
>
> diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
> index 687823e58c22..62bb6587da8f 100644
> --- a/Documentation/devicetree/bindings/arm/rockchip.yaml
> +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
> @@ -1051,7 +1051,9 @@ properties:
>
> - description: Xunlong Orange Pi 5
> items:
> - - const: xunlong,orangepi-5
> + - enum:
> + - xunlong,orangepi-5
> + - xunlong,orangepi-5b
> - const: rockchip,rk3588s
>
> - description: Zkmagic A95X Z2
> --
> 2.46.1
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v6 1/2] dt-bindings: arm: rockchip: Add Orange Pi 5b enum to Orange Pi 5 entry
@ 2024-10-15 20:37 ` Rob Herring
0 siblings, 0 replies; 12+ messages in thread
From: Rob Herring @ 2024-10-15 20:37 UTC (permalink / raw)
To: Cenk Uluisik
Cc: Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Chris Morgan,
Dragan Simic, Jonas Karlman, Andy Yan, Tim Lunn, Jagan Teki,
Michael Riesch, Jimmy Hon, Jing Luo, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel
On Tue, Oct 15, 2024 at 09:28:35PM +0200, Cenk Uluisik wrote:
> This extends the Xunlong Orange Pi 5 device tree binding with an enum for
> the Orange Pi 5b, which is implemented before the device tree.
>
> How does this board differ from the original Orange Pi 5?
> - the Orange Pi 5 has a M.2 NVMe M-key PCI 2.0x1
> slot (hooked to combphy0_ps) whereas the Orange Pi 5b uses combphy0_ps
> for the WiFi.
> - The Orange Pi 5 with the M.2 socket has a regulator defined hooked to
> "GPIO0_C5" (i.e. PCIE_PWREN_H) whereas the Orange Pi 5B has GPIO0_C5
> hooked to BT_WAKE_HOST.
> - builtin eMMC storage
> - no SPI NOR flash (u-boot, preboot etc. initiates
> from within the eMMC
> storage)
> - ap6275p Wifi module (like the Orange Pi 5 Plus)
> - builtin BlueTooth module
>
> Signed-off-by: Cenk Uluisik <cenk.uluisik@googlemail.com>
> ---
> Documentation/devicetree/bindings/arm/rockchip.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Well, still kind of too fast because I just acked v5. Before you send
v7, read the process for adding tags.
You should also read the part on adding change log to your patches.
>
> diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
> index 687823e58c22..62bb6587da8f 100644
> --- a/Documentation/devicetree/bindings/arm/rockchip.yaml
> +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
> @@ -1051,7 +1051,9 @@ properties:
>
> - description: Xunlong Orange Pi 5
> items:
> - - const: xunlong,orangepi-5
> + - enum:
> + - xunlong,orangepi-5
> + - xunlong,orangepi-5b
> - const: rockchip,rk3588s
>
> - description: Zkmagic A95X Z2
> --
> 2.46.1
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v6 1/2] dt-bindings: arm: rockchip: Add Orange Pi 5b enum to Orange Pi 5 entry
2024-10-15 19:28 ` Cenk Uluisik
@ 2024-10-22 13:30 ` Heiko Stuebner
-1 siblings, 0 replies; 12+ messages in thread
From: Heiko Stuebner @ 2024-10-22 13:30 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chris Morgan,
Dragan Simic, Jonas Karlman, Andy Yan, Tim Lunn, Jagan Teki,
Michael Riesch, Jimmy Hon, Cenk Uluisik, Jing Luo, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, Cenk Uluisik
Am Dienstag, 15. Oktober 2024, 21:28:35 CEST schrieb Cenk Uluisik:
> This extends the Xunlong Orange Pi 5 device tree binding with an enum for
> the Orange Pi 5b, which is implemented before the device tree.
>
> How does this board differ from the original Orange Pi 5?
> - the Orange Pi 5 has a M.2 NVMe M-key PCI 2.0x1
> slot (hooked to combphy0_ps) whereas the Orange Pi 5b uses combphy0_ps
> for the WiFi.
> - The Orange Pi 5 with the M.2 socket has a regulator defined hooked to
> "GPIO0_C5" (i.e. PCIE_PWREN_H) whereas the Orange Pi 5B has GPIO0_C5
> hooked to BT_WAKE_HOST.
> - builtin eMMC storage
> - no SPI NOR flash (u-boot, preboot etc. initiates
> from within the eMMC
> storage)
> - ap6275p Wifi module (like the Orange Pi 5 Plus)
> - builtin BlueTooth module
>
> Signed-off-by: Cenk Uluisik <cenk.uluisik@googlemail.com>
> ---
In its v5, this patch received [0] a
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
which overlapped with this version getting sent out.
The patch contents look identical between that version and this one.
Heiko
[0] https://lore.kernel.org/all/172902320363.1787838.552661206100007627.robh@kernel.org/
> Documentation/devicetree/bindings/arm/rockchip.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
> index 687823e58c22..62bb6587da8f 100644
> --- a/Documentation/devicetree/bindings/arm/rockchip.yaml
> +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
> @@ -1051,7 +1051,9 @@ properties:
>
> - description: Xunlong Orange Pi 5
> items:
> - - const: xunlong,orangepi-5
> + - enum:
> + - xunlong,orangepi-5
> + - xunlong,orangepi-5b
> - const: rockchip,rk3588s
>
> - description: Zkmagic A95X Z2
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v6 1/2] dt-bindings: arm: rockchip: Add Orange Pi 5b enum to Orange Pi 5 entry
@ 2024-10-22 13:30 ` Heiko Stuebner
0 siblings, 0 replies; 12+ messages in thread
From: Heiko Stuebner @ 2024-10-22 13:30 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chris Morgan,
Dragan Simic, Jonas Karlman, Andy Yan, Tim Lunn, Jagan Teki,
Michael Riesch, Jimmy Hon, Cenk Uluisik, Jing Luo, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, Cenk Uluisik
Am Dienstag, 15. Oktober 2024, 21:28:35 CEST schrieb Cenk Uluisik:
> This extends the Xunlong Orange Pi 5 device tree binding with an enum for
> the Orange Pi 5b, which is implemented before the device tree.
>
> How does this board differ from the original Orange Pi 5?
> - the Orange Pi 5 has a M.2 NVMe M-key PCI 2.0x1
> slot (hooked to combphy0_ps) whereas the Orange Pi 5b uses combphy0_ps
> for the WiFi.
> - The Orange Pi 5 with the M.2 socket has a regulator defined hooked to
> "GPIO0_C5" (i.e. PCIE_PWREN_H) whereas the Orange Pi 5B has GPIO0_C5
> hooked to BT_WAKE_HOST.
> - builtin eMMC storage
> - no SPI NOR flash (u-boot, preboot etc. initiates
> from within the eMMC
> storage)
> - ap6275p Wifi module (like the Orange Pi 5 Plus)
> - builtin BlueTooth module
>
> Signed-off-by: Cenk Uluisik <cenk.uluisik@googlemail.com>
> ---
In its v5, this patch received [0] a
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
which overlapped with this version getting sent out.
The patch contents look identical between that version and this one.
Heiko
[0] https://lore.kernel.org/all/172902320363.1787838.552661206100007627.robh@kernel.org/
> Documentation/devicetree/bindings/arm/rockchip.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
> index 687823e58c22..62bb6587da8f 100644
> --- a/Documentation/devicetree/bindings/arm/rockchip.yaml
> +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
> @@ -1051,7 +1051,9 @@ properties:
>
> - description: Xunlong Orange Pi 5
> items:
> - - const: xunlong,orangepi-5
> + - enum:
> + - xunlong,orangepi-5
> + - xunlong,orangepi-5b
> - const: rockchip,rk3588s
>
> - description: Zkmagic A95X Z2
>
^ permalink raw reply [flat|nested] 12+ messages in thread