From: Ben Dooks <ben-linux@fluff.org>
To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org
Subject: [S3C-CLK] ARM: S3C64XX: Cleanup common init code in s3c6400-clock.c
Date: Fri, 8 Jan 2010 02:30:11 +0000 [thread overview]
Message-ID: <1262917822-26004-4-git-send-email-ben-linux@fluff.org> (raw)
In-Reply-To: <1262917822-26004-1-git-send-email-ben-linux@fluff.org>
Remove the four fields from clksrc_clk.clk which are always the same
and init them when the clock is registered. This helps remove the amount
of repeated code.
This is a re-work of Harald Welte's clock changes for the latest kernel.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
---
arch/arm/plat-s3c64xx/s3c6400-clock.c | 49 +++-----------------------------
1 files changed, 5 insertions(+), 44 deletions(-)
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
index ffd56de..aba08c7 100644
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c
@@ -360,10 +360,6 @@ static struct clksrc_clk clk_mmc0 = {
.id = 0,
.ctrlbit = S3C_CLKCON_SCLK_MMC0,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_MMC0_SHIFT,
.mask = S3C6400_CLKSRC_MMC0_MASK,
@@ -378,10 +374,6 @@ static struct clksrc_clk clk_mmc1 = {
.id = 1,
.ctrlbit = S3C_CLKCON_SCLK_MMC1,
.enable = s3c64xx_sclk_ctrl,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .set_parent = s3c64xx_setparent_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_MMC1_SHIFT,
.mask = S3C6400_CLKSRC_MMC1_MASK,
@@ -396,10 +388,6 @@ static struct clksrc_clk clk_mmc2 = {
.id = 2,
.ctrlbit = S3C_CLKCON_SCLK_MMC2,
.enable = s3c64xx_sclk_ctrl,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .set_parent = s3c64xx_setparent_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_MMC2_SHIFT,
.mask = S3C6400_CLKSRC_MMC2_MASK,
@@ -414,10 +402,6 @@ static struct clksrc_clk clk_usbhost = {
.id = -1,
.ctrlbit = S3C_CLKCON_SCLK_UHOST,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_UHOST_SHIFT,
.mask = S3C6400_CLKSRC_UHOST_MASK,
@@ -432,10 +416,6 @@ static struct clksrc_clk clk_uart_uclk1 = {
.id = -1,
.ctrlbit = S3C_CLKCON_SCLK_UART,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_UART_SHIFT,
.mask = S3C6400_CLKSRC_UART_MASK,
@@ -452,10 +432,6 @@ static struct clksrc_clk clk_spi0 = {
.id = 0,
.ctrlbit = S3C_CLKCON_SCLK_SPI0,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_SPI0_SHIFT,
.mask = S3C6400_CLKSRC_SPI0_MASK,
@@ -470,10 +446,6 @@ static struct clksrc_clk clk_spi1 = {
.id = 1,
.ctrlbit = S3C_CLKCON_SCLK_SPI1,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_SPI1_SHIFT,
.mask = S3C6400_CLKSRC_SPI1_MASK,
@@ -516,10 +488,6 @@ static struct clksrc_clk clk_audio0 = {
.id = 0,
.ctrlbit = S3C_CLKCON_SCLK_AUDIO0,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_AUDIO0_SHIFT,
.mask = S3C6400_CLKSRC_AUDIO0_MASK,
@@ -547,10 +515,6 @@ static struct clksrc_clk clk_audio1 = {
.id = 1,
.ctrlbit = S3C_CLKCON_SCLK_AUDIO1,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_AUDIO1_SHIFT,
.mask = S3C6400_CLKSRC_AUDIO1_MASK,
@@ -565,10 +529,6 @@ static struct clksrc_clk clk_irda = {
.id = 0,
.ctrlbit = S3C_CLKCON_SCLK_IRDA,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_IRDA_SHIFT,
.mask = S3C6400_CLKSRC_IRDA_MASK,
@@ -592,10 +552,6 @@ static struct clksrc_clk clk_camif = {
.id = -1,
.ctrlbit = S3C_CLKCON_SCLK_CAM,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = 0,
.mask = 0,
@@ -637,6 +593,11 @@ static void __init_or_cpufreq s3c6400_set_clksrc(struct clksrc_clk *clk)
return;
}
+ clk->clk.get_rate = s3c64xx_getrate_clksrc;
+ clk->clk.set_rate = s3c64xx_setrate_clksrc;
+ clk->clk.set_parent = s3c64xx_setparent_clksrc;
+ clk->clk.round_rate = s3c64xx_roundrate_clksrc;
+
clk->clk.parent = srcs->sources[clksrc];
printk(KERN_INFO "%s: source is %s (%d), rate is %ld\n",
--
1.6.0.4
WARNING: multiple messages have this Message-ID (diff)
From: ben-linux@fluff.org (Ben Dooks)
To: linux-arm-kernel@lists.infradead.org
Subject: [S3C-CLK] ARM: S3C64XX: Cleanup common init code in s3c6400-clock.c
Date: Fri, 8 Jan 2010 02:30:11 +0000 [thread overview]
Message-ID: <1262917822-26004-4-git-send-email-ben-linux@fluff.org> (raw)
In-Reply-To: <1262917822-26004-1-git-send-email-ben-linux@fluff.org>
Remove the four fields from clksrc_clk.clk which are always the same
and init them when the clock is registered. This helps remove the amount
of repeated code.
This is a re-work of Harald Welte's clock changes for the latest kernel.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
---
arch/arm/plat-s3c64xx/s3c6400-clock.c | 49 +++-----------------------------
1 files changed, 5 insertions(+), 44 deletions(-)
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
index ffd56de..aba08c7 100644
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c
@@ -360,10 +360,6 @@ static struct clksrc_clk clk_mmc0 = {
.id = 0,
.ctrlbit = S3C_CLKCON_SCLK_MMC0,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_MMC0_SHIFT,
.mask = S3C6400_CLKSRC_MMC0_MASK,
@@ -378,10 +374,6 @@ static struct clksrc_clk clk_mmc1 = {
.id = 1,
.ctrlbit = S3C_CLKCON_SCLK_MMC1,
.enable = s3c64xx_sclk_ctrl,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .set_parent = s3c64xx_setparent_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_MMC1_SHIFT,
.mask = S3C6400_CLKSRC_MMC1_MASK,
@@ -396,10 +388,6 @@ static struct clksrc_clk clk_mmc2 = {
.id = 2,
.ctrlbit = S3C_CLKCON_SCLK_MMC2,
.enable = s3c64xx_sclk_ctrl,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .set_parent = s3c64xx_setparent_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_MMC2_SHIFT,
.mask = S3C6400_CLKSRC_MMC2_MASK,
@@ -414,10 +402,6 @@ static struct clksrc_clk clk_usbhost = {
.id = -1,
.ctrlbit = S3C_CLKCON_SCLK_UHOST,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_UHOST_SHIFT,
.mask = S3C6400_CLKSRC_UHOST_MASK,
@@ -432,10 +416,6 @@ static struct clksrc_clk clk_uart_uclk1 = {
.id = -1,
.ctrlbit = S3C_CLKCON_SCLK_UART,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_UART_SHIFT,
.mask = S3C6400_CLKSRC_UART_MASK,
@@ -452,10 +432,6 @@ static struct clksrc_clk clk_spi0 = {
.id = 0,
.ctrlbit = S3C_CLKCON_SCLK_SPI0,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_SPI0_SHIFT,
.mask = S3C6400_CLKSRC_SPI0_MASK,
@@ -470,10 +446,6 @@ static struct clksrc_clk clk_spi1 = {
.id = 1,
.ctrlbit = S3C_CLKCON_SCLK_SPI1,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_SPI1_SHIFT,
.mask = S3C6400_CLKSRC_SPI1_MASK,
@@ -516,10 +488,6 @@ static struct clksrc_clk clk_audio0 = {
.id = 0,
.ctrlbit = S3C_CLKCON_SCLK_AUDIO0,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_AUDIO0_SHIFT,
.mask = S3C6400_CLKSRC_AUDIO0_MASK,
@@ -547,10 +515,6 @@ static struct clksrc_clk clk_audio1 = {
.id = 1,
.ctrlbit = S3C_CLKCON_SCLK_AUDIO1,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_AUDIO1_SHIFT,
.mask = S3C6400_CLKSRC_AUDIO1_MASK,
@@ -565,10 +529,6 @@ static struct clksrc_clk clk_irda = {
.id = 0,
.ctrlbit = S3C_CLKCON_SCLK_IRDA,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = S3C6400_CLKSRC_IRDA_SHIFT,
.mask = S3C6400_CLKSRC_IRDA_MASK,
@@ -592,10 +552,6 @@ static struct clksrc_clk clk_camif = {
.id = -1,
.ctrlbit = S3C_CLKCON_SCLK_CAM,
.enable = s3c64xx_sclk_ctrl,
- .set_parent = s3c64xx_setparent_clksrc,
- .get_rate = s3c64xx_getrate_clksrc,
- .set_rate = s3c64xx_setrate_clksrc,
- .round_rate = s3c64xx_roundrate_clksrc,
},
.shift = 0,
.mask = 0,
@@ -637,6 +593,11 @@ static void __init_or_cpufreq s3c6400_set_clksrc(struct clksrc_clk *clk)
return;
}
+ clk->clk.get_rate = s3c64xx_getrate_clksrc;
+ clk->clk.set_rate = s3c64xx_setrate_clksrc;
+ clk->clk.set_parent = s3c64xx_setparent_clksrc;
+ clk->clk.round_rate = s3c64xx_roundrate_clksrc;
+
clk->clk.parent = srcs->sources[clksrc];
printk(KERN_INFO "%s: source is %s (%d), rate is %ld\n",
--
1.6.0.4
next prev parent reply other threads:[~2010-01-08 2:30 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-01-08 2:30 Samsung SoC clock updates Ben Dooks
2010-01-08 2:30 ` Ben Dooks
2010-01-08 2:30 ` [S3C-CLK] ARM: S3C64XX: Fix possible clock look in EPLL and MPLL clock chains Ben Dooks
2010-01-08 2:30 ` Ben Dooks
2010-01-08 2:30 ` [S3C-CLK] ARM: SAMSUNG: Move <plat/clock.h> to plat-samsung Ben Dooks
2010-01-08 2:30 ` Ben Dooks
2010-01-08 2:30 ` Ben Dooks [this message]
2010-01-08 2:30 ` [S3C-CLK] ARM: S3C64XX: Cleanup common init code in s3c6400-clock.c Ben Dooks
2010-01-08 2:30 ` [S3C-CLK] ARM: S3C64XX: Compress s3c6400-clock.c code Ben Dooks
2010-01-08 2:30 ` Ben Dooks
2010-01-08 2:30 ` [S3C-CLK] ARM: SAMSUNG: Add core clock implementation for clksrc based clocks Ben Dooks
2010-01-08 2:30 ` Ben Dooks
2010-01-08 2:30 ` [S3C-CLK] ARM: S3C64XX: Use new clock-clksrc.c code for clocks Ben Dooks
2010-01-08 2:30 ` Ben Dooks
2010-01-08 2:30 ` [S3C-CLK] ARM: S3C64XX: Remove unused clock definitions from clock header Ben Dooks
2010-01-08 2:30 ` Ben Dooks
2010-01-08 2:30 ` [S3C-CLK] ARM: SAMSUNG: Reduce size of struct clk Ben Dooks
2010-01-08 2:30 ` Ben Dooks
2010-01-08 2:30 ` [S3C-CLK] ARM: S3C64XX: Fixup .reg_src and .reg_div with named initialisers Ben Dooks
2010-01-08 2:30 ` Ben Dooks
2010-01-08 2:30 ` [S3C-CLK] ARM: S3C64XX: Avoid announcing clksrc clocks twice Ben Dooks
2010-01-08 2:30 ` Ben Dooks
2010-01-08 2:30 ` [S3C-CLK] ARM: SAMSUNG: Move clock.c to arch/arm/plat-samsung Ben Dooks
2010-01-08 2:30 ` Ben Dooks
2010-01-08 2:30 ` [S3C-CLK] ARM: SAMSUNG: Do not allow get/set/round rate calls with no divider Ben Dooks
2010-01-08 2:30 ` Ben Dooks
2010-01-08 2:30 ` [S3C-CLK] ARM: SAMSUNG: Add call to register array of clocks Ben Dooks
2010-01-08 2:30 ` Ben Dooks
2010-01-08 2:30 ` [S3C-CLK] ARM: SAMSUNG: Do not register set_parent call if no source Ben Dooks
2010-01-08 2:30 ` Ben Dooks
2010-01-12 9:16 ` Samsung SoC clock updates Russell King - ARM Linux
2010-01-12 9:16 ` Russell King - ARM Linux
2010-01-12 22:03 ` Ben Dooks
2010-01-12 22:03 ` Ben Dooks
2010-01-12 22:48 ` Mark Brown
2010-01-12 22:48 ` Mark Brown
2010-01-12 23:50 ` Ben Dooks
2010-01-12 23:50 ` Ben Dooks
2010-01-13 11:57 ` Mark Brown
2010-01-13 11:57 ` Mark Brown
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