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From: Michael Morrell <mmorrell@tachyum.com>
To: Richard Henderson <richard.henderson@linaro.org>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Subject: RE: Denormal input handling
Date: Tue, 22 Jun 2021 18:50:26 +0000	[thread overview]
Message-ID: <12642a513386433f8697de0be358e6e4@tachyum.com> (raw)
In-Reply-To: <c1b992e063414da88b686e8f6e9642f2@tachyum.com>

OK, I've done more testing.  I'm not sure if we need any specialization, but the setting for float_flag_inorm_denormal isn't right for x86.

It is set unconditionally when flush_inputs_to_zero is false, but it needs to take into account the other operand(s).   Given "denorm / 0" or any instruction with a NaN operand, float_flag_inorm_denormal should not be set (and that way, the DE bit in MXCSR won't be set when it shouldn't be).

   Michael

-----Original Message-----
From: Michael Morrell 
Sent: Monday, June 21, 2021 5:57 PM
To: 'Richard Henderson' <richard.henderson@linaro.org>; qemu-devel@nongnu.org
Subject: RE: Denormal input handling

Richard,

I was under the mistaken impression that your changes in this area (splitting float_flag_input_denormal into 2 flags) were already checked in, but I see now that is not the case.  I should probably wait until that is done before I try to claim there are additional issues here.

    Michael

-----Original Message-----
From: Richard Henderson <richard.henderson@linaro.org>
Sent: Monday, June 21, 2021 4:30 PM
To: Michael Morrell <mmorrell@tachyum.com>; qemu-devel@nongnu.org
Subject: Re: Denormal input handling

On 6/21/21 4:13 PM, Michael Morrell wrote:
> I have another couple of thoughts around input denormal handling.
> 
> The first is straightforward.  I noticed that the Aarch64 port doesn't 
> report input denormals (I could not find any code which sets the IDC 
> bit in the FPSR).  I found code in the arm (not aarch64) port that 
> sets other bits like IXC, but nothing for IDC.   Is that simply because no one has bothered to add this support?

It's because we failed to use symbolic constants.  See vfp_exceptbits_from_host.  Which
*is* used for both aarch64 and arm.


> The second concerns support for cases where multiple exception 
> conditions occur.   I had originally thought that denormal input 
> handling would be orthogonal to everything else and so a case like 
> "sNaN  + denorm" would set both the invalid and input denormal flags 
> or "denorm / 0" would set both idivde by zero and input denormal, but I don't think that is true for at least some architectures.  Perhaps some specialization is needed here?

If you've got a specific example, we can look at it.  There's no point adding specialization that isn't going to be used.


r~

  reply	other threads:[~2021-06-22 18:51 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-26 17:37 Denormal input handling Michael Morrell
2021-05-26 20:18 ` Peter Maydell
2021-05-26 21:59   ` Michael Morrell
2021-05-27  1:14     ` Richard Henderson
2021-06-21 23:13 ` Michael Morrell
2021-06-21 23:30   ` Richard Henderson
2021-06-21 23:39     ` Michael Morrell
2021-06-22  0:57     ` Michael Morrell
2021-06-22 18:50       ` Michael Morrell [this message]
     [not found] <746277332.296230.1622055775751.ref@mail.yahoo.com>
2021-05-26 19:02 ` Michael Morrell via
2021-05-26 19:23   ` Richard Henderson
2021-05-26 19:28     ` Richard Henderson
2021-05-26 19:52       ` Michael Morrell via
2021-05-26 20:15         ` Richard Henderson

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