From: Sheng Yang <sheng@linux.intel.com>
To: Avi Kivity <avi@redhat.com>,
Marcelo Tosatti <mtosatti@redhat.com>,
Anthony Liguori <anthony@codemonkey.ws>
Cc: kvm@vger.kernel.org, qemu-devel@nongnu.org,
Sheng Yang <sheng@linux.intel.com>
Subject: [PATCH] qemu: Enable XSAVE related CPUID
Date: Thu, 27 May 2010 17:50:06 +0800 [thread overview]
Message-ID: <1274953806-5316-1-git-send-email-sheng@linux.intel.com> (raw)
We can support it in KVM now. The initial values are the minimal requirement
of XSAVE capable processor.
Signed-off-by: Sheng Yang <sheng@linux.intel.com>
---
target-i386/cpuid.c | 32 ++++++++++++++++++++++++++++++++
1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c
index eebf038..cbf5595 100644
--- a/target-i386/cpuid.c
+++ b/target-i386/cpuid.c
@@ -1067,6 +1067,38 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
*ecx = 0;
*edx = 0;
break;
+ case 0xD:
+ /* Processor Extended State */
+ if (!(env->cpuid_ext_features & CPUID_EXT_XSAVE)) {
+ *eax = 0;
+ *ebx = 0;
+ *ecx = 0;
+ *edx = 0;
+ break;
+ }
+ if (count == 0) {
+ *eax = 0x7; /* FP | SSE | YMM */
+ *ebx = 0x340; /* FP + SSE + YMM size */
+ *ecx = 0x340; /* FP + SSE + YMM size */
+ *edx = 0;
+ } else if (count == 1) {
+ /* eax = 1, so we can continue with others */
+ *eax = 1;
+ *ebx = 0;
+ *ecx = 0;
+ *edx = 0;
+ } else if (count == 2) {
+ *eax = 0x100; /* YMM size */
+ *ebx = 0x240; /* YMM offset */
+ *ecx = 0;
+ *edx = 0;
+ } else {
+ *eax = 0;
+ *ebx = 0;
+ *ecx = 0;
+ *edx = 0;
+ }
+ break;
case 0x80000000:
*eax = env->cpuid_xlevel;
*ebx = env->cpuid_vendor1;
--
1.7.0.1
WARNING: multiple messages have this Message-ID (diff)
From: Sheng Yang <sheng@linux.intel.com>
To: Avi Kivity <avi@redhat.com>,
Marcelo Tosatti <mtosatti@redhat.com>,
Anthony Liguori <anthony@codemonkey.ws>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org,
Sheng Yang <sheng@linux.intel.com>
Subject: [Qemu-devel] [PATCH] qemu: Enable XSAVE related CPUID
Date: Thu, 27 May 2010 17:50:06 +0800 [thread overview]
Message-ID: <1274953806-5316-1-git-send-email-sheng@linux.intel.com> (raw)
We can support it in KVM now. The initial values are the minimal requirement
of XSAVE capable processor.
Signed-off-by: Sheng Yang <sheng@linux.intel.com>
---
target-i386/cpuid.c | 32 ++++++++++++++++++++++++++++++++
1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c
index eebf038..cbf5595 100644
--- a/target-i386/cpuid.c
+++ b/target-i386/cpuid.c
@@ -1067,6 +1067,38 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
*ecx = 0;
*edx = 0;
break;
+ case 0xD:
+ /* Processor Extended State */
+ if (!(env->cpuid_ext_features & CPUID_EXT_XSAVE)) {
+ *eax = 0;
+ *ebx = 0;
+ *ecx = 0;
+ *edx = 0;
+ break;
+ }
+ if (count == 0) {
+ *eax = 0x7; /* FP | SSE | YMM */
+ *ebx = 0x340; /* FP + SSE + YMM size */
+ *ecx = 0x340; /* FP + SSE + YMM size */
+ *edx = 0;
+ } else if (count == 1) {
+ /* eax = 1, so we can continue with others */
+ *eax = 1;
+ *ebx = 0;
+ *ecx = 0;
+ *edx = 0;
+ } else if (count == 2) {
+ *eax = 0x100; /* YMM size */
+ *ebx = 0x240; /* YMM offset */
+ *ecx = 0;
+ *edx = 0;
+ } else {
+ *eax = 0;
+ *ebx = 0;
+ *ecx = 0;
+ *edx = 0;
+ }
+ break;
case 0x80000000:
*eax = env->cpuid_xlevel;
*ebx = env->cpuid_vendor1;
--
1.7.0.1
next reply other threads:[~2010-05-27 9:49 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-05-27 9:50 Sheng Yang [this message]
2010-05-27 9:50 ` [Qemu-devel] [PATCH] qemu: Enable XSAVE related CPUID Sheng Yang
2010-05-27 12:56 ` Avi Kivity
2010-05-27 12:56 ` [Qemu-devel] " Avi Kivity
2010-05-27 13:55 ` Sheng Yang
2010-05-27 13:55 ` [Qemu-devel] " Sheng Yang
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