From: Sheng Yang <sheng@linux.intel.com>
To: Marcelo Tosatti <mtosatti@redhat.com>, Avi Kivity <avi@redhat.com>
Cc: Jan Kiszka <jan.kiszka@siemens.com>,
Anthony Liguori <anthony@codemonkey.ws>,
kvm@vger.kernel.org, qemu-devel@nongnu.org,
Sheng Yang <sheng@linux.intel.com>
Subject: [PATCH 3/4] qemu: kvm: Enable XSAVE live migration support
Date: Thu, 17 Jun 2010 15:18:15 +0800 [thread overview]
Message-ID: <1276759096-29104-4-git-send-email-sheng@linux.intel.com> (raw)
In-Reply-To: <1276759096-29104-1-git-send-email-sheng@linux.intel.com>
Signed-off-by: Sheng Yang <sheng@linux.intel.com>
---
target-i386/cpu.h | 5 ++
target-i386/kvm.c | 134 +++++++++++++++++++++++++++++++++++++++++++++++++
target-i386/machine.c | 20 +++++++
3 files changed, 159 insertions(+), 0 deletions(-)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 548ab80..75070d3 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -718,6 +718,11 @@ typedef struct CPUX86State {
uint16_t fpus_vmstate;
uint16_t fptag_vmstate;
uint16_t fpregs_format_vmstate;
+
+ uint64_t xstate_bv;
+ XMMReg ymmh_regs[CPU_NB_REGS];
+
+ uint64_t xcr0;
} CPUX86State;
CPUX86State *cpu_x86_init(const char *cpu_model);
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index bb6a12f..90ff323 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -289,6 +289,8 @@ void kvm_arch_reset_vcpu(CPUState *env)
} else {
env->mp_state = KVM_MP_STATE_RUNNABLE;
}
+ /* Legal xcr0 for loading */
+ env->xcr0 = 1;
}
static int kvm_has_msr_star(CPUState *env)
@@ -504,6 +506,57 @@ static int kvm_put_fpu(CPUState *env)
return kvm_vcpu_ioctl(env, KVM_SET_FPU, &fpu);
}
+#ifdef KVM_CAP_XSAVE
+
+#define XSAVE_CWD_RIP 2
+#define XSAVE_CWD_RDP 4
+#define XSAVE_MXCSR 6
+#define XSAVE_ST_SPACE 8
+#define XSAVE_XMM_SPACE 40
+#define XSAVE_XSTATE_BV 128
+#define XSAVE_YMMH_SPACE 144
+
+static int kvm_put_xsave(CPUState *env)
+{
+ int i;
+ struct kvm_xsave* xsave;
+ uint16_t cwd, swd, twd, fop;
+
+ xsave = qemu_memalign(4096, sizeof(struct kvm_xsave));
+ memset(xsave, 0, sizeof(struct kvm_xsave));
+ cwd = swd = twd = fop = 0;
+ swd = env->fpus & ~(7 << 11);
+ swd |= (env->fpstt & 7) << 11;
+ cwd = env->fpuc;
+ for (i = 0; i < 8; ++i)
+ twd |= (!env->fptags[i]) << i;
+ xsave->region[0] = (uint32_t)(swd << 16) + cwd;
+ xsave->region[1] = (uint32_t)(fop << 16) + twd;
+ memcpy(&xsave->region[XSAVE_ST_SPACE], env->fpregs,
+ sizeof env->fpregs);
+ memcpy(&xsave->region[XSAVE_XMM_SPACE], env->xmm_regs,
+ sizeof env->xmm_regs);
+ xsave->region[XSAVE_MXCSR] = env->mxcsr;
+ *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV] = env->xstate_bv;
+ memcpy(&xsave->region[XSAVE_YMMH_SPACE], env->ymmh_regs,
+ sizeof env->ymmh_regs);
+ return kvm_vcpu_ioctl(env, KVM_SET_XSAVE, xsave);
+}
+#endif
+
+#ifdef KVM_CAP_XCRS
+static int kvm_put_xcrs(CPUState *env)
+{
+ struct kvm_xcrs xcrs;
+
+ xcrs.nr_xcrs = 1;
+ xcrs.flags = 0;
+ xcrs.xcrs[0].xcr = 0;
+ xcrs.xcrs[0].value = env->xcr0;
+ return kvm_vcpu_ioctl(env, KVM_SET_XCRS, &xcrs);
+}
+#endif
+
static int kvm_put_sregs(CPUState *env)
{
struct kvm_sregs sregs;
@@ -621,6 +674,59 @@ static int kvm_get_fpu(CPUState *env)
return 0;
}
+#ifdef KVM_CAP_XSAVE
+static int kvm_get_xsave(CPUState *env)
+{
+ struct kvm_xsave* xsave;
+ int ret, i;
+ uint16_t cwd, swd, twd, fop;
+
+ xsave = qemu_memalign(4096, sizeof(struct kvm_xsave));
+ ret = kvm_vcpu_ioctl(env, KVM_GET_XSAVE, xsave);
+ if (ret < 0)
+ return ret;
+
+ cwd = (uint16_t)xsave->region[0];
+ swd = (uint16_t)(xsave->region[0] >> 16);
+ twd = (uint16_t)xsave->region[1];
+ fop = (uint16_t)(xsave->region[1] >> 16);
+ env->fpstt = (swd >> 11) & 7;
+ env->fpus = swd;
+ env->fpuc = cwd;
+ for (i = 0; i < 8; ++i)
+ env->fptags[i] = !((twd >> i) & 1);
+ env->mxcsr = xsave->region[XSAVE_MXCSR];
+ memcpy(env->fpregs, &xsave->region[XSAVE_ST_SPACE],
+ sizeof env->fpregs);
+ memcpy(env->xmm_regs, &xsave->region[XSAVE_XMM_SPACE],
+ sizeof env->xmm_regs);
+ env->xstate_bv = *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV];
+ memcpy(env->ymmh_regs, &xsave->region[XSAVE_YMMH_SPACE],
+ sizeof env->ymmh_regs);
+ return 0;
+}
+#endif
+
+#ifdef KVM_CAP_XCRS
+static int kvm_get_xcrs(CPUState *env)
+{
+ int i, ret;
+ struct kvm_xcrs xcrs;
+
+ ret = kvm_vcpu_ioctl(env, KVM_GET_XCRS, &xcrs);
+ if (ret < 0)
+ return ret;
+
+ for (i = 0; i < xcrs.nr_xcrs; i++)
+ /* Only support xcr0 now */
+ if (xcrs.xcrs[0].xcr == 0) {
+ env->xcr0 = xcrs.xcrs[0].value;
+ break;
+ }
+ return 0;
+}
+#endif
+
static int kvm_get_sregs(CPUState *env)
{
struct kvm_sregs sregs;
@@ -965,9 +1071,23 @@ int kvm_arch_put_registers(CPUState *env, int level)
if (ret < 0)
return ret;
+#ifdef KVM_CAP_XSAVE
+ if (kvm_check_extension(env->kvm_state, KVM_CAP_XSAVE))
+ ret = kvm_put_xsave(env);
+ else
+ ret = kvm_put_fpu(env);
+#else
ret = kvm_put_fpu(env);
+#endif
+ if (ret < 0)
+ return ret;
+
+#ifdef KVM_CAP_XCRS
+ if (kvm_check_extension(env->kvm_state, KVM_CAP_XCRS))
+ ret = kvm_put_xcrs(env);
if (ret < 0)
return ret;
+#endif
ret = kvm_put_sregs(env);
if (ret < 0)
@@ -1009,9 +1129,23 @@ int kvm_arch_get_registers(CPUState *env)
if (ret < 0)
return ret;
+#ifdef KVM_CAP_XSAVE
+ if (kvm_check_extension(env->kvm_state, KVM_CAP_XSAVE))
+ ret = kvm_get_xsave(env);
+ else
+ ret = kvm_get_fpu(env);
+#else
ret = kvm_get_fpu(env);
+#endif
+ if (ret < 0)
+ return ret;
+
+#ifdef KVM_CAP_XCRS
+ if (kvm_check_extension(env->kvm_state, KVM_CAP_XCRS))
+ ret = kvm_get_xcrs(env);
if (ret < 0)
return ret;
+#endif
ret = kvm_get_sregs(env);
if (ret < 0)
diff --git a/target-i386/machine.c b/target-i386/machine.c
index b547e2a..5f8376c 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -47,6 +47,22 @@ static const VMStateDescription vmstate_xmm_reg = {
#define VMSTATE_XMM_REGS(_field, _state, _n) \
VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_xmm_reg, XMMReg)
+/* YMMH format is the same as XMM */
+static const VMStateDescription vmstate_ymmh_reg = {
+ .name = "ymmh_reg",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .minimum_version_id_old = 1,
+ .fields = (VMStateField []) {
+ VMSTATE_UINT64(XMM_Q(0), XMMReg),
+ VMSTATE_UINT64(XMM_Q(1), XMMReg),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+#define VMSTATE_YMMH_REGS_VARS(_field, _state, _n, _v) \
+ VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_ymmh_reg, XMMReg)
+
static const VMStateDescription vmstate_mtrr_var = {
.name = "mtrr_var",
.version_id = 1,
@@ -453,6 +469,10 @@ static const VMStateDescription vmstate_cpu = {
/* KVM pvclock msr */
VMSTATE_UINT64_V(system_time_msr, CPUState, 11),
VMSTATE_UINT64_V(wall_clock_msr, CPUState, 11),
+ /* XSAVE related fields */
+ VMSTATE_UINT64_V(xcr0, CPUState, 12),
+ VMSTATE_UINT64_V(xstate_bv, CPUState, 12),
+ VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),
VMSTATE_END_OF_LIST()
/* The above list is not sorted /wrt version numbers, watch out! */
}
--
1.7.0.1
WARNING: multiple messages have this Message-ID (diff)
From: Sheng Yang <sheng@linux.intel.com>
To: Marcelo Tosatti <mtosatti@redhat.com>, Avi Kivity <avi@redhat.com>
Cc: Jan Kiszka <jan.kiszka@siemens.com>,
Sheng Yang <sheng@linux.intel.com>,
kvm@vger.kernel.org, qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 3/4] qemu: kvm: Enable XSAVE live migration support
Date: Thu, 17 Jun 2010 15:18:15 +0800 [thread overview]
Message-ID: <1276759096-29104-4-git-send-email-sheng@linux.intel.com> (raw)
In-Reply-To: <1276759096-29104-1-git-send-email-sheng@linux.intel.com>
Signed-off-by: Sheng Yang <sheng@linux.intel.com>
---
target-i386/cpu.h | 5 ++
target-i386/kvm.c | 134 +++++++++++++++++++++++++++++++++++++++++++++++++
target-i386/machine.c | 20 +++++++
3 files changed, 159 insertions(+), 0 deletions(-)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 548ab80..75070d3 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -718,6 +718,11 @@ typedef struct CPUX86State {
uint16_t fpus_vmstate;
uint16_t fptag_vmstate;
uint16_t fpregs_format_vmstate;
+
+ uint64_t xstate_bv;
+ XMMReg ymmh_regs[CPU_NB_REGS];
+
+ uint64_t xcr0;
} CPUX86State;
CPUX86State *cpu_x86_init(const char *cpu_model);
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index bb6a12f..90ff323 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -289,6 +289,8 @@ void kvm_arch_reset_vcpu(CPUState *env)
} else {
env->mp_state = KVM_MP_STATE_RUNNABLE;
}
+ /* Legal xcr0 for loading */
+ env->xcr0 = 1;
}
static int kvm_has_msr_star(CPUState *env)
@@ -504,6 +506,57 @@ static int kvm_put_fpu(CPUState *env)
return kvm_vcpu_ioctl(env, KVM_SET_FPU, &fpu);
}
+#ifdef KVM_CAP_XSAVE
+
+#define XSAVE_CWD_RIP 2
+#define XSAVE_CWD_RDP 4
+#define XSAVE_MXCSR 6
+#define XSAVE_ST_SPACE 8
+#define XSAVE_XMM_SPACE 40
+#define XSAVE_XSTATE_BV 128
+#define XSAVE_YMMH_SPACE 144
+
+static int kvm_put_xsave(CPUState *env)
+{
+ int i;
+ struct kvm_xsave* xsave;
+ uint16_t cwd, swd, twd, fop;
+
+ xsave = qemu_memalign(4096, sizeof(struct kvm_xsave));
+ memset(xsave, 0, sizeof(struct kvm_xsave));
+ cwd = swd = twd = fop = 0;
+ swd = env->fpus & ~(7 << 11);
+ swd |= (env->fpstt & 7) << 11;
+ cwd = env->fpuc;
+ for (i = 0; i < 8; ++i)
+ twd |= (!env->fptags[i]) << i;
+ xsave->region[0] = (uint32_t)(swd << 16) + cwd;
+ xsave->region[1] = (uint32_t)(fop << 16) + twd;
+ memcpy(&xsave->region[XSAVE_ST_SPACE], env->fpregs,
+ sizeof env->fpregs);
+ memcpy(&xsave->region[XSAVE_XMM_SPACE], env->xmm_regs,
+ sizeof env->xmm_regs);
+ xsave->region[XSAVE_MXCSR] = env->mxcsr;
+ *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV] = env->xstate_bv;
+ memcpy(&xsave->region[XSAVE_YMMH_SPACE], env->ymmh_regs,
+ sizeof env->ymmh_regs);
+ return kvm_vcpu_ioctl(env, KVM_SET_XSAVE, xsave);
+}
+#endif
+
+#ifdef KVM_CAP_XCRS
+static int kvm_put_xcrs(CPUState *env)
+{
+ struct kvm_xcrs xcrs;
+
+ xcrs.nr_xcrs = 1;
+ xcrs.flags = 0;
+ xcrs.xcrs[0].xcr = 0;
+ xcrs.xcrs[0].value = env->xcr0;
+ return kvm_vcpu_ioctl(env, KVM_SET_XCRS, &xcrs);
+}
+#endif
+
static int kvm_put_sregs(CPUState *env)
{
struct kvm_sregs sregs;
@@ -621,6 +674,59 @@ static int kvm_get_fpu(CPUState *env)
return 0;
}
+#ifdef KVM_CAP_XSAVE
+static int kvm_get_xsave(CPUState *env)
+{
+ struct kvm_xsave* xsave;
+ int ret, i;
+ uint16_t cwd, swd, twd, fop;
+
+ xsave = qemu_memalign(4096, sizeof(struct kvm_xsave));
+ ret = kvm_vcpu_ioctl(env, KVM_GET_XSAVE, xsave);
+ if (ret < 0)
+ return ret;
+
+ cwd = (uint16_t)xsave->region[0];
+ swd = (uint16_t)(xsave->region[0] >> 16);
+ twd = (uint16_t)xsave->region[1];
+ fop = (uint16_t)(xsave->region[1] >> 16);
+ env->fpstt = (swd >> 11) & 7;
+ env->fpus = swd;
+ env->fpuc = cwd;
+ for (i = 0; i < 8; ++i)
+ env->fptags[i] = !((twd >> i) & 1);
+ env->mxcsr = xsave->region[XSAVE_MXCSR];
+ memcpy(env->fpregs, &xsave->region[XSAVE_ST_SPACE],
+ sizeof env->fpregs);
+ memcpy(env->xmm_regs, &xsave->region[XSAVE_XMM_SPACE],
+ sizeof env->xmm_regs);
+ env->xstate_bv = *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV];
+ memcpy(env->ymmh_regs, &xsave->region[XSAVE_YMMH_SPACE],
+ sizeof env->ymmh_regs);
+ return 0;
+}
+#endif
+
+#ifdef KVM_CAP_XCRS
+static int kvm_get_xcrs(CPUState *env)
+{
+ int i, ret;
+ struct kvm_xcrs xcrs;
+
+ ret = kvm_vcpu_ioctl(env, KVM_GET_XCRS, &xcrs);
+ if (ret < 0)
+ return ret;
+
+ for (i = 0; i < xcrs.nr_xcrs; i++)
+ /* Only support xcr0 now */
+ if (xcrs.xcrs[0].xcr == 0) {
+ env->xcr0 = xcrs.xcrs[0].value;
+ break;
+ }
+ return 0;
+}
+#endif
+
static int kvm_get_sregs(CPUState *env)
{
struct kvm_sregs sregs;
@@ -965,9 +1071,23 @@ int kvm_arch_put_registers(CPUState *env, int level)
if (ret < 0)
return ret;
+#ifdef KVM_CAP_XSAVE
+ if (kvm_check_extension(env->kvm_state, KVM_CAP_XSAVE))
+ ret = kvm_put_xsave(env);
+ else
+ ret = kvm_put_fpu(env);
+#else
ret = kvm_put_fpu(env);
+#endif
+ if (ret < 0)
+ return ret;
+
+#ifdef KVM_CAP_XCRS
+ if (kvm_check_extension(env->kvm_state, KVM_CAP_XCRS))
+ ret = kvm_put_xcrs(env);
if (ret < 0)
return ret;
+#endif
ret = kvm_put_sregs(env);
if (ret < 0)
@@ -1009,9 +1129,23 @@ int kvm_arch_get_registers(CPUState *env)
if (ret < 0)
return ret;
+#ifdef KVM_CAP_XSAVE
+ if (kvm_check_extension(env->kvm_state, KVM_CAP_XSAVE))
+ ret = kvm_get_xsave(env);
+ else
+ ret = kvm_get_fpu(env);
+#else
ret = kvm_get_fpu(env);
+#endif
+ if (ret < 0)
+ return ret;
+
+#ifdef KVM_CAP_XCRS
+ if (kvm_check_extension(env->kvm_state, KVM_CAP_XCRS))
+ ret = kvm_get_xcrs(env);
if (ret < 0)
return ret;
+#endif
ret = kvm_get_sregs(env);
if (ret < 0)
diff --git a/target-i386/machine.c b/target-i386/machine.c
index b547e2a..5f8376c 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -47,6 +47,22 @@ static const VMStateDescription vmstate_xmm_reg = {
#define VMSTATE_XMM_REGS(_field, _state, _n) \
VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_xmm_reg, XMMReg)
+/* YMMH format is the same as XMM */
+static const VMStateDescription vmstate_ymmh_reg = {
+ .name = "ymmh_reg",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .minimum_version_id_old = 1,
+ .fields = (VMStateField []) {
+ VMSTATE_UINT64(XMM_Q(0), XMMReg),
+ VMSTATE_UINT64(XMM_Q(1), XMMReg),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+#define VMSTATE_YMMH_REGS_VARS(_field, _state, _n, _v) \
+ VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_ymmh_reg, XMMReg)
+
static const VMStateDescription vmstate_mtrr_var = {
.name = "mtrr_var",
.version_id = 1,
@@ -453,6 +469,10 @@ static const VMStateDescription vmstate_cpu = {
/* KVM pvclock msr */
VMSTATE_UINT64_V(system_time_msr, CPUState, 11),
VMSTATE_UINT64_V(wall_clock_msr, CPUState, 11),
+ /* XSAVE related fields */
+ VMSTATE_UINT64_V(xcr0, CPUState, 12),
+ VMSTATE_UINT64_V(xstate_bv, CPUState, 12),
+ VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),
VMSTATE_END_OF_LIST()
/* The above list is not sorted /wrt version numbers, watch out! */
}
--
1.7.0.1
next prev parent reply other threads:[~2010-06-17 7:18 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-17 7:18 [PATCH v4 0/4] XSAVE enabling in QEmu Sheng Yang
2010-06-17 7:18 ` [Qemu-devel] " Sheng Yang
2010-06-17 7:18 ` [PATCH 1/4] qemu: kvm: Extend kvm_arch_get_supported_cpuid() to support index Sheng Yang
2010-06-17 7:18 ` [Qemu-devel] " Sheng Yang
2010-06-17 7:18 ` [PATCH 2/4] qemu: Enable XSAVE related CPUID Sheng Yang
2010-06-17 7:18 ` [Qemu-devel] " Sheng Yang
2010-06-17 7:18 ` Sheng Yang [this message]
2010-06-17 7:18 ` [Qemu-devel] [PATCH 3/4] qemu: kvm: Enable XSAVE live migration support Sheng Yang
2010-06-17 7:40 ` Jan Kiszka
2010-06-17 7:40 ` [Qemu-devel] " Jan Kiszka
2010-06-17 8:26 ` Sheng Yang
2010-06-17 8:26 ` [Qemu-devel] " Sheng Yang
2010-06-17 8:57 ` Jan Kiszka
2010-06-17 8:57 ` [Qemu-devel] " Jan Kiszka
2010-06-17 9:53 ` Sheng Yang
2010-06-17 9:53 ` [Qemu-devel] " Sheng Yang
2010-06-17 13:25 ` Jan Kiszka
2010-06-17 13:25 ` [Qemu-devel] " Jan Kiszka
2010-06-17 7:18 ` [PATCH 4/4] qemu-kvm: " Sheng Yang
2010-06-17 7:18 ` [Qemu-devel] " Sheng Yang
2010-06-17 7:41 ` Jan Kiszka
2010-06-17 7:41 ` [Qemu-devel] " Jan Kiszka
2010-06-17 8:32 ` Sheng Yang
2010-06-17 8:32 ` [Qemu-devel] " Sheng Yang
2010-06-17 8:44 ` Jan Kiszka
2010-06-17 8:44 ` [Qemu-devel] " Jan Kiszka
2010-06-17 10:00 ` [PATCH] qemu-kvm: Replace kvm_set/get_fpu() with upstream version Sheng Yang
2010-06-17 10:00 ` [Qemu-devel] " Sheng Yang
2010-06-17 13:27 ` Jan Kiszka
2010-06-17 13:27 ` [Qemu-devel] " Jan Kiszka
2010-06-18 19:26 ` [PATCH v4 0/4] XSAVE enabling in QEmu Marcelo Tosatti
2010-06-18 19:26 ` [Qemu-devel] " Marcelo Tosatti
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