From: Peter Zijlstra <a.p.zijlstra@chello.nl>
To: Stephane Eranian <eranian@google.com>
Cc: Andi Kleen <andi@firstfloor.org>,
Corey Ashford <cjashfor@linux.vnet.ibm.com>,
Andi Kleen <ak@linux.intel.com>,
linux-kernel@vger.kernel.org, fweisbec@gmail.com, mingo@elte.hu,
acme@redhat.com
Subject: Re: [PATCH 2/3] perf: Add support for extra parameters for raw events
Date: Fri, 12 Nov 2010 11:48:47 +0100 [thread overview]
Message-ID: <1289558927.2084.212.camel@laptop> (raw)
In-Reply-To: <AANLkTimag1+h4ujWYmWXXBspizL1+j2JtJDf+=AmWpPa@mail.gmail.com>
On Fri, 2010-11-12 at 11:41 +0100, Stephane Eranian wrote:
> > Can't remember if the load-latency msr is per-core, but its an extra reg
> > that needs to be set.
>
> Load latency is luckily per thread. Nothing special to do to handle this one.
> We can restore its value from attr->config.
Right, but in effect Andi adds two pieces of infrastructure,
- extra_reg, which determines if a particular cntr value needs extra
data, this is useful for both the offcore msr and the pebs-ll msr.
- per-core constraints, which is useful for shared msrs like the
offcore and lbr config things.
So while his current patch set only uses either piece once -- to provide
offcore support -- both pieces have in fact at least one more potential
user (for future patches).
next prev parent reply other threads:[~2010-11-12 10:48 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-11-11 16:15 [PATCH 1/3] perf-events: Add support for supplementary event registers Andi Kleen
2010-11-11 16:15 ` [PATCH 2/3] perf: Add support for extra parameters for raw events Andi Kleen
2010-11-11 17:54 ` Corey Ashford
2010-11-11 18:39 ` Andi Kleen
2010-11-11 19:38 ` Corey Ashford
2010-11-11 19:49 ` Andi Kleen
2010-11-11 19:59 ` Peter Zijlstra
2010-11-11 20:12 ` Andi Kleen
2010-11-11 20:37 ` Peter Zijlstra
2010-11-12 10:27 ` Andi Kleen
2010-11-12 10:49 ` Stephane Eranian
2010-11-12 11:36 ` Peter Zijlstra
2010-11-12 13:00 ` Stephane Eranian
2010-11-12 13:21 ` Peter Zijlstra
2010-11-12 14:03 ` Stephane Eranian
2010-11-12 13:30 ` Frederic Weisbecker
2010-11-12 15:00 ` Stephane Eranian
2010-11-12 10:41 ` Stephane Eranian
2010-11-12 10:48 ` Peter Zijlstra [this message]
2010-11-12 10:39 ` Stephane Eranian
2010-11-12 10:48 ` Andi Kleen
2010-11-12 10:52 ` Stephane Eranian
2010-11-12 10:56 ` Stephane Eranian
2010-11-11 16:15 ` [PATCH 3/3] perf-events: Fix LLC-* events on Intel Nehalem/Westmere Andi Kleen
2010-11-11 17:35 ` [PATCH/FIX] perf-events: Put the per cpu state for intel_pmu too Andi Kleen
2010-11-11 17:54 ` Stephane Eranian
2010-11-11 18:44 ` Andi Kleen
2010-11-11 21:29 ` Stephane Eranian
2010-11-11 18:06 ` [PATCH 1/3] perf-events: Add support for supplementary event registers Stephane Eranian
2010-11-11 18:42 ` Andi Kleen
2010-11-11 19:09 ` Peter Zijlstra
2010-11-11 19:25 ` Andi Kleen
2010-11-11 19:36 ` Peter Zijlstra
2010-11-11 19:45 ` Andi Kleen
2010-11-11 19:49 ` Peter Zijlstra
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