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From: John Schmoller <jschmoller@xes-inc.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] POST Problems on MPC8[5/6]xx
Date: Wed, 26 Jan 2011 16:03:21 -0600	[thread overview]
Message-ID: <1296079401.8352.3.camel@johns> (raw)

Hello all,

I'm seeing issues on our MPC8[5/6]xx products in relation to POST
testing.  I see that the POST word is stored in a spare, unused register
in the PIC, but this register seems to be cleared during
interrupt_init() when the PIC is reset.  This means that I am seeing the
POST_ROM tests run (pre interrupt_init()) but the word then gets blown
away and the POST_RAM tests do not run (post interrupt_init()).  I
browsed through the MPC8572 UM and didn't see any obvious replacements
for TFRR that wouldn't be reset.  Do others see this issue?  Freescale
guys, are you aware of some other register we can use?

Thanks,
John  

             reply	other threads:[~2011-01-26 22:03 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-01-26 22:03 John Schmoller [this message]
2011-01-27  3:28 ` [U-Boot] POST Problems on MPC8[5/6]xx Kumar Gala

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