[Qemu-devel] [RFC 28/28] target-xtensa: implement relocatable vectors

[Max Filippov <jcmvbkbc@gmail.com>]

See ISA, 4.4.3 for details.

Vector addresses recorded in core configuration are absolute values that
correspond to default VECBASE value.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
 target-xtensa/cpu.h       |    2 ++
 target-xtensa/helper.c    |   18 ++++++++++++++++--
 target-xtensa/translate.c |    1 +
 3 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index dbd3550..2f21091 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -123,6 +123,7 @@ enum {
     INTCLEAR = 227,
     INTENABLE = 228,
     PS = 230,
+    VECBASE = 231,
     EXCCAUSE = 232,
     CCOUNT = 234,
     PRID = 235,
@@ -218,6 +219,7 @@ typedef struct XtensaConfig {
     unsigned nareg;
     int excm_level;
     int ndepc;
+    uint32_t vecbase;
     uint32_t exception_vector[EXC_MAX];
     unsigned ninterrupt;
     unsigned nlevel;
diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c
index 0325b03..17e2053 100644
--- a/target-xtensa/helper.c
+++ b/target-xtensa/helper.c
@@ -40,6 +40,7 @@ void cpu_reset(CPUXtensaState *env)
     env->pc = env->config->exception_vector[EXC_RESET];
     env->sregs[LITBASE] &= ~1;
     env->sregs[PS] = 0x1f;
+    env->sregs[VECBASE] = env->config->vecbase;
 
     env->pending_irq_level = 0;
 }
@@ -51,6 +52,7 @@ static const XtensaConfig core_config[] = {
         .nareg = 64,
         .ndepc = 1,
         .excm_level = 16,
+        .vecbase = 0x5fff8400,
         .exception_vector = {
             [EXC_RESET] = 0x5fff8000,
             [EXC_WINDOW_OVERFLOW4] = 0x5fff8400,
@@ -137,6 +139,16 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
     return addr;
 }
 
+static uint32_t relocated_vector(CPUState *env, uint32_t vector)
+{
+    if (xtensa_option_enabled(env->config,
+                XTENSA_OPTION_RELOCATABLE_VECTOR)) {
+        return vector - env->config->vecbase + env->sregs[VECBASE];
+    } else {
+        return vector;
+    }
+}
+
 static int handle_interrupt(CPUState *env)
 {
     int handled = 1;
@@ -150,7 +162,8 @@ static int handle_interrupt(CPUState *env)
         if (level > 1) {
             env->sregs[EPC1 + level - 1] = env->pc;
             env->sregs[EPS2 + level - 2] = env->sregs[PS];
-            env->pc = env->config->interrupt_vector[level];
+            env->pc = relocated_vector(env,
+                    env->config->interrupt_vector[level]);
         } else {
             handled = 0;
             env->sregs[EXCCAUSE] = LEVEL1_INTERRUPT_CAUSE;
@@ -196,7 +209,8 @@ void do_interrupt(CPUState *env)
     case EXC_USER:
     case EXC_DOUBLE:
         if (env->config->exception_vector[env->exception_index]) {
-            env->pc = env->config->exception_vector[env->exception_index];
+            env->pc = relocated_vector(env,
+                    env->config->exception_vector[env->exception_index]);
             env->exception_taken = 1;
             env->interrupt_request |= CPU_INTERRUPT_EXITTB;
         } else {
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index b72f1cf..a4e7403 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -93,6 +93,7 @@ static const char * const sregnames[256] = {
     [INTCLEAR] = "INTCLEAR",
     [INTENABLE] = "INTENABLE",
     [PS] = "PS",
+    [VECBASE] = "VECBASE",
     [EXCCAUSE] = "EXCCAUSE",
     [CCOUNT] = "CCOUNT",
     [PRID] = "PRID",
-- 
1.7.3.4