From: Peter Zijlstra <a.p.zijlstra@chello.nl>
To: Lin Ming <ming.m.lin@intel.com>
Cc: Ingo Molnar <mingo@elte.hu>, Andi Kleen <andi@firstfloor.org>,
Stephane Eranian <eranian@google.com>,
Arnaldo Carvalho de Melo <acme@ghostprotocols.net>,
linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/4] perf, x86: Add Intel Nhm/Wsm/Snb load latency support
Date: Tue, 05 Jul 2011 15:17:48 +0200 [thread overview]
Message-ID: <1309871868.3282.149.camel@twins> (raw)
In-Reply-To: <1309766525-14089-3-git-send-email-ming.m.lin@intel.com>
On Mon, 2011-07-04 at 08:02 +0000, Lin Ming wrote:
> +#define INTEL_EVENT_EXTRA_REG2(event, msr, vm) \
> + EVENT_EXTRA_REG(event, msr, ARCH_PERFMON_EVENTSEL_EVENT | \
> + ARCH_PERFMON_EVENTSEL_UMASK, vm)
That's inconsistent wrt the normal constraints, INTEL_UEVENT_EXTRA_REG
would be the consistent name.
#define INTEL_UEVENT_EXTRA_REG(event, msr, vm) \
EVENT_EXTRA_REG(event, msr, INTEL_ARCH_EVENT_MASK, vm)
next prev parent reply other threads:[~2011-07-05 13:18 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-04 8:02 [PATCH 0/4] perf: memory load/store events generalization Lin Ming
2011-07-04 8:02 ` [PATCH 1/4] perf: Add memory load/store events generic code Lin Ming
2011-07-04 8:33 ` Peter Zijlstra
2011-07-04 8:44 ` Peter Zijlstra
2011-07-05 12:03 ` Peter Zijlstra
2011-07-05 23:02 ` Paul Mackerras
2011-07-06 13:58 ` Peter Zijlstra
2011-07-08 7:18 ` Anton Blanchard
2011-07-08 15:18 ` Peter Zijlstra
2011-08-08 11:57 ` Peter Zijlstra
2011-08-08 11:59 ` Peter Zijlstra
2011-07-04 22:01 ` Andi Kleen
2011-07-05 8:43 ` Peter Zijlstra
2011-07-04 11:08 ` Peter Zijlstra
2011-07-04 11:16 ` Peter Zijlstra
2011-07-04 21:52 ` Andi Kleen
2011-07-05 11:54 ` Lin Ming
2011-07-05 14:17 ` Peter Zijlstra
2011-07-06 5:53 ` Lin Ming
2011-07-06 13:51 ` Peter Zijlstra
2011-07-07 2:01 ` Lin Ming
2011-07-04 8:02 ` [PATCH 2/4] perf, x86: Add Intel Nhm/Wsm/Snb load latency support Lin Ming
2011-07-05 13:17 ` Peter Zijlstra [this message]
2011-07-05 13:34 ` Lin Ming
2011-07-22 18:58 ` Stephane Eranian
2011-07-04 8:02 ` [PATCH 3/4] perf, x86: Add Intel SandyBridge pricise store support Lin Ming
2011-07-11 8:32 ` Peter Zijlstra
2011-07-11 8:57 ` Lin Ming
2011-07-11 8:52 ` Peter Zijlstra
2011-07-04 8:02 ` [PATCH 4/4] perf, tool: Add new command "perf mem" Lin Ming
2011-07-04 22:00 ` Andi Kleen
2011-07-05 1:35 ` Lin Ming
2011-07-22 18:55 ` [PATCH 0/4] perf: memory load/store events generalization Stephane Eranian
2011-07-22 21:01 ` Andi Kleen
2011-07-22 21:14 ` Stephane Eranian
2011-07-22 21:43 ` Andi Kleen
2011-07-22 21:59 ` Stephane Eranian
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