From: Peter Zijlstra <peterz@infradead.org>
To: Robert Richter <robert.richter@amd.com>
Cc: Ingo Molnar <mingo@elte.hu>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 7/7] perf, x86: Implement 64 bit counter support for IBS
Date: Fri, 29 Jul 2011 19:02:42 +0200 [thread overview]
Message-ID: <1311958962.5890.416.camel@twins> (raw)
In-Reply-To: <1311958728.5890.412.camel@twins>
On Fri, 2011-07-29 at 18:58 +0200, Peter Zijlstra wrote:
> On Thu, 2011-07-28 at 15:46 +0200, Robert Richter wrote:
> > This patch implements 64 bit counter support for IBS. The sampling
> > period is no longer limited to the hw counter width.
>
> That should never be the case, even for shorter hw counter, in such a
> case you should ignore overflows until you reach the programmed period.
Hmm, I might have mis-understood, is that exactly what this patch
implements, or does this patch add support for new hardware?
next prev parent reply other threads:[~2011-07-29 17:03 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-28 13:46 [PATCH 0/7] perf, x86: Implement AMD IBS Robert Richter
2011-07-28 13:46 ` [PATCH 1/7] perf, x86: share IBS macros between perf and oprofile Robert Richter
2011-07-28 13:46 ` [PATCH 2/7] perf, x86: Implement IBS initialization Robert Richter
2011-07-29 16:58 ` Peter Zijlstra
2011-08-01 5:27 ` Robert Richter
2011-08-02 11:49 ` Peter Zijlstra
2011-08-12 17:49 ` Robert Richter
2011-07-28 13:46 ` [PATCH 3/7] perf, x86: Implement IBS event configuration Robert Richter
2011-08-02 11:35 ` Peter Zijlstra
2011-08-12 19:51 ` Robert Richter
2011-07-28 13:46 ` [PATCH 4/7] perf, x86: Implement IBS interrupt handler Robert Richter
2011-07-29 16:58 ` Peter Zijlstra
2011-08-01 5:32 ` Robert Richter
2011-08-01 15:21 ` Peter Zijlstra
2011-08-01 16:38 ` Don Zickus
2011-08-05 9:55 ` Ingo Molnar
2011-08-05 13:47 ` Don Zickus
2011-08-02 11:43 ` Peter Zijlstra
2011-08-12 18:07 ` Robert Richter
2011-07-28 13:46 ` [PATCH 5/7] perf, x86: Implement IBS pmu control ops Robert Richter
2011-07-28 13:46 ` [PATCH 6/7] perf, x86: Example code for AMD IBS Robert Richter
2011-07-29 16:58 ` Peter Zijlstra
2011-08-01 5:50 ` Robert Richter
2011-08-02 10:37 ` Peter Zijlstra
2011-08-03 8:27 ` Michael Cree
2011-08-03 17:56 ` Robert Richter
2011-07-28 13:46 ` [PATCH 7/7] perf, x86: Implement 64 bit counter support for IBS Robert Richter
2011-07-29 16:58 ` Peter Zijlstra
2011-07-29 17:02 ` Peter Zijlstra [this message]
2011-08-01 5:55 ` Robert Richter
2011-07-29 17:01 ` Peter Zijlstra
2011-08-01 6:13 ` Robert Richter
2011-08-02 11:37 ` Peter Zijlstra
2011-08-12 18:11 ` Robert Richter
2011-07-29 17:07 ` [PATCH 0/7] perf, x86: Implement AMD IBS Peter Zijlstra
2011-08-01 5:21 ` Robert Richter
2011-08-02 11:29 ` Peter Zijlstra
2011-08-12 19:43 ` Robert Richter
2011-08-16 21:05 ` Robert Richter
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