From: Simon Que <sque@chromium.org>
To: intel-gfx@lists.freedesktop.org, jbarnes@virtuousgeek.org,
chris@chris-wilson.co.uk, mjg59@srcf.ucam.org
Cc: olofj@chromium.org, Simon Que <sque@chromium.org>, snanda@chromium.org
Subject: [PATCH 1/2] drivers: i915: Fix BLC PWM register setup
Date: Thu, 10 Nov 2011 17:50:26 -0800 [thread overview]
Message-ID: <1320976227-21262-1-git-send-email-sque@chromium.org> (raw)
There is an error in i915_read_blc_pwm_ctl, where the register values
are not being copied correctly. BLC_PWM_CTL and BLC_PWM_CTL2 are
getting mixed up. This patch fixes that so that saveBLC_PWM_CTL2 and
not saveBLC_PWM_CTL is copied to the BLC_PWM_CTL2 register.
Signed-off-by: Simon Que <sque@chromium.org>
---
drivers/gpu/drm/i915/intel_panel.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index a9e0c7b..f15388c 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -141,8 +141,8 @@ static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv)
dev_priv->saveBLC_PWM_CTL2 = val;
} else if (val == 0) {
I915_WRITE(BLC_PWM_PCH_CTL2,
- dev_priv->saveBLC_PWM_CTL);
- val = dev_priv->saveBLC_PWM_CTL;
+ dev_priv->saveBLC_PWM_CTL2);
+ val = dev_priv->saveBLC_PWM_CTL2;
}
} else {
val = I915_READ(BLC_PWM_CTL);
--
1.7.3.1
next reply other threads:[~2011-11-11 1:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-11 1:50 Simon Que [this message]
2011-11-11 1:50 ` [PATCH 2/2] drivers: i915: Default backlight PWM frequency Simon Que
2011-11-11 2:11 ` Olof Johansson
2012-01-17 10:43 ` [PATCH 1/2] drivers: i915: Fix BLC PWM register setup Daniel Vetter
-- strict thread matches above, loose matches on Subject: below --
2011-11-08 21:35 Simon Que
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