From: Tom Warren <twarren.nvidia@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] arm: Tegra: fix undefined instruction hang immediately after reset
Date: Tue, 6 Dec 2011 16:00:19 -0700 [thread overview]
Message-ID: <1323212419-21023-1-git-send-email-twarren@nvidia.com> (raw)
commit 0d479b53 (Aneesh V) added code for OMAP4 that doesn't
execute on Tegra, due to the AVP (ARM7TDI) not having a CP15.
Result was an undefined instruction hang just after reset.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
---
arch/arm/cpu/armv7/start.S | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index d23dc9d..ceed11e 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -144,6 +144,7 @@ reset:
orr r0, r0, #0xd3
msr cpsr,r0
+#if !defined(CONFIG_TEGRA2)
/*
* Setup vector:
* (OMAP4 spl TEXT_BASE is not 32 byte aligned.
@@ -159,6 +160,7 @@ reset:
ldr r0, =_start
mcr p15, 0, r0, c12, c0, 0 @Set VBAR
#endif
+#endif /* !Tegra2 */
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
--
1.7.7.1
next reply other threads:[~2011-12-06 23:00 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-06 23:00 Tom Warren [this message]
2011-12-08 0:14 ` [U-Boot] [PATCH] arm: Tegra: fix undefined instruction hang immediately after reset Mike Frysinger
2011-12-08 5:51 ` Aneesh V
2011-12-08 6:25 ` Mike Frysinger
2011-12-08 15:37 ` Tom Warren
2011-12-09 6:18 ` Aneesh V
[not found] ` <7E91C59574E9954FA075F8D8CCDF78DB392E3A5798@HQMAIL04.nvidia.com>
2011-12-20 23:27 ` Tom Warren
2011-12-21 4:07 ` Simon Glass
2011-12-21 6:58 ` Wolfgang Denk
2011-12-21 8:02 ` Aneesh V
2011-12-21 16:10 ` Tom Warren
2011-12-21 19:37 ` Wolfgang Denk
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