* [PATCH]sparc32: forced setting of mode of sun4m per-cpu timers
@ 2012-01-06 21:34 Kirill Tkhai
2012-01-09 22:14 ` David Miller
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Kirill Tkhai @ 2012-01-06 21:34 UTC (permalink / raw)
To: sparclinux
SUN4M per-cpu timers have two modes of work. These are timer mode and
counter mode. Kernel doesn't write anything to the register, which is
connected with mode choice.
So, the mode is chosen by bootloader. This patch forces to use timer
mode from the kernel and to be independent of bootloader.
I had this problem with OpenBIOS. Timers don't tick and kernel fails on
QEMU, when it's compiled with SMP support. The patch fixes problem.
Signed-off-by: Tkhai Kirill <tkhai@yandex.ru>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
---
diff --git a/arch/sparc/kernel/sun4m_irq.c
b/arch/sparc/kernel/sun4m_irq.c
index 422c16d..e611651 100644
--- a/arch/sparc/kernel/sun4m_irq.c
+++ b/arch/sparc/kernel/sun4m_irq.c
@@ -399,6 +399,9 @@ static void __init sun4m_init_timers(irq_handler_t
counter_fn)
timers_global = (void __iomem *)
(unsigned long) addr[num_cpu_timers];
+ /* Every per-cpu timer works in timer mode */
+ sbus_writel(0x00000000, &timers_global->timer_config);
+
sbus_writel((((1000000/HZ) + 1) << 10), &timers_global->l10_limit);
master_l10_counter = &timers_global->l10_count;
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH]sparc32: forced setting of mode of sun4m per-cpu timers
2012-01-06 21:34 [PATCH]sparc32: forced setting of mode of sun4m per-cpu timers Kirill Tkhai
@ 2012-01-09 22:14 ` David Miller
2012-01-10 23:17 ` Kirill Tkhai
2012-01-11 0:28 ` David Miller
2 siblings, 0 replies; 4+ messages in thread
From: David Miller @ 2012-01-09 22:14 UTC (permalink / raw)
To: sparclinux
From: Kirill Tkhai <tkhai@yandex.ru>
Date: Sat, 07 Jan 2012 01:34:51 +0400
> SUN4M per-cpu timers have two modes of work. These are timer mode and
> counter mode. Kernel doesn't write anything to the register, which is
> connected with mode choice.
> So, the mode is chosen by bootloader. This patch forces to use timer
> mode from the kernel and to be independent of bootloader.
>
> I had this problem with OpenBIOS. Timers don't tick and kernel fails on
> QEMU, when it's compiled with SMP support. The patch fixes problem.
>
> Signed-off-by: Tkhai Kirill <tkhai@yandex.ru>
> Acked-by: Sam Ravnborg <sam@ravnborg.org>
Your email client corrupted your patch.
> @@ -399,6 +399,9 @@ static void __init sun4m_init_timers(irq_handler_t
> counter_fn)
It split up this line into two.
Please, test email the patch to yourself until you can successfully
apply the patch contained in the email. Then, and only then, resubmit
your patch here.
Thanks.
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH]sparc32: forced setting of mode of sun4m per-cpu timers
2012-01-06 21:34 [PATCH]sparc32: forced setting of mode of sun4m per-cpu timers Kirill Tkhai
2012-01-09 22:14 ` David Miller
@ 2012-01-10 23:17 ` Kirill Tkhai
2012-01-11 0:28 ` David Miller
2 siblings, 0 replies; 4+ messages in thread
From: Kirill Tkhai @ 2012-01-10 23:17 UTC (permalink / raw)
To: sparclinux
SUN4M per-cpu timers have two modes of work. These are timer mode and
counter mode. Kernel doesn't write anything to the register, which is
connected with mode choice.
So, the mode is chosen by bootloader. This patch forces to use timer
mode from the kernel and to be independent of bootloader.
I had this problem with OpenBIOS. Timers don't tick and kernel fails on
QEMU, when it's compiled with SMP support. The patch fixes problem.
Signed-off-by: Tkhai Kirill <tkhai@yandex.ru>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
---
diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c
index 422c16d..e611651 100644
--- a/arch/sparc/kernel/sun4m_irq.c
+++ b/arch/sparc/kernel/sun4m_irq.c
@@ -399,6 +399,9 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn)
timers_global = (void __iomem *)
(unsigned long) addr[num_cpu_timers];
+ /* Every per-cpu timer works in timer mode */
+ sbus_writel(0x00000000, &timers_global->timer_config);
+
sbus_writel((((1000000/HZ) + 1) << 10), &timers_global->l10_limit);
master_l10_counter = &timers_global->l10_count;
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH]sparc32: forced setting of mode of sun4m per-cpu timers
2012-01-06 21:34 [PATCH]sparc32: forced setting of mode of sun4m per-cpu timers Kirill Tkhai
2012-01-09 22:14 ` David Miller
2012-01-10 23:17 ` Kirill Tkhai
@ 2012-01-11 0:28 ` David Miller
2 siblings, 0 replies; 4+ messages in thread
From: David Miller @ 2012-01-11 0:28 UTC (permalink / raw)
To: sparclinux
From: Kirill Tkhai <tkhai@yandex.ru>
Date: Wed, 11 Jan 2012 03:17:03 +0400
> SUN4M per-cpu timers have two modes of work. These are timer mode and
> counter mode. Kernel doesn't write anything to the register, which is
> connected with mode choice.
> So, the mode is chosen by bootloader. This patch forces to use timer
> mode from the kernel and to be independent of bootloader.
>
> I had this problem with OpenBIOS. Timers don't tick and kernel fails on
> QEMU, when it's compiled with SMP support. The patch fixes problem.
>
> Signed-off-by: Tkhai Kirill <tkhai@yandex.ru>
> Acked-by: Sam Ravnborg <sam@ravnborg.org>
Applied, thanks.
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2012-01-11 0:28 UTC | newest]
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2012-01-06 21:34 [PATCH]sparc32: forced setting of mode of sun4m per-cpu timers Kirill Tkhai
2012-01-09 22:14 ` David Miller
2012-01-10 23:17 ` Kirill Tkhai
2012-01-11 0:28 ` David Miller
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